1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
11  *  igb_raise_eec_clk - Raise EEPROM clock
22 	udelay(hw->nvm.delay_usec);  in igb_raise_eec_clk()
26  *  igb_lower_eec_clk - Lower EEPROM clock
37 	udelay(hw->nvm.delay_usec);  in igb_lower_eec_clk()
41  *  igb_shift_out_eec_bits - Shift data bits our to the EEPROM
44  *  @count: number of bits to shift out
46  *  We need to shift 'count' bits out to the EEPROM.  So, the value in the
47  *  "data" parameter will be shifted out to the EEPROM one bit at a time.
52 	struct e1000_nvm_info *nvm = &hw->nvm;  in igb_shift_out_eec_bits()
56 	mask = 1u << (count - 1);  in igb_shift_out_eec_bits()
57 	if (nvm->type == e1000_nvm_eeprom_spi)  in igb_shift_out_eec_bits()
69 		udelay(nvm->delay_usec);  in igb_shift_out_eec_bits()
82  *  igb_shift_in_eec_bits - Shift data bits in from the EEPROM
86  *  In order to read a register from the EEPROM, we need to shift 'count' bits
88  *  the EEPROM (setting the SK bit), and then reading the value of the data out
120  *  igb_poll_eerd_eewr_done - Poll for EEPROM read/write completion
124  *  Polls the EEPROM status bit for either read or write completion based
131 	s32 ret_val = -E1000_ERR_NVM;  in igb_poll_eerd_eewr_done()
151  *  igb_acquire_nvm - Generic request for access to EEPROM
156  *  EEPROM access and return -E1000_ERR_NVM (-1).
173 		timeout--;  in igb_acquire_nvm()
180 		ret_val = -E1000_ERR_NVM;  in igb_acquire_nvm()
187  *  igb_standby_nvm - Return EEPROM to standby state
194 	struct e1000_nvm_info *nvm = &hw->nvm;  in igb_standby_nvm()
197 	if (nvm->type == e1000_nvm_eeprom_spi) {  in igb_standby_nvm()
202 		udelay(nvm->delay_usec);  in igb_standby_nvm()
206 		udelay(nvm->delay_usec);  in igb_standby_nvm()
211  *  e1000_stop_nvm - Terminate EEPROM command
221 	if (hw->nvm.type == e1000_nvm_eeprom_spi) {  in e1000_stop_nvm()
229  *  igb_release_nvm - Release exclusive access to EEPROM
246  *  igb_ready_nvm_eeprom - Prepares EEPROM for read/write
253 	struct e1000_nvm_info *nvm = &hw->nvm;  in igb_ready_nvm_eeprom()
260 	if (nvm->type == e1000_nvm_eeprom_spi) {  in igb_ready_nvm_eeprom()
268 		/* Read "Status Register" repeatedly until the LSB is cleared.  in igb_ready_nvm_eeprom()
271 		 * not cleared within 'timeout', then error out.  in igb_ready_nvm_eeprom()
275 					       hw->nvm.opcode_bits);  in igb_ready_nvm_eeprom()
282 			timeout--;  in igb_ready_nvm_eeprom()
287 			ret_val = -E1000_ERR_NVM;  in igb_ready_nvm_eeprom()
288 			goto out;  in igb_ready_nvm_eeprom()
292 out:  in igb_ready_nvm_eeprom()
297  *  igb_read_nvm_spi - Read EEPROM's using SPI
299  *  @offset: offset of word in the EEPROM to read
300  *  @words: number of words to read
301  *  @data: word read from the EEPROM
307 	struct e1000_nvm_info *nvm = &hw->nvm;  in igb_read_nvm_spi()
316 	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||  in igb_read_nvm_spi()
318 		hw_dbg("nvm parameter(s) out of bounds\n");  in igb_read_nvm_spi()
319 		ret_val = -E1000_ERR_NVM;  in igb_read_nvm_spi()
320 		goto out;  in igb_read_nvm_spi()
323 	ret_val = nvm->ops.acquire(hw);  in igb_read_nvm_spi()
325 		goto out;  in igb_read_nvm_spi()
333 	if ((nvm->address_bits == 8) && (offset >= 128))  in igb_read_nvm_spi()
336 	/* Send the READ command (opcode + addr) */  in igb_read_nvm_spi()
337 	igb_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);  in igb_read_nvm_spi()
338 	igb_shift_out_eec_bits(hw, (u16)(offset*2), nvm->address_bits);  in igb_read_nvm_spi()
340 	/* Read the data.  SPI NVMs increment the address with each byte  in igb_read_nvm_spi()
341 	 * read and will roll over if reading beyond the end.  This allows  in igb_read_nvm_spi()
342 	 * us to read the whole NVM from any offset  in igb_read_nvm_spi()
350 	nvm->ops.release(hw);  in igb_read_nvm_spi()
352 out:  in igb_read_nvm_spi()
357  *  igb_read_nvm_eerd - Reads EEPROM using EERD register
359  *  @offset: offset of word in the EEPROM to read
360  *  @words: number of words to read
361  *  @data: word read from the EEPROM
367 	struct e1000_nvm_info *nvm = &hw->nvm;  in igb_read_nvm_eerd()
374 	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||  in igb_read_nvm_eerd()
376 		hw_dbg("nvm parameter(s) out of bounds\n");  in igb_read_nvm_eerd()
377 		ret_val = -E1000_ERR_NVM;  in igb_read_nvm_eerd()
378 		goto out;  in igb_read_nvm_eerd()
394 out:  in igb_read_nvm_eerd()
399  *  igb_write_nvm_spi - Write to EEPROM using SPI
412 	struct e1000_nvm_info *nvm = &hw->nvm;  in igb_write_nvm_spi()
413 	s32 ret_val = -E1000_ERR_NVM;  in igb_write_nvm_spi()
419 	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||  in igb_write_nvm_spi()
421 		hw_dbg("nvm parameter(s) out of bounds\n");  in igb_write_nvm_spi()
428 		ret_val = nvm->ops.acquire(hw);  in igb_write_nvm_spi()
434 			nvm->ops.release(hw);  in igb_write_nvm_spi()
442 					 nvm->opcode_bits);  in igb_write_nvm_spi()
449 		if ((nvm->address_bits == 8) && (offset >= 128))  in igb_write_nvm_spi()
452 		/* Send the Write command (8-bit opcode + addr) */  in igb_write_nvm_spi()
453 		igb_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);  in igb_write_nvm_spi()
455 					 nvm->address_bits);  in igb_write_nvm_spi()
465 			if ((((offset + widx) * 2) % nvm->page_size) == 0) {  in igb_write_nvm_spi()
471 		nvm->ops.release(hw);  in igb_write_nvm_spi()
478  *  igb_read_part_string - Read device part number
497 		goto out;  in igb_read_part_string()
500 	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);  in igb_read_part_string()
502 		hw_dbg("NVM Read Error\n");  in igb_read_part_string()
503 		goto out;  in igb_read_part_string()
506 	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pointer);  in igb_read_part_string()
508 		hw_dbg("NVM Read Error\n");  in igb_read_part_string()
509 		goto out;  in igb_read_part_string()
532 		part_num[6] = '-';  in igb_read_part_string()
540 		/* switch all the data but the '-' to hex char */  in igb_read_part_string()
545 				part_num[offset] += 'A' - 0xA;  in igb_read_part_string()
548 		goto out;  in igb_read_part_string()
551 	ret_val = hw->nvm.ops.read(hw, pointer, 1, &length);  in igb_read_part_string()
553 		hw_dbg("NVM Read Error\n");  in igb_read_part_string()
554 		goto out;  in igb_read_part_string()
560 		goto out;  in igb_read_part_string()
563 	if (part_num_size < (((u32)length * 2) - 1)) {  in igb_read_part_string()
566 		goto out;  in igb_read_part_string()
571 	length--;  in igb_read_part_string()
574 		ret_val = hw->nvm.ops.read(hw, pointer + offset, 1, &nvm_data);  in igb_read_part_string()
576 			hw_dbg("NVM Read Error\n");  in igb_read_part_string()
577 			goto out;  in igb_read_part_string()
584 out:  in igb_read_part_string()
589  *  igb_read_mac_addr - Read device MAC address
606 		hw->mac.perm_addr[i] = (u8)(rar_low >> (i*8));  in igb_read_mac_addr()
609 		hw->mac.perm_addr[i+4] = (u8)(rar_high >> (i*8));  in igb_read_mac_addr()
612 		hw->mac.addr[i] = hw->mac.perm_addr[i];  in igb_read_mac_addr()
618  *  igb_validate_nvm_checksum - Validate EEPROM checksum
631 		ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);  in igb_validate_nvm_checksum()
633 			hw_dbg("NVM Read Error\n");  in igb_validate_nvm_checksum()
634 			goto out;  in igb_validate_nvm_checksum()
641 		ret_val = -E1000_ERR_NVM;  in igb_validate_nvm_checksum()
642 		goto out;  in igb_validate_nvm_checksum()
645 out:  in igb_validate_nvm_checksum()
650  *  igb_update_nvm_checksum - Update EEPROM checksum
664 		ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);  in igb_update_nvm_checksum()
666 			hw_dbg("NVM Read Error while updating checksum.\n");  in igb_update_nvm_checksum()
667 			goto out;  in igb_update_nvm_checksum()
671 	checksum = (u16) NVM_SUM - checksum;  in igb_update_nvm_checksum()
672 	ret_val = hw->nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &checksum);  in igb_update_nvm_checksum()
676 out:  in igb_update_nvm_checksum()
681  *  igb_get_fw_version - Get firmware version information
698 	hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);  in igb_get_fw_version()
699 	switch (hw->mac.type) {  in igb_get_fw_version()
710 			hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);  in igb_get_fw_version()
711 			fw_vers->eep_major = (fw_version & NVM_MAJOR_MASK)  in igb_get_fw_version()
713 			fw_vers->eep_minor = (fw_version & NVM_MINOR_MASK)  in igb_get_fw_version()
715 			fw_vers->eep_build = (fw_version & NVM_IMAGE_ID_MASK);  in igb_get_fw_version()
727 		hw->nvm.ops.read(hw, NVM_COMB_VER_PTR, 1, &comb_offset);  in igb_get_fw_version()
731 			hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset  in igb_get_fw_version()
733 			hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset),  in igb_get_fw_version()
741 				fw_vers->or_valid = true;  in igb_get_fw_version()
742 				fw_vers->or_major =  in igb_get_fw_version()
744 				fw_vers->or_build =  in igb_get_fw_version()
747 				fw_vers->or_patch =  in igb_get_fw_version()
755 	hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);  in igb_get_fw_version()
756 	fw_vers->eep_major = (fw_version & NVM_MAJOR_MASK)  in igb_get_fw_version()
773 	fw_vers->eep_minor = result;  in igb_get_fw_version()
777 		hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verl);  in igb_get_fw_version()
778 		hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verh);  in igb_get_fw_version()
779 		fw_vers->etrack_id = (eeprom_verh << NVM_ETRACK_SHIFT)  in igb_get_fw_version()