Lines Matching refs:ice_debug
96 ice_debug(hw, ICE_DBG_PHY, "%s: phy_type_low: 0x%016llx\n", prefix, low); in ice_dump_phy_type()
100 ice_debug(hw, ICE_DBG_PHY, "%s: bit(%d): %s\n", in ice_dump_phy_type()
104 ice_debug(hw, ICE_DBG_PHY, "%s: phy_type_high: 0x%016llx\n", prefix, high); in ice_dump_phy_type()
108 ice_debug(hw, ICE_DBG_PHY, "%s: bit(%d): %s\n", in ice_dump_phy_type()
160 ice_debug(hw, ICE_DBG_INIT, "mac_type: %d\n", hw->mac_type); in ice_set_mac_type()
267 ice_debug(hw, ICE_DBG_LAN, "got invalid MAC address\n"); in ice_aq_manage_mac_read()
324 ice_debug(hw, ICE_DBG_LINK, "get phy caps dump\n"); in ice_aq_get_phy_caps()
346 ice_debug(hw, ICE_DBG_LINK, "%s: report_mode = 0x%x\n", in ice_aq_get_phy_caps()
348 ice_debug(hw, ICE_DBG_LINK, "%s: caps = 0x%x\n", prefix, pcaps->caps); in ice_aq_get_phy_caps()
349 ice_debug(hw, ICE_DBG_LINK, "%s: low_power_ctrl_an = 0x%x\n", prefix, in ice_aq_get_phy_caps()
351 ice_debug(hw, ICE_DBG_LINK, "%s: eee_cap = 0x%x\n", prefix, in ice_aq_get_phy_caps()
353 ice_debug(hw, ICE_DBG_LINK, "%s: eeer_value = 0x%x\n", prefix, in ice_aq_get_phy_caps()
355 ice_debug(hw, ICE_DBG_LINK, "%s: link_fec_options = 0x%x\n", prefix, in ice_aq_get_phy_caps()
357 ice_debug(hw, ICE_DBG_LINK, "%s: module_compliance_enforcement = 0x%x\n", in ice_aq_get_phy_caps()
359 ice_debug(hw, ICE_DBG_LINK, "%s: extended_compliance_code = 0x%x\n", in ice_aq_get_phy_caps()
361 ice_debug(hw, ICE_DBG_LINK, "%s: module_type[0] = 0x%x\n", prefix, in ice_aq_get_phy_caps()
363 ice_debug(hw, ICE_DBG_LINK, "%s: module_type[1] = 0x%x\n", prefix, in ice_aq_get_phy_caps()
365 ice_debug(hw, ICE_DBG_LINK, "%s: module_type[2] = 0x%x\n", prefix, in ice_aq_get_phy_caps()
622 ice_debug(hw, ICE_DBG_LINK, "get link info\n"); in ice_aq_get_link_info()
623 ice_debug(hw, ICE_DBG_LINK, " link_speed = 0x%x\n", li->link_speed); in ice_aq_get_link_info()
624 ice_debug(hw, ICE_DBG_LINK, " phy_type_low = 0x%llx\n", in ice_aq_get_link_info()
626 ice_debug(hw, ICE_DBG_LINK, " phy_type_high = 0x%llx\n", in ice_aq_get_link_info()
628 ice_debug(hw, ICE_DBG_LINK, " media_type = 0x%x\n", *hw_media_type); in ice_aq_get_link_info()
629 ice_debug(hw, ICE_DBG_LINK, " link_info = 0x%x\n", li->link_info); in ice_aq_get_link_info()
630 ice_debug(hw, ICE_DBG_LINK, " link_cfg_err = 0x%x\n", li->link_cfg_err); in ice_aq_get_link_info()
631 ice_debug(hw, ICE_DBG_LINK, " an_info = 0x%x\n", li->an_info); in ice_aq_get_link_info()
632 ice_debug(hw, ICE_DBG_LINK, " ext_info = 0x%x\n", li->ext_info); in ice_aq_get_link_info()
633 ice_debug(hw, ICE_DBG_LINK, " fec_info = 0x%x\n", li->fec_info); in ice_aq_get_link_info()
634 ice_debug(hw, ICE_DBG_LINK, " lse_ena = 0x%x\n", li->lse_ena); in ice_aq_get_link_info()
635 ice_debug(hw, ICE_DBG_LINK, " max_frame = 0x%x\n", in ice_aq_get_link_info()
637 ice_debug(hw, ICE_DBG_LINK, " pacing = 0x%x\n", li->pacing); in ice_aq_get_link_info()
1005 ice_debug(hw, ICE_DBG_FW_LOG, "[ FW Log Msg Start ]\n"); in ice_output_fw_log()
1008 ice_debug(hw, ICE_DBG_FW_LOG, "[ FW Log Msg End ]\n"); in ice_output_fw_log()
1071 ice_debug(hw, ICE_DBG_INIT, "Failed to enable FW logging.\n"); in ice_init_hw()
1111 ice_debug(hw, ICE_DBG_SCHED, "Failed to get scheduler allocated resources\n"); in ice_init_hw()
1143 ice_debug(hw, ICE_DBG_SCHED, "invalid sw entry point\n"); in ice_init_hw()
1253 ice_debug(hw, ICE_DBG_INIT, "Global reset polling failed to complete.\n"); in ice_check_reset()
1272 ice_debug(hw, ICE_DBG_INIT, "Global reset processes done. %d\n", cnt); in ice_check_reset()
1279 ice_debug(hw, ICE_DBG_INIT, "Wait for Reset Done timed out. GLNVM_ULD = 0x%x\n", in ice_check_reset()
1331 ice_debug(hw, ICE_DBG_INIT, "PF reset polling failed to complete.\n"); in ice_pf_reset()
1358 ice_debug(hw, ICE_DBG_INIT, "CoreR requested\n"); in ice_reset()
1362 ice_debug(hw, ICE_DBG_INIT, "GlobalR requested\n"); in ice_reset()
1401 ice_debug(hw, ICE_DBG_QCTX, "qrxdata[%d]: %08X\n", i, in ice_copy_rxq_ctx_to_hw()
1931 ice_debug(hw, ICE_DBG_RES, "resource %d acquire type %d failed.\n", res, access); in ice_acquire_res()
1949 ice_debug(hw, ICE_DBG_RES, "resource acquire timed out.\n"); in ice_acquire_res()
1954 ice_debug(hw, ICE_DBG_RES, "resource indicates no work to do.\n"); in ice_acquire_res()
1956 ice_debug(hw, ICE_DBG_RES, "Warning: -EALREADY not expected\n"); in ice_acquire_res()
2086 ice_debug(hw, ICE_DBG_SW, "CQ CMD Buffer:\n"); in ice_free_hw_res()
2141 ice_debug(hw, ICE_DBG_INIT, "%s: valid_functions (bitmap) = %d\n", prefix, in ice_parse_common_caps()
2146 ice_debug(hw, ICE_DBG_INIT, "%s: sr_iov_1_1 = %d\n", prefix, in ice_parse_common_caps()
2153 ice_debug(hw, ICE_DBG_INIT, "%s: dcb = %d\n", prefix, caps->dcb); in ice_parse_common_caps()
2154 ice_debug(hw, ICE_DBG_INIT, "%s: active_tc_bitmap = %d\n", prefix, in ice_parse_common_caps()
2156 ice_debug(hw, ICE_DBG_INIT, "%s: maxtc = %d\n", prefix, caps->maxtc); in ice_parse_common_caps()
2161 ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_size = %d\n", prefix, in ice_parse_common_caps()
2163 ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_entry_width = %d\n", prefix, in ice_parse_common_caps()
2169 ice_debug(hw, ICE_DBG_INIT, "%s: num_rxq = %d\n", prefix, in ice_parse_common_caps()
2171 ice_debug(hw, ICE_DBG_INIT, "%s: rxq_first_id = %d\n", prefix, in ice_parse_common_caps()
2177 ice_debug(hw, ICE_DBG_INIT, "%s: num_txq = %d\n", prefix, in ice_parse_common_caps()
2179 ice_debug(hw, ICE_DBG_INIT, "%s: txq_first_id = %d\n", prefix, in ice_parse_common_caps()
2185 ice_debug(hw, ICE_DBG_INIT, "%s: num_msix_vectors = %d\n", prefix, in ice_parse_common_caps()
2187 ice_debug(hw, ICE_DBG_INIT, "%s: msix_vector_first_id = %d\n", prefix, in ice_parse_common_caps()
2192 ice_debug(hw, ICE_DBG_INIT, "%s: update_pending_nvm\n", prefix); in ice_parse_common_caps()
2196 ice_debug(hw, ICE_DBG_INIT, "%s: update_pending_orom\n", prefix); in ice_parse_common_caps()
2200 ice_debug(hw, ICE_DBG_INIT, "%s: update_pending_netlist\n", prefix); in ice_parse_common_caps()
2206 ice_debug(hw, ICE_DBG_INIT, "%s: nvm_unified_update = %d\n", prefix, in ice_parse_common_caps()
2211 ice_debug(hw, ICE_DBG_INIT, "%s: rdma = %d\n", prefix, caps->rdma); in ice_parse_common_caps()
2215 ice_debug(hw, ICE_DBG_INIT, "%s: max_mtu = %d\n", in ice_parse_common_caps()
2220 ice_debug(hw, ICE_DBG_INIT, in ice_parse_common_caps()
2226 ice_debug(hw, ICE_DBG_INIT, in ice_parse_common_caps()
2256 ice_debug(hw, ICE_DBG_INIT, "reducing maxtc to %d (based on #ports)\n", in ice_recalc_port_limited_caps()
2259 ice_debug(hw, ICE_DBG_INIT, "forcing RDMA off\n"); in ice_recalc_port_limited_caps()
2288 ice_debug(hw, ICE_DBG_INIT, "func caps: num_allocd_vfs = %d\n", in ice_parse_vf_func_caps()
2290 ice_debug(hw, ICE_DBG_INIT, "func caps: vf_base_id = %d\n", in ice_parse_vf_func_caps()
2307 ice_debug(hw, ICE_DBG_INIT, "func caps: guar_num_vsi (fw) = %d\n", in ice_parse_vsi_func_caps()
2309 ice_debug(hw, ICE_DBG_INIT, "func caps: guar_num_vsi = %d\n", in ice_parse_vsi_func_caps()
2346 ice_debug(hw, ICE_DBG_INIT, "1588 func caps: unknown clock frequency %u\n", in ice_parse_1588_func_caps()
2351 ice_debug(hw, ICE_DBG_INIT, "func caps: ieee_1588 = %u\n", in ice_parse_1588_func_caps()
2353 ice_debug(hw, ICE_DBG_INIT, "func caps: src_tmr_owned = %u\n", in ice_parse_1588_func_caps()
2355 ice_debug(hw, ICE_DBG_INIT, "func caps: tmr_ena = %u\n", in ice_parse_1588_func_caps()
2357 ice_debug(hw, ICE_DBG_INIT, "func caps: tmr_index_owned = %u\n", in ice_parse_1588_func_caps()
2359 ice_debug(hw, ICE_DBG_INIT, "func caps: tmr_index_assoc = %u\n", in ice_parse_1588_func_caps()
2361 ice_debug(hw, ICE_DBG_INIT, "func caps: clk_freq = %u\n", in ice_parse_1588_func_caps()
2363 ice_debug(hw, ICE_DBG_INIT, "func caps: clk_src = %u\n", in ice_parse_1588_func_caps()
2388 ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_guar = %d\n", in ice_parse_fdir_func_caps()
2390 ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_best_effort = %d\n", in ice_parse_fdir_func_caps()
2442 ice_debug(hw, ICE_DBG_INIT, "func caps: unknown capability[%d]: 0x%x\n", in ice_parse_func_caps()
2466 ice_debug(hw, ICE_DBG_INIT, "dev caps: num_funcs = %d\n", in ice_parse_valid_functions_cap()
2485 ice_debug(hw, ICE_DBG_INIT, "dev_caps: num_vfs_exposed = %d\n", in ice_parse_vf_dev_caps()
2504 ice_debug(hw, ICE_DBG_INIT, "dev caps: num_vsi_allocd_to_host = %d\n", in ice_parse_vsi_dev_caps()
2541 ice_debug(hw, ICE_DBG_INIT, "dev caps: ieee_1588 = %u\n", in ice_parse_1588_dev_caps()
2543 ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr0_owner = %u\n", in ice_parse_1588_dev_caps()
2545 ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr0_owned = %u\n", in ice_parse_1588_dev_caps()
2547 ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr0_ena = %u\n", in ice_parse_1588_dev_caps()
2549 ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr1_owner = %u\n", in ice_parse_1588_dev_caps()
2551 ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr1_owned = %u\n", in ice_parse_1588_dev_caps()
2553 ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr1_ena = %u\n", in ice_parse_1588_dev_caps()
2555 ice_debug(hw, ICE_DBG_INIT, "dev caps: ts_ll_read = %u\n", in ice_parse_1588_dev_caps()
2557 ice_debug(hw, ICE_DBG_INIT, "dev caps: ieee_1588 ena_ports = %u\n", in ice_parse_1588_dev_caps()
2559 ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr_own_map = %u\n", in ice_parse_1588_dev_caps()
2578 ice_debug(hw, ICE_DBG_INIT, "dev caps: num_flow_director_fltr = %d\n", in ice_parse_fdir_dev_caps()
2633 ice_debug(hw, ICE_DBG_INIT, "dev caps: unknown capability[%d]: 0x%x\n", in ice_parse_dev_caps()
3138 ice_debug(hw, ICE_DBG_PHY, "Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\n", in ice_aq_set_phy_cfg()
3148 ice_debug(hw, ICE_DBG_LINK, "set phy cfg\n"); in ice_aq_set_phy_cfg()
3149 ice_debug(hw, ICE_DBG_LINK, " phy_type_low = 0x%llx\n", in ice_aq_set_phy_cfg()
3151 ice_debug(hw, ICE_DBG_LINK, " phy_type_high = 0x%llx\n", in ice_aq_set_phy_cfg()
3153 ice_debug(hw, ICE_DBG_LINK, " caps = 0x%x\n", cfg->caps); in ice_aq_set_phy_cfg()
3154 ice_debug(hw, ICE_DBG_LINK, " low_power_ctrl_an = 0x%x\n", in ice_aq_set_phy_cfg()
3156 ice_debug(hw, ICE_DBG_LINK, " eee_cap = 0x%x\n", cfg->eee_cap); in ice_aq_set_phy_cfg()
3157 ice_debug(hw, ICE_DBG_LINK, " eeer_value = 0x%x\n", cfg->eeer_value); in ice_aq_set_phy_cfg()
3158 ice_debug(hw, ICE_DBG_LINK, " link_fec_opt = 0x%x\n", in ice_aq_set_phy_cfg()
3582 ice_debug(pi->hw, ICE_DBG_LINK, "get link status error, status = %d\n", in ice_get_link_status()
3744 ice_debug(hw, ICE_DBG_PHY, "options: %x\n", *option_count); in ice_aq_get_port_options()
3752 ice_debug(hw, ICE_DBG_PHY, "active idx: %x\n", in ice_aq_get_port_options()
3763 ice_debug(hw, ICE_DBG_PHY, "pending idx: %x\n", in ice_aq_get_port_options()
3773 ice_debug(hw, ICE_DBG_PHY, "pmds: %x max speed: %x\n", in ice_aq_get_port_options()
4200 ice_debug(hw, ICE_DBG_SCHED, "VM%d disable failed %d\n", in ice_aq_dis_lan_txq()
4203 ice_debug(hw, ICE_DBG_SCHED, "disable queue %d failed %d\n", in ice_aq_dis_lan_txq()
4460 …ice_debug(hw, ICE_DBG_QCTX, "Field %d width of %d bits larger than size of %d byte(s) ... skipping… in ice_set_ctx()
4548 ice_debug(hw, ICE_DBG_SCHED, "Enaq: invalid queue handle %d\n", in ice_ena_vsi_txq()
4591 ice_debug(hw, ICE_DBG_SCHED, "enable queue %d failed %d\n", in ice_ena_vsi_txq()
4670 ice_debug(hw, ICE_DBG_SCHED, "invalid queue handle%d\n", in ice_dis_vsi_txq()
4675 ice_debug(hw, ICE_DBG_SCHED, "Err:handles %d %d\n", in ice_dis_vsi_txq()
4831 ice_debug(hw, ICE_DBG_RDMA, "add RDMA qset failed\n"); in ice_ena_vsi_rdma_qset()
5071 ice_debug(hw, ICE_DBG_SCHED, "query element failed\n"); in ice_sched_query_elem()
5360 ice_debug(hw, ICE_DBG_INIT, "Failed to read link override TLV.\n"); in ice_get_link_default_override()
5371 ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n"); in ice_get_link_default_override()
5382 ice_debug(hw, ICE_DBG_INIT, "Failed to read override phy config.\n"); in ice_get_link_default_override()
5392 ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n"); in ice_get_link_default_override()
5405 ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n"); in ice_get_link_default_override()