Lines Matching refs:icr0
4249 u32 icr0, icr0_remaining; in i40e_intr() local
4252 icr0 = rd32(hw, I40E_PFINT_ICR0); in i40e_intr()
4256 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0) in i40e_intr()
4260 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) || in i40e_intr()
4261 (icr0 & I40E_PFINT_ICR0_SWINT_MASK)) in i40e_intr()
4265 (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) { in i40e_intr()
4272 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) { in i40e_intr()
4286 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { in i40e_intr()
4292 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) { in i40e_intr()
4297 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) { in i40e_intr()
4310 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) { in i40e_intr()
4327 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) { in i40e_intr()
4328 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK; in i40e_intr()
4335 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) { in i40e_intr()
4344 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; in i40e_intr()
4351 icr0_remaining = icr0 & ena_mask; in i40e_intr()