3137 	u64 i_set = 0;  in i40e_get_rss_hash_opts()  local
3173 		i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,  in i40e_get_rss_hash_opts()
3180 	if (i_set) {  in i40e_get_rss_hash_opts()
3181 		if (i_set & I40E_L4_SRC_MASK)  in i40e_get_rss_hash_opts()
3183 		if (i_set & I40E_L4_DST_MASK)  in i40e_get_rss_hash_opts()
3189 				if (i_set & I40E_X722_L3_SRC_MASK)  in i40e_get_rss_hash_opts()
3191 				if (i_set & I40E_X722_L3_DST_MASK)  in i40e_get_rss_hash_opts()
3194 				if (i_set & I40E_L3_SRC_MASK)  in i40e_get_rss_hash_opts()
3196 				if (i_set & I40E_L3_DST_MASK)  in i40e_get_rss_hash_opts()
3201 			if (i_set & I40E_L3_V6_SRC_MASK)  in i40e_get_rss_hash_opts()
3203 			if (i_set & I40E_L3_V6_DST_MASK)  in i40e_get_rss_hash_opts()
3566 	u64 i_set = i_setc;  in i40e_get_rss_hash_bits()  local
3570 		i_set |= I40E_L4_SRC_MASK;  in i40e_get_rss_hash_bits()
3572 		i_set &= ~I40E_L4_SRC_MASK;  in i40e_get_rss_hash_bits()
3574 		i_set |= I40E_L4_DST_MASK;  in i40e_get_rss_hash_bits()
3576 		i_set &= ~I40E_L4_DST_MASK;  in i40e_get_rss_hash_bits()
3592 		return i_set;  in i40e_get_rss_hash_bits()
3596 		i_set |= src_l3;  in i40e_get_rss_hash_bits()
3598 		i_set &= ~src_l3;  in i40e_get_rss_hash_bits()
3600 		i_set |= dst_l3;  in i40e_get_rss_hash_bits()
3602 		i_set &= ~dst_l3;  in i40e_get_rss_hash_bits()
3604 	return i_set;  in i40e_get_rss_hash_bits()
3621 	u64 i_set, i_setc;  in i40e_set_rss_hash_opt()  local
3707 			i_set = i40e_get_rss_hash_bits(&pf->hw, nfc, i_setc);  in i40e_set_rss_hash_opt()
3710 					  (u32)i_set);  in i40e_set_rss_hash_opt()
3712 					  (u32)(i_set >> 32));  in i40e_set_rss_hash_opt()