Lines Matching full:hw
10 static void i40e_resume_aq(struct i40e_hw *hw);
14 * @hw: pointer to the hardware structure
18 static void i40e_adminq_init_regs(struct i40e_hw *hw) in i40e_adminq_init_regs() argument
21 if (i40e_is_vf(hw)) { in i40e_adminq_init_regs()
22 hw->aq.asq.tail = I40E_VF_ATQT1; in i40e_adminq_init_regs()
23 hw->aq.asq.head = I40E_VF_ATQH1; in i40e_adminq_init_regs()
24 hw->aq.asq.len = I40E_VF_ATQLEN1; in i40e_adminq_init_regs()
25 hw->aq.asq.bal = I40E_VF_ATQBAL1; in i40e_adminq_init_regs()
26 hw->aq.asq.bah = I40E_VF_ATQBAH1; in i40e_adminq_init_regs()
27 hw->aq.arq.tail = I40E_VF_ARQT1; in i40e_adminq_init_regs()
28 hw->aq.arq.head = I40E_VF_ARQH1; in i40e_adminq_init_regs()
29 hw->aq.arq.len = I40E_VF_ARQLEN1; in i40e_adminq_init_regs()
30 hw->aq.arq.bal = I40E_VF_ARQBAL1; in i40e_adminq_init_regs()
31 hw->aq.arq.bah = I40E_VF_ARQBAH1; in i40e_adminq_init_regs()
33 hw->aq.asq.tail = I40E_PF_ATQT; in i40e_adminq_init_regs()
34 hw->aq.asq.head = I40E_PF_ATQH; in i40e_adminq_init_regs()
35 hw->aq.asq.len = I40E_PF_ATQLEN; in i40e_adminq_init_regs()
36 hw->aq.asq.bal = I40E_PF_ATQBAL; in i40e_adminq_init_regs()
37 hw->aq.asq.bah = I40E_PF_ATQBAH; in i40e_adminq_init_regs()
38 hw->aq.arq.tail = I40E_PF_ARQT; in i40e_adminq_init_regs()
39 hw->aq.arq.head = I40E_PF_ARQH; in i40e_adminq_init_regs()
40 hw->aq.arq.len = I40E_PF_ARQLEN; in i40e_adminq_init_regs()
41 hw->aq.arq.bal = I40E_PF_ARQBAL; in i40e_adminq_init_regs()
42 hw->aq.arq.bah = I40E_PF_ARQBAH; in i40e_adminq_init_regs()
48 * @hw: pointer to the hardware structure
50 static i40e_status i40e_alloc_adminq_asq_ring(struct i40e_hw *hw) in i40e_alloc_adminq_asq_ring() argument
54 ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf, in i40e_alloc_adminq_asq_ring()
56 (hw->aq.num_asq_entries * in i40e_alloc_adminq_asq_ring()
62 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf, in i40e_alloc_adminq_asq_ring()
63 (hw->aq.num_asq_entries * in i40e_alloc_adminq_asq_ring()
66 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); in i40e_alloc_adminq_asq_ring()
75 * @hw: pointer to the hardware structure
77 static i40e_status i40e_alloc_adminq_arq_ring(struct i40e_hw *hw) in i40e_alloc_adminq_arq_ring() argument
81 ret_code = i40e_allocate_dma_mem(hw, &hw->aq.arq.desc_buf, in i40e_alloc_adminq_arq_ring()
83 (hw->aq.num_arq_entries * in i40e_alloc_adminq_arq_ring()
92 * @hw: pointer to the hardware structure
97 static void i40e_free_adminq_asq(struct i40e_hw *hw) in i40e_free_adminq_asq() argument
99 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); in i40e_free_adminq_asq()
104 * @hw: pointer to the hardware structure
109 static void i40e_free_adminq_arq(struct i40e_hw *hw) in i40e_free_adminq_arq() argument
111 i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf); in i40e_free_adminq_arq()
116 * @hw: pointer to the hardware structure
118 static i40e_status i40e_alloc_arq_bufs(struct i40e_hw *hw) in i40e_alloc_arq_bufs() argument
130 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.arq.dma_head, in i40e_alloc_arq_bufs()
131 (hw->aq.num_arq_entries * sizeof(struct i40e_dma_mem))); in i40e_alloc_arq_bufs()
134 hw->aq.arq.r.arq_bi = (struct i40e_dma_mem *)hw->aq.arq.dma_head.va; in i40e_alloc_arq_bufs()
137 for (i = 0; i < hw->aq.num_arq_entries; i++) { in i40e_alloc_arq_bufs()
138 bi = &hw->aq.arq.r.arq_bi[i]; in i40e_alloc_arq_bufs()
139 ret_code = i40e_allocate_dma_mem(hw, bi, in i40e_alloc_arq_bufs()
141 hw->aq.arq_buf_size, in i40e_alloc_arq_bufs()
147 desc = I40E_ADMINQ_DESC(hw->aq.arq, i); in i40e_alloc_arq_bufs()
150 if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF) in i40e_alloc_arq_bufs()
175 i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]); in i40e_alloc_arq_bufs()
176 i40e_free_virt_mem(hw, &hw->aq.arq.dma_head); in i40e_alloc_arq_bufs()
183 * @hw: pointer to the hardware structure
185 static i40e_status i40e_alloc_asq_bufs(struct i40e_hw *hw) in i40e_alloc_asq_bufs() argument
192 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.dma_head, in i40e_alloc_asq_bufs()
193 (hw->aq.num_asq_entries * sizeof(struct i40e_dma_mem))); in i40e_alloc_asq_bufs()
196 hw->aq.asq.r.asq_bi = (struct i40e_dma_mem *)hw->aq.asq.dma_head.va; in i40e_alloc_asq_bufs()
199 for (i = 0; i < hw->aq.num_asq_entries; i++) { in i40e_alloc_asq_bufs()
200 bi = &hw->aq.asq.r.asq_bi[i]; in i40e_alloc_asq_bufs()
201 ret_code = i40e_allocate_dma_mem(hw, bi, in i40e_alloc_asq_bufs()
203 hw->aq.asq_buf_size, in i40e_alloc_asq_bufs()
215 i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]); in i40e_alloc_asq_bufs()
216 i40e_free_virt_mem(hw, &hw->aq.asq.dma_head); in i40e_alloc_asq_bufs()
223 * @hw: pointer to the hardware structure
225 static void i40e_free_arq_bufs(struct i40e_hw *hw) in i40e_free_arq_bufs() argument
230 for (i = 0; i < hw->aq.num_arq_entries; i++) in i40e_free_arq_bufs()
231 i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]); in i40e_free_arq_bufs()
234 i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf); in i40e_free_arq_bufs()
237 i40e_free_virt_mem(hw, &hw->aq.arq.dma_head); in i40e_free_arq_bufs()
242 * @hw: pointer to the hardware structure
244 static void i40e_free_asq_bufs(struct i40e_hw *hw) in i40e_free_asq_bufs() argument
249 for (i = 0; i < hw->aq.num_asq_entries; i++) in i40e_free_asq_bufs()
250 if (hw->aq.asq.r.asq_bi[i].pa) in i40e_free_asq_bufs()
251 i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]); in i40e_free_asq_bufs()
254 i40e_free_virt_mem(hw, &hw->aq.asq.cmd_buf); in i40e_free_asq_bufs()
257 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); in i40e_free_asq_bufs()
260 i40e_free_virt_mem(hw, &hw->aq.asq.dma_head); in i40e_free_asq_bufs()
265 * @hw: pointer to the hardware structure
269 static i40e_status i40e_config_asq_regs(struct i40e_hw *hw) in i40e_config_asq_regs() argument
275 wr32(hw, hw->aq.asq.head, 0); in i40e_config_asq_regs()
276 wr32(hw, hw->aq.asq.tail, 0); in i40e_config_asq_regs()
279 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | in i40e_config_asq_regs()
281 wr32(hw, hw->aq.asq.bal, lower_32_bits(hw->aq.asq.desc_buf.pa)); in i40e_config_asq_regs()
282 wr32(hw, hw->aq.asq.bah, upper_32_bits(hw->aq.asq.desc_buf.pa)); in i40e_config_asq_regs()
285 reg = rd32(hw, hw->aq.asq.bal); in i40e_config_asq_regs()
286 if (reg != lower_32_bits(hw->aq.asq.desc_buf.pa)) in i40e_config_asq_regs()
294 * @hw: pointer to the hardware structure
298 static i40e_status i40e_config_arq_regs(struct i40e_hw *hw) in i40e_config_arq_regs() argument
304 wr32(hw, hw->aq.arq.head, 0); in i40e_config_arq_regs()
305 wr32(hw, hw->aq.arq.tail, 0); in i40e_config_arq_regs()
308 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | in i40e_config_arq_regs()
310 wr32(hw, hw->aq.arq.bal, lower_32_bits(hw->aq.arq.desc_buf.pa)); in i40e_config_arq_regs()
311 wr32(hw, hw->aq.arq.bah, upper_32_bits(hw->aq.arq.desc_buf.pa)); in i40e_config_arq_regs()
313 /* Update tail in the HW to post pre-allocated buffers */ in i40e_config_arq_regs()
314 wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1); in i40e_config_arq_regs()
317 reg = rd32(hw, hw->aq.arq.bal); in i40e_config_arq_regs()
318 if (reg != lower_32_bits(hw->aq.arq.desc_buf.pa)) in i40e_config_arq_regs()
326 * @hw: pointer to the hardware structure
330 * in the hw->aq structure:
331 * - hw->aq.num_asq_entries
332 * - hw->aq.arq_buf_size
337 static i40e_status i40e_init_asq(struct i40e_hw *hw) in i40e_init_asq() argument
341 if (hw->aq.asq.count > 0) { in i40e_init_asq()
348 if ((hw->aq.num_asq_entries == 0) || in i40e_init_asq()
349 (hw->aq.asq_buf_size == 0)) { in i40e_init_asq()
354 hw->aq.asq.next_to_use = 0; in i40e_init_asq()
355 hw->aq.asq.next_to_clean = 0; in i40e_init_asq()
358 ret_code = i40e_alloc_adminq_asq_ring(hw); in i40e_init_asq()
363 ret_code = i40e_alloc_asq_bufs(hw); in i40e_init_asq()
368 ret_code = i40e_config_asq_regs(hw); in i40e_init_asq()
373 hw->aq.asq.count = hw->aq.num_asq_entries; in i40e_init_asq()
377 i40e_free_adminq_asq(hw); in i40e_init_asq()
385 * @hw: pointer to the hardware structure
389 * in the hw->aq structure:
390 * - hw->aq.num_asq_entries
391 * - hw->aq.arq_buf_size
396 static i40e_status i40e_init_arq(struct i40e_hw *hw) in i40e_init_arq() argument
400 if (hw->aq.arq.count > 0) { in i40e_init_arq()
407 if ((hw->aq.num_arq_entries == 0) || in i40e_init_arq()
408 (hw->aq.arq_buf_size == 0)) { in i40e_init_arq()
413 hw->aq.arq.next_to_use = 0; in i40e_init_arq()
414 hw->aq.arq.next_to_clean = 0; in i40e_init_arq()
417 ret_code = i40e_alloc_adminq_arq_ring(hw); in i40e_init_arq()
422 ret_code = i40e_alloc_arq_bufs(hw); in i40e_init_arq()
427 ret_code = i40e_config_arq_regs(hw); in i40e_init_arq()
432 hw->aq.arq.count = hw->aq.num_arq_entries; in i40e_init_arq()
436 i40e_free_adminq_arq(hw); in i40e_init_arq()
444 * @hw: pointer to the hardware structure
448 static i40e_status i40e_shutdown_asq(struct i40e_hw *hw) in i40e_shutdown_asq() argument
452 mutex_lock(&hw->aq.asq_mutex); in i40e_shutdown_asq()
454 if (hw->aq.asq.count == 0) { in i40e_shutdown_asq()
460 wr32(hw, hw->aq.asq.head, 0); in i40e_shutdown_asq()
461 wr32(hw, hw->aq.asq.tail, 0); in i40e_shutdown_asq()
462 wr32(hw, hw->aq.asq.len, 0); in i40e_shutdown_asq()
463 wr32(hw, hw->aq.asq.bal, 0); in i40e_shutdown_asq()
464 wr32(hw, hw->aq.asq.bah, 0); in i40e_shutdown_asq()
466 hw->aq.asq.count = 0; /* to indicate uninitialized queue */ in i40e_shutdown_asq()
469 i40e_free_asq_bufs(hw); in i40e_shutdown_asq()
472 mutex_unlock(&hw->aq.asq_mutex); in i40e_shutdown_asq()
478 * @hw: pointer to the hardware structure
482 static i40e_status i40e_shutdown_arq(struct i40e_hw *hw) in i40e_shutdown_arq() argument
486 mutex_lock(&hw->aq.arq_mutex); in i40e_shutdown_arq()
488 if (hw->aq.arq.count == 0) { in i40e_shutdown_arq()
494 wr32(hw, hw->aq.arq.head, 0); in i40e_shutdown_arq()
495 wr32(hw, hw->aq.arq.tail, 0); in i40e_shutdown_arq()
496 wr32(hw, hw->aq.arq.len, 0); in i40e_shutdown_arq()
497 wr32(hw, hw->aq.arq.bal, 0); in i40e_shutdown_arq()
498 wr32(hw, hw->aq.arq.bah, 0); in i40e_shutdown_arq()
500 hw->aq.arq.count = 0; /* to indicate uninitialized queue */ in i40e_shutdown_arq()
503 i40e_free_arq_bufs(hw); in i40e_shutdown_arq()
506 mutex_unlock(&hw->aq.arq_mutex); in i40e_shutdown_arq()
511 * i40e_set_hw_flags - set HW flags
512 * @hw: pointer to the hardware structure
514 static void i40e_set_hw_flags(struct i40e_hw *hw) in i40e_set_hw_flags() argument
516 struct i40e_adminq_info *aq = &hw->aq; in i40e_set_hw_flags()
518 hw->flags = 0; in i40e_set_hw_flags()
520 switch (hw->mac.type) { in i40e_set_hw_flags()
525 hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE; in i40e_set_hw_flags()
526 hw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE; in i40e_set_hw_flags()
528 hw->flags |= I40E_HW_FLAG_802_1AD_CAPABLE; in i40e_set_hw_flags()
532 hw->flags |= I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE | in i40e_set_hw_flags()
538 hw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE; in i40e_set_hw_flags()
543 hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE; in i40e_set_hw_flags()
548 hw->flags |= I40E_HW_FLAG_X722_FEC_REQUEST_CAPABLE; in i40e_set_hw_flags()
559 hw->flags |= I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK; in i40e_set_hw_flags()
564 hw->flags |= I40E_HW_FLAG_FW_LLDP_PERSISTENT; in i40e_set_hw_flags()
565 hw->flags |= I40E_HW_FLAG_DROP_MODE; in i40e_set_hw_flags()
571 hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_EXTENDED; in i40e_set_hw_flags()
576 * @hw: pointer to the hardware structure
579 * in the hw->aq structure:
580 * - hw->aq.num_asq_entries
581 * - hw->aq.num_arq_entries
582 * - hw->aq.arq_buf_size
583 * - hw->aq.asq_buf_size
585 i40e_status i40e_init_adminq(struct i40e_hw *hw) in i40e_init_adminq() argument
593 if ((hw->aq.num_arq_entries == 0) || in i40e_init_adminq()
594 (hw->aq.num_asq_entries == 0) || in i40e_init_adminq()
595 (hw->aq.arq_buf_size == 0) || in i40e_init_adminq()
596 (hw->aq.asq_buf_size == 0)) { in i40e_init_adminq()
602 i40e_adminq_init_regs(hw); in i40e_init_adminq()
605 hw->aq.asq_cmd_timeout = I40E_ASQ_CMD_TIMEOUT; in i40e_init_adminq()
608 ret_code = i40e_init_asq(hw); in i40e_init_adminq()
613 ret_code = i40e_init_arq(hw); in i40e_init_adminq()
622 ret_code = i40e_aq_get_firmware_version(hw, in i40e_init_adminq()
623 &hw->aq.fw_maj_ver, in i40e_init_adminq()
624 &hw->aq.fw_min_ver, in i40e_init_adminq()
625 &hw->aq.fw_build, in i40e_init_adminq()
626 &hw->aq.api_maj_ver, in i40e_init_adminq()
627 &hw->aq.api_min_ver, in i40e_init_adminq()
633 i40e_resume_aq(hw); in i40e_init_adminq()
641 i40e_set_hw_flags(hw); in i40e_init_adminq()
644 i40e_read_nvm_word(hw, I40E_SR_NVM_DEV_STARTER_VERSION, in i40e_init_adminq()
645 &hw->nvm.version); in i40e_init_adminq()
646 i40e_read_nvm_word(hw, I40E_SR_NVM_EETRACK_LO, &eetrack_lo); in i40e_init_adminq()
647 i40e_read_nvm_word(hw, I40E_SR_NVM_EETRACK_HI, &eetrack_hi); in i40e_init_adminq()
648 hw->nvm.eetrack = (eetrack_hi << 16) | eetrack_lo; in i40e_init_adminq()
649 i40e_read_nvm_word(hw, I40E_SR_BOOT_CONFIG_PTR, &cfg_ptr); in i40e_init_adminq()
650 i40e_read_nvm_word(hw, (cfg_ptr + I40E_NVM_OEM_VER_OFF), in i40e_init_adminq()
652 i40e_read_nvm_word(hw, (cfg_ptr + (I40E_NVM_OEM_VER_OFF + 1)), in i40e_init_adminq()
654 hw->nvm.oem_ver = ((u32)oem_hi << 16) | oem_lo; in i40e_init_adminq()
656 if (hw->mac.type == I40E_MAC_XL710 && in i40e_init_adminq()
657 hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR && in i40e_init_adminq()
658 hw->aq.api_min_ver >= I40E_MINOR_VER_GET_LINK_INFO_XL710) { in i40e_init_adminq()
659 hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE; in i40e_init_adminq()
660 hw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE; in i40e_init_adminq()
662 if (hw->mac.type == I40E_MAC_X722 && in i40e_init_adminq()
663 hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR && in i40e_init_adminq()
664 hw->aq.api_min_ver >= I40E_MINOR_VER_FW_LLDP_STOPPABLE_X722) { in i40e_init_adminq()
665 hw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE; in i40e_init_adminq()
669 if (hw->aq.api_maj_ver > 1 || in i40e_init_adminq()
670 (hw->aq.api_maj_ver == 1 && in i40e_init_adminq()
671 hw->aq.api_min_ver >= 7)) in i40e_init_adminq()
672 hw->flags |= I40E_HW_FLAG_802_1AD_CAPABLE; in i40e_init_adminq()
674 if (hw->aq.api_maj_ver > I40E_FW_API_VERSION_MAJOR) { in i40e_init_adminq()
680 i40e_aq_release_resource(hw, I40E_NVM_RESOURCE_ID, 0, NULL); in i40e_init_adminq()
681 hw->nvm_release_on_done = false; in i40e_init_adminq()
682 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_init_adminq()
690 i40e_shutdown_arq(hw); in i40e_init_adminq()
692 i40e_shutdown_asq(hw); in i40e_init_adminq()
701 * @hw: pointer to the hardware structure
703 void i40e_shutdown_adminq(struct i40e_hw *hw) in i40e_shutdown_adminq() argument
705 if (i40e_check_asq_alive(hw)) in i40e_shutdown_adminq()
706 i40e_aq_queue_shutdown(hw, true); in i40e_shutdown_adminq()
708 i40e_shutdown_asq(hw); in i40e_shutdown_adminq()
709 i40e_shutdown_arq(hw); in i40e_shutdown_adminq()
711 if (hw->nvm_buff.va) in i40e_shutdown_adminq()
712 i40e_free_virt_mem(hw, &hw->nvm_buff); in i40e_shutdown_adminq()
717 * @hw: pointer to the hardware structure
721 static u16 i40e_clean_asq(struct i40e_hw *hw) in i40e_clean_asq() argument
723 struct i40e_adminq_ring *asq = &(hw->aq.asq); in i40e_clean_asq()
731 while (rd32(hw, hw->aq.asq.head) != ntc) { in i40e_clean_asq()
732 i40e_debug(hw, I40E_DEBUG_AQ_COMMAND, in i40e_clean_asq()
733 "ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head)); in i40e_clean_asq()
739 cb_func(hw, &desc_cb); in i40e_clean_asq()
757 * @hw: pointer to the hw struct
762 static bool i40e_asq_done(struct i40e_hw *hw) in i40e_asq_done() argument
767 return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use; in i40e_asq_done()
773 * @hw: pointer to the hw struct
784 i40e_asq_send_command_atomic_exec(struct i40e_hw *hw, in i40e_asq_send_command_atomic_exec() argument
799 if (hw->aq.asq.count == 0) { in i40e_asq_send_command_atomic_exec()
800 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, in i40e_asq_send_command_atomic_exec()
806 hw->aq.asq_last_status = I40E_AQ_RC_OK; in i40e_asq_send_command_atomic_exec()
808 val = rd32(hw, hw->aq.asq.head); in i40e_asq_send_command_atomic_exec()
809 if (val >= hw->aq.num_asq_entries) { in i40e_asq_send_command_atomic_exec()
810 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, in i40e_asq_send_command_atomic_exec()
816 details = I40E_ADMINQ_DETAILS(hw->aq.asq, hw->aq.asq.next_to_use); in i40e_asq_send_command_atomic_exec()
838 if (buff_size > hw->aq.asq_buf_size) { in i40e_asq_send_command_atomic_exec()
839 i40e_debug(hw, in i40e_asq_send_command_atomic_exec()
848 i40e_debug(hw, in i40e_asq_send_command_atomic_exec()
862 if (i40e_clean_asq(hw) == 0) { in i40e_asq_send_command_atomic_exec()
863 i40e_debug(hw, in i40e_asq_send_command_atomic_exec()
871 desc_on_ring = I40E_ADMINQ_DESC(hw->aq.asq, hw->aq.asq.next_to_use); in i40e_asq_send_command_atomic_exec()
878 dma_buff = &(hw->aq.asq.r.asq_bi[hw->aq.asq.next_to_use]); in i40e_asq_send_command_atomic_exec()
893 i40e_debug(hw, I40E_DEBUG_AQ_COMMAND, "AQTX: desc and buffer:\n"); in i40e_asq_send_command_atomic_exec()
894 i40e_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc_on_ring, in i40e_asq_send_command_atomic_exec()
896 (hw->aq.asq.next_to_use)++; in i40e_asq_send_command_atomic_exec()
897 if (hw->aq.asq.next_to_use == hw->aq.asq.count) in i40e_asq_send_command_atomic_exec()
898 hw->aq.asq.next_to_use = 0; in i40e_asq_send_command_atomic_exec()
900 wr32(hw, hw->aq.asq.tail, hw->aq.asq.next_to_use); in i40e_asq_send_command_atomic_exec()
912 if (i40e_asq_done(hw)) in i40e_asq_send_command_atomic_exec()
921 } while (total_delay < hw->aq.asq_cmd_timeout); in i40e_asq_send_command_atomic_exec()
925 if (i40e_asq_done(hw)) { in i40e_asq_send_command_atomic_exec()
931 i40e_debug(hw, in i40e_asq_send_command_atomic_exec()
946 hw->aq.asq_last_status = (enum i40e_admin_queue_err)retval; in i40e_asq_send_command_atomic_exec()
949 i40e_debug(hw, I40E_DEBUG_AQ_COMMAND, in i40e_asq_send_command_atomic_exec()
951 i40e_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc, buff, buff_size); in i40e_asq_send_command_atomic_exec()
960 if (rd32(hw, hw->aq.asq.len) & I40E_GL_ATQLEN_ATQCRIT_MASK) { in i40e_asq_send_command_atomic_exec()
961 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, in i40e_asq_send_command_atomic_exec()
965 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, in i40e_asq_send_command_atomic_exec()
977 * @hw: pointer to the hw struct
988 i40e_asq_send_command_atomic(struct i40e_hw *hw, in i40e_asq_send_command_atomic() argument
997 mutex_lock(&hw->aq.asq_mutex); in i40e_asq_send_command_atomic()
998 status = i40e_asq_send_command_atomic_exec(hw, desc, buff, buff_size, in i40e_asq_send_command_atomic()
1002 mutex_unlock(&hw->aq.asq_mutex); in i40e_asq_send_command_atomic()
1007 i40e_asq_send_command(struct i40e_hw *hw, struct i40e_aq_desc *desc, in i40e_asq_send_command() argument
1011 return i40e_asq_send_command_atomic(hw, desc, buff, buff_size, in i40e_asq_send_command()
1017 * @hw: pointer to the hw struct
1027 * to avoid race conditions in access to hw->aq.asq_last_status.
1030 i40e_asq_send_command_atomic_v2(struct i40e_hw *hw, in i40e_asq_send_command_atomic_v2() argument
1040 mutex_lock(&hw->aq.asq_mutex); in i40e_asq_send_command_atomic_v2()
1041 status = i40e_asq_send_command_atomic_exec(hw, desc, buff, in i40e_asq_send_command_atomic_v2()
1046 *aq_status = hw->aq.asq_last_status; in i40e_asq_send_command_atomic_v2()
1047 mutex_unlock(&hw->aq.asq_mutex); in i40e_asq_send_command_atomic_v2()
1052 i40e_asq_send_command_v2(struct i40e_hw *hw, struct i40e_aq_desc *desc, in i40e_asq_send_command_v2() argument
1057 return i40e_asq_send_command_atomic_v2(hw, desc, buff, buff_size, in i40e_asq_send_command_v2()
1079 * @hw: pointer to the hw struct
1087 i40e_status i40e_clean_arq_element(struct i40e_hw *hw, in i40e_clean_arq_element() argument
1092 u16 ntc = hw->aq.arq.next_to_clean; in i40e_clean_arq_element()
1104 mutex_lock(&hw->aq.arq_mutex); in i40e_clean_arq_element()
1106 if (hw->aq.arq.count == 0) { in i40e_clean_arq_element()
1107 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, in i40e_clean_arq_element()
1114 ntu = rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK; in i40e_clean_arq_element()
1122 desc = I40E_ADMINQ_DESC(hw->aq.arq, ntc); in i40e_clean_arq_element()
1125 hw->aq.arq_last_status = in i40e_clean_arq_element()
1130 i40e_debug(hw, in i40e_clean_arq_element()
1133 hw->aq.arq_last_status); in i40e_clean_arq_element()
1140 memcpy(e->msg_buf, hw->aq.arq.r.arq_bi[desc_idx].va, in i40e_clean_arq_element()
1143 i40e_debug(hw, I40E_DEBUG_AQ_COMMAND, "AQRX: desc and buffer:\n"); in i40e_clean_arq_element()
1144 i40e_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc, e->msg_buf, in i40e_clean_arq_element()
1145 hw->aq.arq_buf_size); in i40e_clean_arq_element()
1151 bi = &hw->aq.arq.r.arq_bi[ntc]; in i40e_clean_arq_element()
1155 if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF) in i40e_clean_arq_element()
1162 wr32(hw, hw->aq.arq.tail, ntc); in i40e_clean_arq_element()
1165 if (ntc == hw->aq.num_arq_entries) in i40e_clean_arq_element()
1167 hw->aq.arq.next_to_clean = ntc; in i40e_clean_arq_element()
1168 hw->aq.arq.next_to_use = ntu; in i40e_clean_arq_element()
1170 i40e_nvmupd_check_wait_event(hw, le16_to_cpu(e->desc.opcode), &e->desc); in i40e_clean_arq_element()
1174 *pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc); in i40e_clean_arq_element()
1176 mutex_unlock(&hw->aq.arq_mutex); in i40e_clean_arq_element()
1181 static void i40e_resume_aq(struct i40e_hw *hw) in i40e_resume_aq() argument
1184 hw->aq.asq.next_to_use = 0; in i40e_resume_aq()
1185 hw->aq.asq.next_to_clean = 0; in i40e_resume_aq()
1187 i40e_config_asq_regs(hw); in i40e_resume_aq()
1189 hw->aq.arq.next_to_use = 0; in i40e_resume_aq()
1190 hw->aq.arq.next_to_clean = 0; in i40e_resume_aq()
1192 i40e_config_arq_regs(hw); in i40e_resume_aq()