Lines Matching refs:mal
32 int mal_register_commac(struct mal_instance *mal, struct mal_commac *commac) in mal_register_commac() argument
36 spin_lock_irqsave(&mal->lock, flags); in mal_register_commac()
38 MAL_DBG(mal, "reg(%08x, %08x)" NL, in mal_register_commac()
42 if ((mal->tx_chan_mask & commac->tx_chan_mask) || in mal_register_commac()
43 (mal->rx_chan_mask & commac->rx_chan_mask)) { in mal_register_commac()
44 spin_unlock_irqrestore(&mal->lock, flags); in mal_register_commac()
46 mal->index); in mal_register_commac()
50 if (list_empty(&mal->list)) in mal_register_commac()
51 napi_enable(&mal->napi); in mal_register_commac()
52 mal->tx_chan_mask |= commac->tx_chan_mask; in mal_register_commac()
53 mal->rx_chan_mask |= commac->rx_chan_mask; in mal_register_commac()
54 list_add(&commac->list, &mal->list); in mal_register_commac()
56 spin_unlock_irqrestore(&mal->lock, flags); in mal_register_commac()
61 void mal_unregister_commac(struct mal_instance *mal, in mal_unregister_commac() argument
66 spin_lock_irqsave(&mal->lock, flags); in mal_unregister_commac()
68 MAL_DBG(mal, "unreg(%08x, %08x)" NL, in mal_unregister_commac()
71 mal->tx_chan_mask &= ~commac->tx_chan_mask; in mal_unregister_commac()
72 mal->rx_chan_mask &= ~commac->rx_chan_mask; in mal_unregister_commac()
74 if (list_empty(&mal->list)) in mal_unregister_commac()
75 napi_disable(&mal->napi); in mal_unregister_commac()
77 spin_unlock_irqrestore(&mal->lock, flags); in mal_unregister_commac()
80 int mal_set_rcbs(struct mal_instance *mal, int channel, unsigned long size) in mal_set_rcbs() argument
82 BUG_ON(channel < 0 || channel >= mal->num_rx_chans || in mal_set_rcbs()
85 MAL_DBG(mal, "set_rbcs(%d, %lu)" NL, channel, size); in mal_set_rcbs()
90 mal->index, size, channel); in mal_set_rcbs()
94 set_mal_dcrn(mal, MAL_RCBS(channel), size >> 4); in mal_set_rcbs()
98 int mal_tx_bd_offset(struct mal_instance *mal, int channel) in mal_tx_bd_offset() argument
100 BUG_ON(channel < 0 || channel >= mal->num_tx_chans); in mal_tx_bd_offset()
105 int mal_rx_bd_offset(struct mal_instance *mal, int channel) in mal_rx_bd_offset() argument
107 BUG_ON(channel < 0 || channel >= mal->num_rx_chans); in mal_rx_bd_offset()
108 return mal->num_tx_chans * NUM_TX_BUFF + channel * NUM_RX_BUFF; in mal_rx_bd_offset()
111 void mal_enable_tx_channel(struct mal_instance *mal, int channel) in mal_enable_tx_channel() argument
115 spin_lock_irqsave(&mal->lock, flags); in mal_enable_tx_channel()
117 MAL_DBG(mal, "enable_tx(%d)" NL, channel); in mal_enable_tx_channel()
119 set_mal_dcrn(mal, MAL_TXCASR, in mal_enable_tx_channel()
120 get_mal_dcrn(mal, MAL_TXCASR) | MAL_CHAN_MASK(channel)); in mal_enable_tx_channel()
122 spin_unlock_irqrestore(&mal->lock, flags); in mal_enable_tx_channel()
125 void mal_disable_tx_channel(struct mal_instance *mal, int channel) in mal_disable_tx_channel() argument
127 set_mal_dcrn(mal, MAL_TXCARR, MAL_CHAN_MASK(channel)); in mal_disable_tx_channel()
129 MAL_DBG(mal, "disable_tx(%d)" NL, channel); in mal_disable_tx_channel()
132 void mal_enable_rx_channel(struct mal_instance *mal, int channel) in mal_enable_rx_channel() argument
144 spin_lock_irqsave(&mal->lock, flags); in mal_enable_rx_channel()
146 MAL_DBG(mal, "enable_rx(%d)" NL, channel); in mal_enable_rx_channel()
148 set_mal_dcrn(mal, MAL_RXCASR, in mal_enable_rx_channel()
149 get_mal_dcrn(mal, MAL_RXCASR) | MAL_CHAN_MASK(channel)); in mal_enable_rx_channel()
151 spin_unlock_irqrestore(&mal->lock, flags); in mal_enable_rx_channel()
154 void mal_disable_rx_channel(struct mal_instance *mal, int channel) in mal_disable_rx_channel() argument
164 set_mal_dcrn(mal, MAL_RXCARR, MAL_CHAN_MASK(channel)); in mal_disable_rx_channel()
166 MAL_DBG(mal, "disable_rx(%d)" NL, channel); in mal_disable_rx_channel()
169 void mal_poll_add(struct mal_instance *mal, struct mal_commac *commac) in mal_poll_add() argument
173 spin_lock_irqsave(&mal->lock, flags); in mal_poll_add()
175 MAL_DBG(mal, "poll_add(%p)" NL, commac); in mal_poll_add()
180 list_add_tail(&commac->poll_list, &mal->poll_list); in mal_poll_add()
182 spin_unlock_irqrestore(&mal->lock, flags); in mal_poll_add()
185 void mal_poll_del(struct mal_instance *mal, struct mal_commac *commac) in mal_poll_del() argument
189 spin_lock_irqsave(&mal->lock, flags); in mal_poll_del()
191 MAL_DBG(mal, "poll_del(%p)" NL, commac); in mal_poll_del()
195 spin_unlock_irqrestore(&mal->lock, flags); in mal_poll_del()
199 static inline void mal_enable_eob_irq(struct mal_instance *mal) in mal_enable_eob_irq() argument
201 MAL_DBG2(mal, "enable_irq" NL); in mal_enable_eob_irq()
204 set_mal_dcrn(mal, MAL_CFG, get_mal_dcrn(mal, MAL_CFG) | MAL_CFG_EOPIE); in mal_enable_eob_irq()
208 static inline void mal_disable_eob_irq(struct mal_instance *mal) in mal_disable_eob_irq() argument
211 set_mal_dcrn(mal, MAL_CFG, get_mal_dcrn(mal, MAL_CFG) & ~MAL_CFG_EOPIE); in mal_disable_eob_irq()
213 MAL_DBG2(mal, "disable_irq" NL); in mal_disable_eob_irq()
218 struct mal_instance *mal = dev_instance; in mal_serr() local
220 u32 esr = get_mal_dcrn(mal, MAL_ESR); in mal_serr()
223 set_mal_dcrn(mal, MAL_ESR, esr); in mal_serr()
225 MAL_DBG(mal, "SERR %08x" NL, esr); in mal_serr()
243 mal->index, esr); in mal_serr()
253 mal->index, esr); in mal_serr()
258 static inline void mal_schedule_poll(struct mal_instance *mal) in mal_schedule_poll() argument
260 if (likely(napi_schedule_prep(&mal->napi))) { in mal_schedule_poll()
261 MAL_DBG2(mal, "schedule_poll" NL); in mal_schedule_poll()
262 spin_lock(&mal->lock); in mal_schedule_poll()
263 mal_disable_eob_irq(mal); in mal_schedule_poll()
264 spin_unlock(&mal->lock); in mal_schedule_poll()
265 __napi_schedule(&mal->napi); in mal_schedule_poll()
267 MAL_DBG2(mal, "already in poll" NL); in mal_schedule_poll()
272 struct mal_instance *mal = dev_instance; in mal_txeob() local
274 u32 r = get_mal_dcrn(mal, MAL_TXEOBISR); in mal_txeob()
276 MAL_DBG2(mal, "txeob %08x" NL, r); in mal_txeob()
278 mal_schedule_poll(mal); in mal_txeob()
279 set_mal_dcrn(mal, MAL_TXEOBISR, r); in mal_txeob()
282 if (mal_has_feature(mal, MAL_FTR_CLEAR_ICINTSTAT)) in mal_txeob()
292 struct mal_instance *mal = dev_instance; in mal_rxeob() local
294 u32 r = get_mal_dcrn(mal, MAL_RXEOBISR); in mal_rxeob()
296 MAL_DBG2(mal, "rxeob %08x" NL, r); in mal_rxeob()
298 mal_schedule_poll(mal); in mal_rxeob()
299 set_mal_dcrn(mal, MAL_RXEOBISR, r); in mal_rxeob()
302 if (mal_has_feature(mal, MAL_FTR_CLEAR_ICINTSTAT)) in mal_rxeob()
312 struct mal_instance *mal = dev_instance; in mal_txde() local
314 u32 deir = get_mal_dcrn(mal, MAL_TXDEIR); in mal_txde()
315 set_mal_dcrn(mal, MAL_TXDEIR, deir); in mal_txde()
317 MAL_DBG(mal, "txde %08x" NL, deir); in mal_txde()
322 mal->index, deir); in mal_txde()
329 struct mal_instance *mal = dev_instance; in mal_rxde() local
332 u32 deir = get_mal_dcrn(mal, MAL_RXDEIR); in mal_rxde()
334 MAL_DBG(mal, "rxde %08x" NL, deir); in mal_rxde()
336 list_for_each(l, &mal->list) { in mal_rxde()
344 mal_schedule_poll(mal); in mal_rxde()
345 set_mal_dcrn(mal, MAL_RXDEIR, deir); in mal_rxde()
352 struct mal_instance *mal = dev_instance; in mal_int() local
353 u32 esr = get_mal_dcrn(mal, MAL_ESR); in mal_int()
369 void mal_poll_disable(struct mal_instance *mal, struct mal_commac *commac) in mal_poll_disable() argument
376 napi_synchronize(&mal->napi); in mal_poll_disable()
379 void mal_poll_enable(struct mal_instance *mal, struct mal_commac *commac) in mal_poll_enable() argument
389 napi_schedule(&mal->napi); in mal_poll_enable()
394 struct mal_instance *mal = container_of(napi, struct mal_instance, napi); in mal_poll() local
399 MAL_DBG2(mal, "poll(%d)" NL, budget); in mal_poll()
402 list_for_each(l, &mal->poll_list) { in mal_poll()
413 list_for_each(l, &mal->poll_list) { in mal_poll()
429 spin_lock_irqsave(&mal->lock, flags); in mal_poll()
430 mal_enable_eob_irq(mal); in mal_poll()
431 spin_unlock_irqrestore(&mal->lock, flags); in mal_poll()
435 list_for_each(l, &mal->poll_list) { in mal_poll()
442 MAL_DBG2(mal, "rotting packet" NL); in mal_poll()
446 spin_lock_irqsave(&mal->lock, flags); in mal_poll()
447 mal_disable_eob_irq(mal); in mal_poll()
448 spin_unlock_irqrestore(&mal->lock, flags); in mal_poll()
454 MAL_DBG2(mal, "poll() %d <- %d" NL, budget, received); in mal_poll()
458 static void mal_reset(struct mal_instance *mal) in mal_reset() argument
462 MAL_DBG(mal, "reset" NL); in mal_reset()
464 set_mal_dcrn(mal, MAL_CFG, MAL_CFG_SR); in mal_reset()
467 while ((get_mal_dcrn(mal, MAL_CFG) & MAL_CFG_SR) && n) in mal_reset()
471 printk(KERN_ERR "mal%d: reset timeout\n", mal->index); in mal_reset()
474 int mal_get_regs_len(struct mal_instance *mal) in mal_get_regs_len() argument
480 void *mal_dump_regs(struct mal_instance *mal, void *buf) in mal_dump_regs() argument
486 hdr->version = mal->version; in mal_dump_regs()
487 hdr->index = mal->index; in mal_dump_regs()
489 regs->tx_count = mal->num_tx_chans; in mal_dump_regs()
490 regs->rx_count = mal->num_rx_chans; in mal_dump_regs()
492 regs->cfg = get_mal_dcrn(mal, MAL_CFG); in mal_dump_regs()
493 regs->esr = get_mal_dcrn(mal, MAL_ESR); in mal_dump_regs()
494 regs->ier = get_mal_dcrn(mal, MAL_IER); in mal_dump_regs()
495 regs->tx_casr = get_mal_dcrn(mal, MAL_TXCASR); in mal_dump_regs()
496 regs->tx_carr = get_mal_dcrn(mal, MAL_TXCARR); in mal_dump_regs()
497 regs->tx_eobisr = get_mal_dcrn(mal, MAL_TXEOBISR); in mal_dump_regs()
498 regs->tx_deir = get_mal_dcrn(mal, MAL_TXDEIR); in mal_dump_regs()
499 regs->rx_casr = get_mal_dcrn(mal, MAL_RXCASR); in mal_dump_regs()
500 regs->rx_carr = get_mal_dcrn(mal, MAL_RXCARR); in mal_dump_regs()
501 regs->rx_eobisr = get_mal_dcrn(mal, MAL_RXEOBISR); in mal_dump_regs()
502 regs->rx_deir = get_mal_dcrn(mal, MAL_RXDEIR); in mal_dump_regs()
505 regs->tx_ctpr[i] = get_mal_dcrn(mal, MAL_TXCTPR(i)); in mal_dump_regs()
508 regs->rx_ctpr[i] = get_mal_dcrn(mal, MAL_RXCTPR(i)); in mal_dump_regs()
509 regs->rcbs[i] = get_mal_dcrn(mal, MAL_RCBS(i)); in mal_dump_regs()
516 struct mal_instance *mal; in mal_probe() local
525 mal = kzalloc(sizeof(struct mal_instance), GFP_KERNEL); in mal_probe()
526 if (!mal) in mal_probe()
529 mal->index = index; in mal_probe()
530 mal->ofdev = ofdev; in mal_probe()
531 mal->version = of_device_is_compatible(ofdev->dev.of_node, "ibm,mcmal2") ? 2 : 1; in mal_probe()
533 MAL_DBG(mal, "probe" NL); in mal_probe()
543 mal->num_tx_chans = prop[0]; in mal_probe()
553 mal->num_rx_chans = prop[0]; in mal_probe()
562 mal->dcr_host = dcr_map(ofdev->dev.of_node, dcr_base, 0x100); in mal_probe()
563 if (!DCR_MAP_OK(mal->dcr_host)) { in mal_probe()
573 mal->features |= (MAL_FTR_CLEAR_ICINTSTAT | in mal_probe()
583 mal->txeob_irq = irq_of_parse_and_map(ofdev->dev.of_node, 0); in mal_probe()
584 mal->rxeob_irq = irq_of_parse_and_map(ofdev->dev.of_node, 1); in mal_probe()
585 mal->serr_irq = irq_of_parse_and_map(ofdev->dev.of_node, 2); in mal_probe()
587 if (mal_has_feature(mal, MAL_FTR_COMMON_ERR_INT)) { in mal_probe()
588 mal->txde_irq = mal->rxde_irq = mal->serr_irq; in mal_probe()
590 mal->txde_irq = irq_of_parse_and_map(ofdev->dev.of_node, 3); in mal_probe()
591 mal->rxde_irq = irq_of_parse_and_map(ofdev->dev.of_node, 4); in mal_probe()
594 if (!mal->txeob_irq || !mal->rxeob_irq || !mal->serr_irq || in mal_probe()
595 !mal->txde_irq || !mal->rxde_irq) { in mal_probe()
602 INIT_LIST_HEAD(&mal->poll_list); in mal_probe()
603 INIT_LIST_HEAD(&mal->list); in mal_probe()
604 spin_lock_init(&mal->lock); in mal_probe()
606 init_dummy_netdev(&mal->dummy_dev); in mal_probe()
608 netif_napi_add_weight(&mal->dummy_dev, &mal->napi, mal_poll, in mal_probe()
612 mal_reset(mal); in mal_probe()
615 cfg = (mal->version == 2) ? MAL2_CFG_DEFAULT : MAL1_CFG_DEFAULT; in mal_probe()
625 set_mal_dcrn(mal, MAL_CFG, cfg); in mal_probe()
628 BUG_ON(mal->num_tx_chans <= 0 || mal->num_tx_chans > 32); in mal_probe()
629 BUG_ON(mal->num_rx_chans <= 0 || mal->num_rx_chans > 32); in mal_probe()
632 (NUM_TX_BUFF * mal->num_tx_chans + in mal_probe()
633 NUM_RX_BUFF * mal->num_rx_chans); in mal_probe()
634 mal->bd_virt = dma_alloc_coherent(&ofdev->dev, bd_size, &mal->bd_dma, in mal_probe()
636 if (mal->bd_virt == NULL) { in mal_probe()
641 for (i = 0; i < mal->num_tx_chans; ++i) in mal_probe()
642 set_mal_dcrn(mal, MAL_TXCTPR(i), mal->bd_dma + in mal_probe()
644 mal_tx_bd_offset(mal, i)); in mal_probe()
646 for (i = 0; i < mal->num_rx_chans; ++i) in mal_probe()
647 set_mal_dcrn(mal, MAL_RXCTPR(i), mal->bd_dma + in mal_probe()
649 mal_rx_bd_offset(mal, i)); in mal_probe()
651 if (mal_has_feature(mal, MAL_FTR_COMMON_ERR_INT)) { in mal_probe()
661 err = request_irq(mal->serr_irq, hdlr_serr, irqflags, "MAL SERR", mal); in mal_probe()
664 err = request_irq(mal->txde_irq, hdlr_txde, irqflags, "MAL TX DE", mal); in mal_probe()
667 err = request_irq(mal->txeob_irq, mal_txeob, 0, "MAL TX EOB", mal); in mal_probe()
670 err = request_irq(mal->rxde_irq, hdlr_rxde, irqflags, "MAL RX DE", mal); in mal_probe()
673 err = request_irq(mal->rxeob_irq, mal_rxeob, 0, "MAL RX EOB", mal); in mal_probe()
678 set_mal_dcrn(mal, MAL_IER, MAL_IER_EVENTS); in mal_probe()
681 mal_enable_eob_irq(mal); in mal_probe()
685 mal->version, ofdev->dev.of_node, in mal_probe()
686 mal->num_tx_chans, mal->num_rx_chans); in mal_probe()
690 platform_set_drvdata(ofdev, mal); in mal_probe()
695 free_irq(mal->rxde_irq, mal); in mal_probe()
697 free_irq(mal->txeob_irq, mal); in mal_probe()
699 free_irq(mal->txde_irq, mal); in mal_probe()
701 free_irq(mal->serr_irq, mal); in mal_probe()
703 dma_free_coherent(&ofdev->dev, bd_size, mal->bd_virt, mal->bd_dma); in mal_probe()
705 dcr_unmap(mal->dcr_host, 0x100); in mal_probe()
707 kfree(mal); in mal_probe()
714 struct mal_instance *mal = platform_get_drvdata(ofdev); in mal_remove() local
716 MAL_DBG(mal, "remove" NL); in mal_remove()
719 napi_disable(&mal->napi); in mal_remove()
721 if (!list_empty(&mal->list)) in mal_remove()
725 mal->index); in mal_remove()
727 free_irq(mal->serr_irq, mal); in mal_remove()
728 free_irq(mal->txde_irq, mal); in mal_remove()
729 free_irq(mal->txeob_irq, mal); in mal_remove()
730 free_irq(mal->rxde_irq, mal); in mal_remove()
731 free_irq(mal->rxeob_irq, mal); in mal_remove()
733 mal_reset(mal); in mal_remove()
737 (NUM_TX_BUFF * mal->num_tx_chans + in mal_remove()
738 NUM_RX_BUFF * mal->num_rx_chans), mal->bd_virt, in mal_remove()
739 mal->bd_dma); in mal_remove()
740 kfree(mal); in mal_remove()