Lines Matching +full:cmd +full:- +full:db
1 // SPDX-License-Identifier: GPL-2.0-or-later
27 #include <linux/dma-mapping.h>
38 /* Board/System/Debug information/definition ---------------- */
45 #define TX_FREE_DESC_CNT (TX_DESC_CNT - 2) /* Max TX packet count */
46 #define TX_WAKE_DESC_CNT (TX_DESC_CNT - 3) /* TX wakeup count */
75 #define ULI526X_TX_TIMEOUT ((16*HZ)/2) /* tx packet time-out time 8 s" */
76 #define ULI526X_TX_KICK (4*HZ/2) /* tx packet Kick-out time 2 s" */
105 /* Structure/enum declaration ------------------------------- */
196 /* Global variable declaration ----------------------------- */
206 /* function declaration ------------------------------------- */
226 static void phy_write_1bit(struct uli526x_board_info *db, u32);
227 static u16 phy_read_1bit(struct uli526x_board_info *db);
239 static void srom_clk_write(struct uli526x_board_info *db, u32 data) in srom_clk_write() argument
241 void __iomem *ioaddr = db->ioaddr; in srom_clk_write()
251 /* ULI526X network board routine ---------------------------- */
272 struct uli526x_board_info *db; /* board information structure */ in uli526x_init_one() local
281 dev = alloc_etherdev(sizeof(*db)); in uli526x_init_one()
283 return -ENOMEM; in uli526x_init_one()
284 SET_NETDEV_DEV(dev, &pdev->dev); in uli526x_init_one()
286 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) { in uli526x_init_one()
287 pr_warn("32-bit PCI DMA not available\n"); in uli526x_init_one()
288 err = -ENODEV; in uli526x_init_one()
299 err = -ENODEV; in uli526x_init_one()
305 err = -ENODEV; in uli526x_init_one()
316 db = netdev_priv(dev); in uli526x_init_one()
319 err = -ENOMEM; in uli526x_init_one()
321 db->desc_pool_ptr = dma_alloc_coherent(&pdev->dev, in uli526x_init_one()
323 &db->desc_pool_dma_ptr, GFP_KERNEL); in uli526x_init_one()
324 if (!db->desc_pool_ptr) in uli526x_init_one()
327 db->buf_pool_ptr = dma_alloc_coherent(&pdev->dev, in uli526x_init_one()
329 &db->buf_pool_dma_ptr, GFP_KERNEL); in uli526x_init_one()
330 if (!db->buf_pool_ptr) in uli526x_init_one()
333 db->first_tx_desc = (struct tx_desc *) db->desc_pool_ptr; in uli526x_init_one()
334 db->first_tx_desc_dma = db->desc_pool_dma_ptr; in uli526x_init_one()
335 db->buf_pool_start = db->buf_pool_ptr; in uli526x_init_one()
336 db->buf_pool_dma_start = db->buf_pool_dma_ptr; in uli526x_init_one()
338 switch (ent->driver_data) { in uli526x_init_one()
340 db->phy.write = phy_writeby_cr10; in uli526x_init_one()
341 db->phy.read = phy_readby_cr10; in uli526x_init_one()
344 db->phy.write = phy_writeby_cr9; in uli526x_init_one()
345 db->phy.read = phy_readby_cr9; in uli526x_init_one()
354 db->ioaddr = ioaddr; in uli526x_init_one()
355 db->pdev = pdev; in uli526x_init_one()
356 db->init = 1; in uli526x_init_one()
361 dev->netdev_ops = &netdev_ops; in uli526x_init_one()
362 dev->ethtool_ops = &netdev_ethtool_ops; in uli526x_init_one()
364 spin_lock_init(&db->lock); in uli526x_init_one()
369 ((__le16 *) db->srom)[i] = cpu_to_le16(read_srom_word(db, i)); in uli526x_init_one()
372 …if(((u16 *) db->srom)[0] == 0xffff || ((u16 *) db->srom)[0] == 0) /* SROM absent, so read MAC add… in uli526x_init_one()
392 addr[i] = db->srom[20 + i]; in uli526x_init_one()
401 ent->driver_data >> 16, pci_name(pdev), in uli526x_init_one()
402 dev->dev_addr, pdev->irq); in uli526x_init_one()
409 pci_iounmap(pdev, db->ioaddr); in uli526x_init_one()
411 dma_free_coherent(&pdev->dev, TX_BUF_ALLOC * TX_DESC_CNT + 4, in uli526x_init_one()
412 db->buf_pool_ptr, db->buf_pool_dma_ptr); in uli526x_init_one()
414 dma_free_coherent(&pdev->dev, in uli526x_init_one()
416 db->desc_pool_ptr, db->desc_pool_dma_ptr); in uli526x_init_one()
431 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_remove_one() local
434 pci_iounmap(pdev, db->ioaddr); in uli526x_remove_one()
435 dma_free_coherent(&db->pdev->dev, in uli526x_remove_one()
437 db->desc_pool_ptr, db->desc_pool_dma_ptr); in uli526x_remove_one()
438 dma_free_coherent(&db->pdev->dev, TX_BUF_ALLOC * TX_DESC_CNT + 4, in uli526x_remove_one()
439 db->buf_pool_ptr, db->buf_pool_dma_ptr); in uli526x_remove_one()
454 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_open() local
459 db->cr6_data = CR6_DEFAULT | uli526x_cr6_user_set; in uli526x_open()
460 db->tx_packet_cnt = 0; in uli526x_open()
461 db->rx_avail_cnt = 0; in uli526x_open()
462 db->link_failed = 1; in uli526x_open()
464 db->wait_reset = 0; in uli526x_open()
466 db->NIC_capability = 0xf; /* All capability*/ in uli526x_open()
467 db->PHY_reg4 = 0x1e0; in uli526x_open()
470 db->cr6_data |= ULI526X_TXTH_256; in uli526x_open()
471 db->cr0_data = CR0_DEFAULT; in uli526x_open()
476 ret = request_irq(db->pdev->irq, uli526x_interrupt, IRQF_SHARED, in uli526x_open()
477 dev->name, dev); in uli526x_open()
485 timer_setup(&db->timer, uli526x_timer, 0); in uli526x_open()
486 db->timer.expires = ULI526X_TIMER_WUT + HZ * 2; in uli526x_open()
487 add_timer(&db->timer); in uli526x_open()
496 * Send the set-up frame
502 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_init() local
503 struct uli_phy_ops *phy = &db->phy; in uli526x_init()
504 void __iomem *ioaddr = db->ioaddr; in uli526x_init()
515 uw32(DCR0, db->cr0_data); in uli526x_init()
519 db->phy_addr = 1; in uli526x_init()
523 phy_value = phy->read(db, phy_tmp, 3); //peer add in uli526x_init()
525 db->phy_addr = phy_tmp; in uli526x_init()
533 db->media_mode = uli526x_media_mode; in uli526x_init()
536 phy_reg_reset = phy->read(db, db->phy_addr, 0); in uli526x_init()
538 phy->write(db, db->phy_addr, 0, phy_reg_reset); in uli526x_init()
540 /* See IEEE 802.3-2002.pdf (Section 2, Chapter "22.2.4 Management in uli526x_init()
545 while (timeout-- && phy->read(db, db->phy_addr, 0) & 0x8000) in uli526x_init()
549 uli526x_set_phyxcer(db); in uli526x_init()
552 if ( !(db->media_mode & ULI526X_AUTO) ) in uli526x_init()
553 db->op_mode = db->media_mode; /* Force Mode */ in uli526x_init()
559 update_cr6(db->cr6_data, ioaddr); in uli526x_init()
565 db->cr7_data = CR7_DEFAULT; in uli526x_init()
566 uw32(DCR7, db->cr7_data); in uli526x_init()
569 uw32(DCR15, db->cr15_data); in uli526x_init()
572 db->cr6_data |= CR6_RXSC | CR6_TXSC; in uli526x_init()
573 update_cr6(db->cr6_data, ioaddr); in uli526x_init()
585 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_start_xmit() local
586 void __iomem *ioaddr = db->ioaddr; in uli526x_start_xmit()
596 if (skb->len > MAX_PACKET_SIZE) { in uli526x_start_xmit()
597 netdev_err(dev, "big packet = %d\n", (u16)skb->len); in uli526x_start_xmit()
602 spin_lock_irqsave(&db->lock, flags); in uli526x_start_xmit()
605 if (db->tx_packet_cnt >= TX_FREE_DESC_CNT) { in uli526x_start_xmit()
606 spin_unlock_irqrestore(&db->lock, flags); in uli526x_start_xmit()
607 netdev_err(dev, "No Tx resource %ld\n", db->tx_packet_cnt); in uli526x_start_xmit()
615 txptr = db->tx_insert_ptr; in uli526x_start_xmit()
616 skb_copy_from_linear_data(skb, txptr->tx_buf_ptr, skb->len); in uli526x_start_xmit()
617 txptr->tdes1 = cpu_to_le32(0xe1000000 | skb->len); in uli526x_start_xmit()
620 db->tx_insert_ptr = txptr->next_tx_desc; in uli526x_start_xmit()
623 if (db->tx_packet_cnt < TX_DESC_CNT) { in uli526x_start_xmit()
624 txptr->tdes0 = cpu_to_le32(0x80000000); /* Set owner bit */ in uli526x_start_xmit()
625 db->tx_packet_cnt++; /* Ready to send */ in uli526x_start_xmit()
631 if ( db->tx_packet_cnt < TX_FREE_DESC_CNT ) in uli526x_start_xmit()
635 spin_unlock_irqrestore(&db->lock, flags); in uli526x_start_xmit()
636 uw32(DCR7, db->cr7_data); in uli526x_start_xmit()
652 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_stop() local
653 void __iomem *ioaddr = db->ioaddr; in uli526x_stop()
659 del_timer_sync(&db->timer); in uli526x_stop()
664 db->phy.write(db, db->phy_addr, 0, 0x8000); in uli526x_stop()
667 free_irq(db->pdev->irq, dev); in uli526x_stop()
670 uli526x_free_rxbuffer(db); in uli526x_stop()
684 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_interrupt() local
685 void __iomem *ioaddr = db->ioaddr; in uli526x_interrupt()
688 spin_lock_irqsave(&db->lock, flags); in uli526x_interrupt()
692 db->cr5_data = ur32(DCR5); in uli526x_interrupt()
693 uw32(DCR5, db->cr5_data); in uli526x_interrupt()
694 if ( !(db->cr5_data & 0x180c1) ) { in uli526x_interrupt()
696 uw32(DCR7, db->cr7_data); in uli526x_interrupt()
697 spin_unlock_irqrestore(&db->lock, flags); in uli526x_interrupt()
702 if (db->cr5_data & 0x2000) { in uli526x_interrupt()
704 ULI526X_DBUG(1, "System bus error happen. CR5=", db->cr5_data); in uli526x_interrupt()
705 db->reset_fatal++; in uli526x_interrupt()
706 db->wait_reset = 1; /* Need to RESET */ in uli526x_interrupt()
707 spin_unlock_irqrestore(&db->lock, flags); in uli526x_interrupt()
712 if ( (db->cr5_data & 0x40) && db->rx_avail_cnt ) in uli526x_interrupt()
713 uli526x_rx_packet(dev, db); in uli526x_interrupt()
716 if (db->rx_avail_cnt<RX_DESC_CNT) in uli526x_interrupt()
720 if ( db->cr5_data & 0x01) in uli526x_interrupt()
721 uli526x_free_tx_pkt(dev, db); in uli526x_interrupt()
724 uw32(DCR7, db->cr7_data); in uli526x_interrupt()
726 spin_unlock_irqrestore(&db->lock, flags); in uli526x_interrupt()
733 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_poll() local
736 uli526x_interrupt(db->pdev->irq, dev); in uli526x_poll()
745 struct uli526x_board_info * db) in uli526x_free_tx_pkt() argument
750 txptr = db->tx_remove_ptr; in uli526x_free_tx_pkt()
751 while(db->tx_packet_cnt) { in uli526x_free_tx_pkt()
752 tdes0 = le32_to_cpu(txptr->tdes0); in uli526x_free_tx_pkt()
757 db->tx_packet_cnt--; in uli526x_free_tx_pkt()
758 dev->stats.tx_packets++; in uli526x_free_tx_pkt()
762 dev->stats.collisions += (tdes0 >> 3) & 0xf; in uli526x_free_tx_pkt()
763 dev->stats.tx_bytes += le32_to_cpu(txptr->tdes1) & 0x7ff; in uli526x_free_tx_pkt()
765 dev->stats.tx_errors++; in uli526x_free_tx_pkt()
767 db->tx_fifo_underrun++; in uli526x_free_tx_pkt()
768 if ( !(db->cr6_data & CR6_SFT) ) { in uli526x_free_tx_pkt()
769 db->cr6_data = db->cr6_data | CR6_SFT; in uli526x_free_tx_pkt()
770 update_cr6(db->cr6_data, db->ioaddr); in uli526x_free_tx_pkt()
774 db->tx_excessive_collision++; in uli526x_free_tx_pkt()
776 db->tx_late_collision++; in uli526x_free_tx_pkt()
778 db->tx_no_carrier++; in uli526x_free_tx_pkt()
780 db->tx_loss_carrier++; in uli526x_free_tx_pkt()
782 db->tx_jabber_timeout++; in uli526x_free_tx_pkt()
786 txptr = txptr->next_tx_desc; in uli526x_free_tx_pkt()
790 db->tx_remove_ptr = txptr; in uli526x_free_tx_pkt()
793 if ( db->tx_packet_cnt < TX_WAKE_DESC_CNT ) in uli526x_free_tx_pkt()
802 static void uli526x_rx_packet(struct net_device *dev, struct uli526x_board_info * db) in uli526x_rx_packet() argument
809 rxptr = db->rx_ready_ptr; in uli526x_rx_packet()
811 while(db->rx_avail_cnt) { in uli526x_rx_packet()
812 rdes0 = le32_to_cpu(rxptr->rdes0); in uli526x_rx_packet()
818 db->rx_avail_cnt--; in uli526x_rx_packet()
819 db->interval_rx_cnt++; in uli526x_rx_packet()
821 dma_unmap_single(&db->pdev->dev, le32_to_cpu(rxptr->rdes2), in uli526x_rx_packet()
827 uli526x_reuse_skb(db, rxptr->rx_skb_ptr); in uli526x_rx_packet()
830 rxlen = ( (rdes0 >> 16) & 0x3fff) - 4; in uli526x_rx_packet()
835 dev->stats.rx_errors++; in uli526x_rx_packet()
837 dev->stats.rx_fifo_errors++; in uli526x_rx_packet()
839 dev->stats.rx_crc_errors++; in uli526x_rx_packet()
841 dev->stats.rx_length_errors++; in uli526x_rx_packet()
845 ((db->cr6_data & CR6_PM) && (rxlen>6)) ) { in uli526x_rx_packet()
848 skb = rxptr->rx_skb_ptr; in uli526x_rx_packet()
858 skb_tail_pointer(rxptr->rx_skb_ptr), in uli526x_rx_packet()
860 uli526x_reuse_skb(db, rxptr->rx_skb_ptr); in uli526x_rx_packet()
864 skb->protocol = eth_type_trans(skb, dev); in uli526x_rx_packet()
866 dev->stats.rx_packets++; in uli526x_rx_packet()
867 dev->stats.rx_bytes += rxlen; in uli526x_rx_packet()
872 uli526x_reuse_skb(db, rxptr->rx_skb_ptr); in uli526x_rx_packet()
876 rxptr = rxptr->next_rx_desc; in uli526x_rx_packet()
879 db->rx_ready_ptr = rxptr; in uli526x_rx_packet()
889 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_set_filter_mode() local
893 spin_lock_irqsave(&db->lock, flags); in uli526x_set_filter_mode()
895 if (dev->flags & IFF_PROMISC) { in uli526x_set_filter_mode()
897 db->cr6_data |= CR6_PM | CR6_PBF; in uli526x_set_filter_mode()
898 update_cr6(db->cr6_data, db->ioaddr); in uli526x_set_filter_mode()
899 spin_unlock_irqrestore(&db->lock, flags); in uli526x_set_filter_mode()
903 if (dev->flags & IFF_ALLMULTI || in uli526x_set_filter_mode()
907 db->cr6_data &= ~(CR6_PM | CR6_PBF); in uli526x_set_filter_mode()
908 db->cr6_data |= CR6_PAM; in uli526x_set_filter_mode()
909 spin_unlock_irqrestore(&db->lock, flags); in uli526x_set_filter_mode()
915 spin_unlock_irqrestore(&db->lock, flags); in uli526x_set_filter_mode()
919 ULi_ethtool_get_link_ksettings(struct uli526x_board_info *db, in ULi_ethtool_get_link_ksettings() argument
920 struct ethtool_link_ksettings *cmd) in ULi_ethtool_get_link_ksettings() argument
938 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, in ULi_ethtool_get_link_ksettings()
940 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, in ULi_ethtool_get_link_ksettings()
943 cmd->base.port = PORT_MII; in ULi_ethtool_get_link_ksettings()
944 cmd->base.phy_address = db->phy_addr; in ULi_ethtool_get_link_ksettings()
946 cmd->base.speed = SPEED_10; in ULi_ethtool_get_link_ksettings()
947 cmd->base.duplex = DUPLEX_HALF; in ULi_ethtool_get_link_ksettings()
949 if(db->op_mode==ULI526X_100MHF || db->op_mode==ULI526X_100MFD) in ULi_ethtool_get_link_ksettings()
951 cmd->base.speed = SPEED_100; in ULi_ethtool_get_link_ksettings()
953 if(db->op_mode==ULI526X_10MFD || db->op_mode==ULI526X_100MFD) in ULi_ethtool_get_link_ksettings()
955 cmd->base.duplex = DUPLEX_FULL; in ULi_ethtool_get_link_ksettings()
957 if(db->link_failed) in ULi_ethtool_get_link_ksettings()
959 cmd->base.speed = SPEED_UNKNOWN; in ULi_ethtool_get_link_ksettings()
960 cmd->base.duplex = DUPLEX_UNKNOWN; in ULi_ethtool_get_link_ksettings()
963 if (db->media_mode & ULI526X_AUTO) in ULi_ethtool_get_link_ksettings()
965 cmd->base.autoneg = AUTONEG_ENABLE; in ULi_ethtool_get_link_ksettings()
974 strscpy(info->driver, DRV_NAME, sizeof(info->driver)); in netdev_get_drvinfo()
975 strscpy(info->bus_info, pci_name(np->pdev), sizeof(info->bus_info)); in netdev_get_drvinfo()
979 struct ethtool_link_ksettings *cmd) in netdev_get_link_ksettings() argument
983 ULi_ethtool_get_link_ksettings(np, cmd); in netdev_get_link_ksettings()
991 if(np->link_failed) in netdev_get_link()
999 wol->supported = WAKE_PHY | WAKE_MAGIC; in uli526x_get_wol()
1000 wol->wolopts = 0; in uli526x_get_wol()
1017 struct uli526x_board_info *db = from_timer(db, t, timer); in uli526x_timer() local
1018 struct net_device *dev = pci_get_drvdata(db->pdev); in uli526x_timer()
1019 struct uli_phy_ops *phy = &db->phy; in uli526x_timer()
1020 void __iomem *ioaddr = db->ioaddr; in uli526x_timer()
1026 spin_lock_irqsave(&db->lock, flags); in uli526x_timer()
1029 /* Dynamic reset ULI526X : system error or transmit time-out */ in uli526x_timer()
1031 if ( (db->interval_rx_cnt==0) && (tmp_cr8) ) { in uli526x_timer()
1032 db->reset_cr8++; in uli526x_timer()
1033 db->wait_reset = 1; in uli526x_timer()
1035 db->interval_rx_cnt = 0; in uli526x_timer()
1038 if ( db->tx_packet_cnt && in uli526x_timer()
1044 db->reset_TXtimeout++; in uli526x_timer()
1045 db->wait_reset = 1; in uli526x_timer()
1046 netdev_err(dev, " Tx timeout - resetting\n"); in uli526x_timer()
1050 if (db->wait_reset) { in uli526x_timer()
1051 ULI526X_DBUG(0, "Dynamic Reset device", db->tx_packet_cnt); in uli526x_timer()
1052 db->reset_count++; in uli526x_timer()
1054 db->timer.expires = ULI526X_TIMER_WUT; in uli526x_timer()
1055 add_timer(&db->timer); in uli526x_timer()
1056 spin_unlock_irqrestore(&db->lock, flags); in uli526x_timer()
1061 if ((phy->read(db, db->phy_addr, 5) & 0x01e0)!=0) in uli526x_timer()
1064 if ( !(tmp_cr12 & 0x3) && !db->link_failed ) { in uli526x_timer()
1069 db->link_failed = 1; in uli526x_timer()
1071 /* For Force 10/100M Half/Full mode: Enable Auto-Nego mode */ in uli526x_timer()
1073 if ( !(db->media_mode & 0x8) ) in uli526x_timer()
1074 phy->write(db, db->phy_addr, 0, 0x1000); in uli526x_timer()
1077 if (db->media_mode & ULI526X_AUTO) { in uli526x_timer()
1078 db->cr6_data&=~0x00000200; /* bit9=0, HD mode */ in uli526x_timer()
1079 update_cr6(db->cr6_data, db->ioaddr); in uli526x_timer()
1082 if ((tmp_cr12 & 0x3) && db->link_failed) { in uli526x_timer()
1084 db->link_failed = 0; in uli526x_timer()
1087 if ( (db->media_mode & ULI526X_AUTO) && in uli526x_timer()
1088 uli526x_sense_speed(db) ) in uli526x_timer()
1089 db->link_failed = 1; in uli526x_timer()
1090 uli526x_process_mode(db); in uli526x_timer()
1092 if(db->link_failed==0) in uli526x_timer()
1095 (db->op_mode == ULI526X_100MHF || in uli526x_timer()
1096 db->op_mode == ULI526X_100MFD) in uli526x_timer()
1098 (db->op_mode == ULI526X_10MFD || in uli526x_timer()
1099 db->op_mode == ULI526X_100MFD) in uli526x_timer()
1103 /* SHOW_MEDIA_TYPE(db->op_mode); */ in uli526x_timer()
1105 else if(!(tmp_cr12 & 0x3) && db->link_failed) in uli526x_timer()
1107 if(db->init==1) in uli526x_timer()
1113 db->init = 0; in uli526x_timer()
1116 db->timer.expires = ULI526X_TIMER_WUT; in uli526x_timer()
1117 add_timer(&db->timer); in uli526x_timer()
1118 spin_unlock_irqrestore(&db->lock, flags); in uli526x_timer()
1130 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_reset_prepare() local
1131 void __iomem *ioaddr = db->ioaddr; in uli526x_reset_prepare()
1134 db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); /* Disable Tx/Rx */ in uli526x_reset_prepare()
1135 update_cr6(db->cr6_data, ioaddr); in uli526x_reset_prepare()
1143 uli526x_free_rxbuffer(db); in uli526x_reset_prepare()
1146 db->tx_packet_cnt = 0; in uli526x_reset_prepare()
1147 db->rx_avail_cnt = 0; in uli526x_reset_prepare()
1148 db->link_failed = 1; in uli526x_reset_prepare()
1149 db->init=1; in uli526x_reset_prepare()
1150 db->wait_reset = 0; in uli526x_reset_prepare()
1159 * Re-initialize ULI526X board
1168 /* Re-initialize ULI526X board */ in uli526x_dynamic_reset()
1211 /* Re-initialize ULI526X board */ in uli526x_resume()
1223 static void uli526x_free_rxbuffer(struct uli526x_board_info * db) in uli526x_free_rxbuffer() argument
1228 while (db->rx_avail_cnt) { in uli526x_free_rxbuffer()
1229 dev_kfree_skb(db->rx_ready_ptr->rx_skb_ptr); in uli526x_free_rxbuffer()
1230 db->rx_ready_ptr = db->rx_ready_ptr->next_rx_desc; in uli526x_free_rxbuffer()
1231 db->rx_avail_cnt--; in uli526x_free_rxbuffer()
1240 static void uli526x_reuse_skb(struct uli526x_board_info *db, struct sk_buff * skb) in uli526x_reuse_skb() argument
1242 struct rx_desc *rxptr = db->rx_insert_ptr; in uli526x_reuse_skb()
1244 if (!(rxptr->rdes0 & cpu_to_le32(0x80000000))) { in uli526x_reuse_skb()
1245 rxptr->rx_skb_ptr = skb; in uli526x_reuse_skb()
1246 rxptr->rdes2 = cpu_to_le32(dma_map_single(&db->pdev->dev, skb_tail_pointer(skb), in uli526x_reuse_skb()
1249 rxptr->rdes0 = cpu_to_le32(0x80000000); in uli526x_reuse_skb()
1250 db->rx_avail_cnt++; in uli526x_reuse_skb()
1251 db->rx_insert_ptr = rxptr->next_rx_desc; in uli526x_reuse_skb()
1253 ULI526X_DBUG(0, "SK Buffer reuse method error", db->rx_avail_cnt); in uli526x_reuse_skb()
1264 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_descriptor_init() local
1275 db->tx_insert_ptr = db->first_tx_desc; in uli526x_descriptor_init()
1276 db->tx_remove_ptr = db->first_tx_desc; in uli526x_descriptor_init()
1277 uw32(DCR4, db->first_tx_desc_dma); /* TX DESC address */ in uli526x_descriptor_init()
1280 db->first_rx_desc = (void *)db->first_tx_desc + sizeof(struct tx_desc) * TX_DESC_CNT; in uli526x_descriptor_init()
1281 db->first_rx_desc_dma = db->first_tx_desc_dma + sizeof(struct tx_desc) * TX_DESC_CNT; in uli526x_descriptor_init()
1282 db->rx_insert_ptr = db->first_rx_desc; in uli526x_descriptor_init()
1283 db->rx_ready_ptr = db->first_rx_desc; in uli526x_descriptor_init()
1284 uw32(DCR3, db->first_rx_desc_dma); /* RX DESC address */ in uli526x_descriptor_init()
1287 tmp_buf = db->buf_pool_start; in uli526x_descriptor_init()
1288 tmp_buf_dma = db->buf_pool_dma_start; in uli526x_descriptor_init()
1289 tmp_tx_dma = db->first_tx_desc_dma; in uli526x_descriptor_init()
1290 for (tmp_tx = db->first_tx_desc, i = 0; i < TX_DESC_CNT; i++, tmp_tx++) { in uli526x_descriptor_init()
1291 tmp_tx->tx_buf_ptr = tmp_buf; in uli526x_descriptor_init()
1292 tmp_tx->tdes0 = cpu_to_le32(0); in uli526x_descriptor_init()
1293 tmp_tx->tdes1 = cpu_to_le32(0x81000000); /* IC, chain */ in uli526x_descriptor_init()
1294 tmp_tx->tdes2 = cpu_to_le32(tmp_buf_dma); in uli526x_descriptor_init()
1296 tmp_tx->tdes3 = cpu_to_le32(tmp_tx_dma); in uli526x_descriptor_init()
1297 tmp_tx->next_tx_desc = tmp_tx + 1; in uli526x_descriptor_init()
1301 (--tmp_tx)->tdes3 = cpu_to_le32(db->first_tx_desc_dma); in uli526x_descriptor_init()
1302 tmp_tx->next_tx_desc = db->first_tx_desc; in uli526x_descriptor_init()
1305 tmp_rx_dma=db->first_rx_desc_dma; in uli526x_descriptor_init()
1306 for (tmp_rx = db->first_rx_desc, i = 0; i < RX_DESC_CNT; i++, tmp_rx++) { in uli526x_descriptor_init()
1307 tmp_rx->rdes0 = cpu_to_le32(0); in uli526x_descriptor_init()
1308 tmp_rx->rdes1 = cpu_to_le32(0x01000600); in uli526x_descriptor_init()
1310 tmp_rx->rdes3 = cpu_to_le32(tmp_rx_dma); in uli526x_descriptor_init()
1311 tmp_rx->next_rx_desc = tmp_rx + 1; in uli526x_descriptor_init()
1313 (--tmp_rx)->rdes3 = cpu_to_le32(db->first_rx_desc_dma); in uli526x_descriptor_init()
1314 tmp_rx->next_rx_desc = db->first_rx_desc; in uli526x_descriptor_init()
1316 /* pre-allocate Rx buffer */ in uli526x_descriptor_init()
1345 struct uli526x_board_info *db = netdev_priv(dev); in send_filter_frame() local
1346 void __iomem *ioaddr = db->ioaddr; in send_filter_frame()
1355 txptr = db->tx_insert_ptr; in send_filter_frame()
1356 suptr = (u32 *) txptr->tx_buf_ptr; in send_filter_frame()
1359 addrptr = (const u16 *) dev->dev_addr; in send_filter_frame()
1371 addrptr = (u16 *) ha->addr; in send_filter_frame()
1384 db->tx_insert_ptr = txptr->next_tx_desc; in send_filter_frame()
1385 txptr->tdes1 = cpu_to_le32(0x890000c0); in send_filter_frame()
1388 if (db->tx_packet_cnt < TX_DESC_CNT) { in send_filter_frame()
1390 db->tx_packet_cnt++; in send_filter_frame()
1391 txptr->tdes0 = cpu_to_le32(0x80000000); in send_filter_frame()
1392 update_cr6(db->cr6_data | 0x2000, ioaddr); in send_filter_frame()
1394 update_cr6(db->cr6_data, ioaddr); in send_filter_frame()
1397 netdev_err(dev, "No Tx resource - Send_filter_frame!\n"); in send_filter_frame()
1408 struct uli526x_board_info *db = netdev_priv(dev); in allocate_rx_buffer() local
1412 rxptr = db->rx_insert_ptr; in allocate_rx_buffer()
1414 while(db->rx_avail_cnt < RX_DESC_CNT) { in allocate_rx_buffer()
1418 rxptr->rx_skb_ptr = skb; /* FIXME (?) */ in allocate_rx_buffer()
1419 rxptr->rdes2 = cpu_to_le32(dma_map_single(&db->pdev->dev, skb_tail_pointer(skb), in allocate_rx_buffer()
1422 rxptr->rdes0 = cpu_to_le32(0x80000000); in allocate_rx_buffer()
1423 rxptr = rxptr->next_rx_desc; in allocate_rx_buffer()
1424 db->rx_avail_cnt++; in allocate_rx_buffer()
1427 db->rx_insert_ptr = rxptr; in allocate_rx_buffer()
1435 static u16 read_srom_word(struct uli526x_board_info *db, int offset) in read_srom_word() argument
1437 void __iomem *ioaddr = db->ioaddr; in read_srom_word()
1445 srom_clk_write(db, SROM_DATA_1); in read_srom_word()
1446 srom_clk_write(db, SROM_DATA_1); in read_srom_word()
1447 srom_clk_write(db, SROM_DATA_0); in read_srom_word()
1450 for (i = 5; i >= 0; i--) { in read_srom_word()
1452 srom_clk_write(db, srom_data); in read_srom_word()
1457 for (i = 16; i > 0; i--) { in read_srom_word()
1475 static u8 uli526x_sense_speed(struct uli526x_board_info * db) in uli526x_sense_speed() argument
1477 struct uli_phy_ops *phy = &db->phy; in uli526x_sense_speed()
1481 phy_mode = phy->read(db, db->phy_addr, 1); in uli526x_sense_speed()
1482 phy_mode = phy->read(db, db->phy_addr, 1); in uli526x_sense_speed()
1486 phy_mode = ((phy->read(db, db->phy_addr, 5) & 0x01e0)<<7); in uli526x_sense_speed()
1497 case 0x1000: db->op_mode = ULI526X_10MHF; break; in uli526x_sense_speed()
1498 case 0x2000: db->op_mode = ULI526X_10MFD; break; in uli526x_sense_speed()
1499 case 0x4000: db->op_mode = ULI526X_100MHF; break; in uli526x_sense_speed()
1500 case 0x8000: db->op_mode = ULI526X_100MFD; break; in uli526x_sense_speed()
1501 default: db->op_mode = ULI526X_10MHF; ErrFlag = 1; break; in uli526x_sense_speed()
1504 db->op_mode = ULI526X_10MHF; in uli526x_sense_speed()
1519 static void uli526x_set_phyxcer(struct uli526x_board_info *db) in uli526x_set_phyxcer() argument
1521 struct uli_phy_ops *phy = &db->phy; in uli526x_set_phyxcer()
1525 phy_reg = phy->read(db, db->phy_addr, 4) & ~0x01e0; in uli526x_set_phyxcer()
1527 if (db->media_mode & ULI526X_AUTO) { in uli526x_set_phyxcer()
1529 phy_reg |= db->PHY_reg4; in uli526x_set_phyxcer()
1532 switch(db->media_mode) { in uli526x_set_phyxcer()
1543 phy_reg|=db->PHY_reg4; in uli526x_set_phyxcer()
1544 db->media_mode|=ULI526X_AUTO; in uli526x_set_phyxcer()
1546 phy->write(db, db->phy_addr, 4, phy_reg); in uli526x_set_phyxcer()
1548 /* Restart Auto-Negotiation */ in uli526x_set_phyxcer()
1549 phy->write(db, db->phy_addr, 0, 0x1200); in uli526x_set_phyxcer()
1555 * Process op-mode
1556 AUTO mode : PHY controller in Auto-negotiation Mode
1558 * N-way force capability with SWITCH
1561 static void uli526x_process_mode(struct uli526x_board_info *db) in uli526x_process_mode() argument
1563 struct uli_phy_ops *phy = &db->phy; in uli526x_process_mode()
1567 if (db->op_mode & 0x4) in uli526x_process_mode()
1568 db->cr6_data |= CR6_FDM; /* Set Full Duplex Bit */ in uli526x_process_mode()
1570 db->cr6_data &= ~CR6_FDM; /* Clear Full Duplex Bit */ in uli526x_process_mode()
1572 update_cr6(db->cr6_data, db->ioaddr); in uli526x_process_mode()
1575 if (!(db->media_mode & 0x8)) { in uli526x_process_mode()
1577 phy_reg = phy->read(db, db->phy_addr, 6); in uli526x_process_mode()
1579 /* parter without N-Way capability */ in uli526x_process_mode()
1581 switch(db->op_mode) { in uli526x_process_mode()
1587 phy->write(db, db->phy_addr, 0, phy_reg); in uli526x_process_mode()
1594 static void phy_writeby_cr9(struct uli526x_board_info *db, u8 phy_addr, in phy_writeby_cr9() argument
1601 phy_write_1bit(db, PHY_DATA_1); in phy_writeby_cr9()
1604 phy_write_1bit(db, PHY_DATA_0); in phy_writeby_cr9()
1605 phy_write_1bit(db, PHY_DATA_1); in phy_writeby_cr9()
1608 phy_write_1bit(db, PHY_DATA_0); in phy_writeby_cr9()
1609 phy_write_1bit(db, PHY_DATA_1); in phy_writeby_cr9()
1613 phy_write_1bit(db, phy_addr & i ? PHY_DATA_1 : PHY_DATA_0); in phy_writeby_cr9()
1617 phy_write_1bit(db, offset & i ? PHY_DATA_1 : PHY_DATA_0); in phy_writeby_cr9()
1620 phy_write_1bit(db, PHY_DATA_1); in phy_writeby_cr9()
1621 phy_write_1bit(db, PHY_DATA_0); in phy_writeby_cr9()
1625 phy_write_1bit(db, phy_data & i ? PHY_DATA_1 : PHY_DATA_0); in phy_writeby_cr9()
1628 static u16 phy_readby_cr9(struct uli526x_board_info *db, u8 phy_addr, u8 offset) in phy_readby_cr9() argument
1635 phy_write_1bit(db, PHY_DATA_1); in phy_readby_cr9()
1638 phy_write_1bit(db, PHY_DATA_0); in phy_readby_cr9()
1639 phy_write_1bit(db, PHY_DATA_1); in phy_readby_cr9()
1642 phy_write_1bit(db, PHY_DATA_1); in phy_readby_cr9()
1643 phy_write_1bit(db, PHY_DATA_0); in phy_readby_cr9()
1647 phy_write_1bit(db, phy_addr & i ? PHY_DATA_1 : PHY_DATA_0); in phy_readby_cr9()
1651 phy_write_1bit(db, offset & i ? PHY_DATA_1 : PHY_DATA_0); in phy_readby_cr9()
1654 phy_read_1bit(db); in phy_readby_cr9()
1659 phy_data |= phy_read_1bit(db); in phy_readby_cr9()
1665 static u16 phy_readby_cr10(struct uli526x_board_info *db, u8 phy_addr, in phy_readby_cr10() argument
1668 void __iomem *ioaddr = db->ioaddr; in phy_readby_cr10()
1683 static void phy_writeby_cr10(struct uli526x_board_info *db, u8 phy_addr, in phy_writeby_cr10() argument
1686 void __iomem *ioaddr = db->ioaddr; in phy_writeby_cr10()
1698 static void phy_write_1bit(struct uli526x_board_info *db, u32 data) in phy_write_1bit() argument
1700 void __iomem *ioaddr = db->ioaddr; in phy_write_1bit()
1715 static u16 phy_read_1bit(struct uli526x_board_info *db) in phy_read_1bit() argument
1717 void __iomem *ioaddr = db->ioaddr; in phy_read_1bit()
1754 MODULE_PARM_DESC(debug, "ULi M5261/M5263 enable debugging (0-1)");
1791 * to un-register all registered services.