Lines Matching +full:mbox +full:- +full:tx
4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
62 #define CH_WARN(adap, fmt, ...) dev_warn(adap->pdev_dev, fmt, ## __VA_ARGS__)
67 /* Suspend an Ethernet Tx queue with fewer available descriptors than this.
138 FEC_RS = 1 << 1, /* Reed-Solomon */
139 FEC_BASER_RS = 1 << 2 /* BaseR/Reed-Solomon */
213 u64 tx_frames_64; /* # of Tx frames in a particular range */
221 u64 tx_drop; /* # of dropped Tx frames */
262 u64 rx_ovflow0; /* drops due to buffer-group 0 overflows */
263 u64 rx_ovflow1; /* drops due to buffer-group 1 overflows */
264 u64 rx_ovflow2; /* drops due to buffer-group 2 overflows */
265 u64 rx_ovflow3; /* drops due to buffer-group 3 overflows */
266 u64 rx_trunc0; /* buffer-group 0 truncated packets */
267 u64 rx_trunc1; /* buffer-group 1 truncated packets */
268 u64 rx_trunc2; /* buffer-group 2 truncated packets */
269 u64 rx_trunc3; /* buffer-group 3 truncated packets */
351 unsigned short tx_modq_map; /* TX modulation scheduler queue to */
374 * places we store their offsets here, or a -1 if the field isn't
407 unsigned int tc; /* PCI-E traffic class */
480 u8 fw_caps_support; /* 32-bit Port Capabilities */
503 /* Firmware Mailbox Command/Reply log. All values are in Host-Endian format.
509 u64 timestamp; /* OS-dependent timestamp */
569 typedef u16 fw_port_cap16_t; /* 16-bit Port Capabilities integral value */
570 typedef u32 fw_port_cap32_t; /* 32-bit Port Capabilities integral value */
574 FW_CAPS16 = 1, /* old Firmware: 16-bit Port Capabilities */
575 FW_CAPS32 = 2, /* new Firmware: 32-bit Port Capabilities */
599 bool new_module; /* ->OS Transceiver Module inserted */
600 bool redo_l1cfg; /* ->CC redo current "sticky" L1 CFG */
606 MAX_ETH_QSETS = 32, /* # of Ethernet Tx/Rx queue sets */
607 MAX_OFLD_QSETS = 16, /* # of offload Tx, iscsi Rx queue sets */
608 MAX_CTRL_QUEUES = NCHAN, /* # of control Tx queues */
733 struct sge_fl { /* SGE free-buffer queue state */
820 unsigned long imm; /* # of immediate-data packets */
844 unsigned int in_use; /* # of in-use Tx descriptors */
851 unsigned int cntxt_id; /* SGE context id for the Tx q */
852 struct tx_desc *desc; /* address of HW Tx descriptor ring */
853 struct tx_sw_desc *sdesc; /* address of SW Tx descriptor ring */
864 struct sge_eth_txq { /* state for an SGE Ethernet Tx queue */
866 struct netdev_queue *txq; /* associated netdev TX queue */
874 unsigned long tx_cso; /* # of Tx checksum offloads */
875 unsigned long vlan_ins; /* # of Tx VLAN insertions */
879 struct sge_uld_txq { /* state for an SGE offload Tx queue */
885 u8 full; /* the Tx ring is full */
889 struct sge_ctrl_txq { /* state for an SGE control Tx queue */
894 u8 full; /* the Tx ring is full */
959 unsigned long tx_cso; /* # of Tx checksum offloads */
960 unsigned long vlan_ins; /* # of Tx VLAN insertions */
984 u16 ethtxq_rover; /* Tx queue to clean up next */
1005 void **egr_map; /* qid->queue egress queue map */
1006 struct sge_rspq **ingr_map; /* qid->queue ingress queue map */
1011 struct timer_list tx_timer; /* checks Tx queues */
1013 int fwevtq_msix_idx; /* Index to firmware event queue MSI-X info */
1014 int nd_msix_idx; /* Index to non-data interrupts MSI-X info */
1017 #define for_each_ethrxq(sge, i) for (i = 0; i < (sge)->ethqsets; i++)
1018 #define for_each_ofldtxq(sge, i) for (i = 0; i < (sge)->ofldqsets; i++)
1024 /* T4 supports SRIOV on PF0-3 and T5 on PF0-7. However, the Serial
1025 * Configuration initialization for T5 only has SR-IOV functionality enabled
1026 * on PF0-3 in order to simplify everything.
1113 unsigned int mbox; member
1128 /* MSI-X Info for NIC and OFLD queues */
1136 u8 chan_map[NCHAN]; /* channel -> port map */
1236 /* Ethtool n-tuple */
1240 /* Support for "sched-class" command to allow a TX Scheduling Class to be
1248 u8 mode; /* per-class or per-flow */
1272 SCHED_CLASS_MODE_CLASS = 0, /* per-class scheduling */
1273 SCHED_CLASS_MODE_FLOW, /* per-flow scheduling */
1284 /* Support for "sched_queue" command to allow one or more NIC TX Queues
1285 * to be bound to a TX Scheduling Class.
1293 * to be bound to a TX Scheduling Class.
1330 * We really need to come up with a hardware-independent mechanism to
1336 * filter match rules -- up to a maximum of 36 bits. Because
1352 uint32_t pf:PF_BITWIDTH; /* PCI-E PF ID */
1353 uint32_t vf:VF_BITWIDTH; /* PCI-E VF ID */
1379 u32 hash:1; /* 0 => wild-card, 1 => exact-match */
1398 * packet -- potentially with some Ethernet header rewriting.
1447 NAT_MODE_ALL /* NAT on entire 4-tuple */
1454 * firmware command. The use of bit-field structure elements is purely to
1472 * internal forms -- for instance the Ingress Queue ID passed in from
1480 return adap->params.offload; in is_offload()
1485 return adap->params.hash_filter; in is_hashfilter()
1490 return adap->params.crypto; in is_pci_uld()
1495 return (adap->params.offload || adap->params.crypto); in is_uld()
1500 return adap->params.ethofld; in is_ethofld()
1505 return readl(adap->regs + reg_addr); in t4_read_reg()
1510 writel(val, adap->regs + reg_addr); in t4_write_reg()
1528 return readq(adap->regs + reg_addr); in t4_read_reg64()
1533 writeq(val, adap->regs + reg_addr); in t4_write_reg64()
1537 * t4_set_hw_addr - store a port's MAC address in SW
1548 eth_hw_addr_set(adapter->port[port_idx], hw_addr); in t4_set_hw_addr()
1549 ether_addr_copy(adapter->port[port_idx]->perm_addr, hw_addr); in t4_set_hw_addr()
1553 * netdev2pinfo - return the port_info structure associated with a net_device
1564 * adap2pinfo - return the port_info of a port
1572 return netdev_priv(adap->port[idx]); in adap2pinfo()
1576 * netdev2adap - return the adapter structure associated with a net_device
1583 return netdev2pinfo(dev)->adapter; in netdev2adap()
1587 * - bits 0..9: chip version
1588 * - bits 10..15: chip revision
1589 * - bits 16..23: register dump version
1593 return CHELSIO_CHIP_VERSION(ap->params.chip) | in mk_adap_vers()
1594 (CHELSIO_CHIP_RELEASE(ap->params.chip) << 10) | (1 << 16); in mk_adap_vers()
1597 /* Return a queue's interrupt hold-off time in us. 0 means no timer. */
1601 unsigned int idx = q->intr_params >> 1; in qtimer_val()
1603 return idx < SGE_NTIMERS ? adap->sge.timer_val[idx] : 0; in qtimer_val()
1651 for (iter = 0; iter < (adapter)->params.nports; ++iter)
1655 return adap->params.bypass; in is_bypass()
1685 return adap->params.vpd.cclk / 1000; in core_ticks_per_usec()
1691 return (us * adap->params.vpd.cclk) / 1000; in us_to_core_ticks()
1698 return ((ticks * 1000 + adapter->params.vpd.cclk/2) / in core_ticks_to_us()
1699 adapter->params.vpd.cclk); in core_ticks_to_us()
1705 return (ticks << adap->params.tp.dack_re) / core_ticks_per_usec(adap); in dack_ticks_to_usec()
1711 int t4_wr_mbox_meat_timeout(struct adapter *adap, int mbox, const void *cmd,
1713 int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size,
1716 static inline int t4_wr_mbox_timeout(struct adapter *adap, int mbox, in t4_wr_mbox_timeout() argument
1720 return t4_wr_mbox_meat_timeout(adap, mbox, cmd, size, rpl, true, in t4_wr_mbox_timeout()
1724 static inline int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd, in t4_wr_mbox() argument
1727 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, true); in t4_wr_mbox()
1730 static inline int t4_wr_mbox_ns(struct adapter *adap, int mbox, const void *cmd, in t4_wr_mbox_ns() argument
1733 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, false); in t4_wr_mbox_ns()
1737 * hash_mac_addr - return the hash value of a MAC address
1738 * @addr: the 48-bit Ethernet MAC address
1760 q->adap = adap; in init_rspq()
1762 q->iqe_len = iqe_size; in init_rspq()
1763 q->size = size; in init_rspq()
1767 * t4_is_inserted_mod_type - is a plugged in Firmware Module Type
1799 int t4_link_l1cfg_core(struct adapter *adap, unsigned int mbox,
1803 static inline int t4_link_l1cfg(struct adapter *adapter, unsigned int mbox, in t4_link_l1cfg() argument
1806 return t4_link_l1cfg_core(adapter, mbox, port, lc, in t4_link_l1cfg()
1810 static inline int t4_link_l1cfg_ns(struct adapter *adapter, unsigned int mbox, in t4_link_l1cfg_ns() argument
1813 return t4_link_l1cfg_core(adapter, mbox, port, lc, in t4_link_l1cfg_ns()
1817 int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port);
1854 int t4_fw_upgrade(struct adapter *adap, unsigned int mbox,
1889 int t4_init_rss_mode(struct adapter *adap, int mbox);
1890 int t4_init_portinfo(struct port_info *pi, int mbox,
1892 int t4_port_init(struct adapter *adap, int mbox, int pf, int vf);
1893 int t4_init_port_mirror(struct port_info *pi, u8 mbox, u8 port, u8 pf, u8 vf,
1897 int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid,
1899 int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode,
1901 int t4_config_vi_rss(struct adapter *adapter, int mbox, unsigned int viid,
1968 int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox,
1970 int t4_fw_bye(struct adapter *adap, unsigned int mbox);
1971 int t4_early_init(struct adapter *adap, unsigned int mbox);
1972 int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset);
1975 int t4_fw_initialize(struct adapter *adap, unsigned int mbox);
1976 int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
1979 int t4_query_params_ns(struct adapter *adap, unsigned int mbox, unsigned int pf,
1982 int t4_query_params_rw(struct adapter *adap, unsigned int mbox, unsigned int pf,
1985 int t4_set_params_timeout(struct adapter *adap, unsigned int mbox,
1989 int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
1992 int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf,
1997 int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port,
2000 int t4_free_vi(struct adapter *adap, unsigned int mbox,
2003 int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid,
2018 int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox,
2021 int t4_free_mac_filt(struct adapter *adap, unsigned int mbox,
2024 int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid,
2026 int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid,
2028 int t4_enable_vi_params(struct adapter *adap, unsigned int mbox,
2030 int t4_enable_pi_params(struct adapter *adap, unsigned int mbox,
2033 int t4_enable_vi(struct adapter *adap, unsigned int mbox, unsigned int viid,
2035 int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid,
2037 int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
2039 int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
2041 int t4_iq_stop(struct adapter *adap, unsigned int mbox, unsigned int pf,
2044 int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
2047 int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
2049 int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
2051 int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
2053 int t4_sge_ctxt_flush(struct adapter *adap, unsigned int mbox, int ctxt_type);
2067 int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox,
2072 int t4_sge_ctxt_rd(struct adapter *adap, unsigned int mbox, unsigned int cid,
2099 int t4_i2c_rd(struct adapter *adap, unsigned int mbox, int port,
2129 int t4_set_vlan_acl(struct adapter *adap, unsigned int mbox, unsigned int vf,