1 // SPDX-License-Identifier: GPL-2.0-only
8  *  PMC/SIERRA (pm3393) MAC-PHY functionality.                               *
14  * Copyright (c) 2003 - 2005 Chelsio Communications, Inc.                    *
87 	t1_tpi_read(cmac->adapter, OFFSET(reg), data32);  in pmread()
93 	t1_tpi_write(cmac->adapter, OFFSET(reg), data32);  in pmwrite()
97 /* Port reset. */
115 	/* PM3393 - Enabling all hardware block interrupts.  in pm3393_interrupt_enable()
138 	/* PM3393 - Global interrupt enable  in pm3393_interrupt_enable()
144 	/* TERMINATOR - PL_INTERUPTS_EXT */  in pm3393_interrupt_enable()
145 	pl_intr = readl(cmac->adapter->regs + A_PL_ENABLE);  in pm3393_interrupt_enable()
147 	writel(pl_intr, cmac->adapter->regs + A_PL_ENABLE);  in pm3393_interrupt_enable()
155 	/* PM3393 - Enabling HW interrupt blocks. */  in pm3393_interrupt_disable()
174 	/* PM3393 - Global interrupt enable */  in pm3393_interrupt_disable()
177 	/* ELMER - External chip interrupts. */  in pm3393_interrupt_disable()
178 	t1_tpi_read(cmac->adapter, A_ELMER0_INT_ENABLE, &elmer);  in pm3393_interrupt_disable()
180 	t1_tpi_write(cmac->adapter, A_ELMER0_INT_ENABLE, elmer);  in pm3393_interrupt_disable()
182 	/* TERMINATOR - PL_INTERUPTS_EXT */  in pm3393_interrupt_disable()
196 	/* PM3393 - Clearing HW interrupt blocks. Note, this assumes  in pm3393_interrupt_clear()
197 	 *          bit WCIMODE=0 for a clear-on-read.  in pm3393_interrupt_clear()
215 	/* PM3393 - Global interrupt status  in pm3393_interrupt_clear()
219 	/* ELMER - External chip interrupts.  in pm3393_interrupt_clear()
221 	t1_tpi_read(cmac->adapter, A_ELMER0_INT_CAUSE, &elmer);  in pm3393_interrupt_clear()
223 	t1_tpi_write(cmac->adapter, A_ELMER0_INT_CAUSE, elmer);  in pm3393_interrupt_clear()
225 	/* TERMINATOR - PL_INTERUPTS_EXT  in pm3393_interrupt_clear()
227 	pl_intr = readl(cmac->adapter->regs + A_PL_CAUSE);  in pm3393_interrupt_clear()
229 	writel(pl_intr, cmac->adapter->regs + A_PL_CAUSE);  in pm3393_interrupt_clear()
242 	if (netif_msg_intr(cmac->adapter))  in pm3393_interrupt_handler()
243 		dev_dbg(&cmac->adapter->pdev->dev, "PM3393 intr cause 0x%x\n",  in pm3393_interrupt_handler()
261 		if (cmac->instance->fc & PAUSE_RX)  in pm3393_enable()
263 		if (cmac->instance->fc & PAUSE_TX)  in pm3393_enable()
268 	cmac->instance->enabled |= which;  in pm3393_enable()
278 	memset(&cmac->stats, 0, sizeof(struct cmac_statistics));  in pm3393_enable_port()
287 	t1_link_changed(cmac->adapter, 0);  in pm3393_enable_port()
304 	cmac->instance->enabled &= ~which;  in pm3393_disable()
320 	int enabled = cmac->instance->enabled;  in pm3393_set_mtu()
338 	int enabled = cmac->instance->enabled & MAC_DIRECTION_RX;  in pm3393_set_rx_mode()
370 			bit = (ether_crc(ETH_ALEN, ha->addr) >> 23) & 0x3f;  in pm3393_set_rx_mode()
396 		*fc = cmac->instance->fc;  in pm3393_get_speed_duplex_fc()
404 		return -1;  in pm3393_set_speed_duplex_fc()
406 		return -1;  in pm3393_set_speed_duplex_fc()
408 		return -1;  in pm3393_set_speed_duplex_fc()
410 	if (fc != cmac->instance->fc) {  in pm3393_set_speed_duplex_fc()
411 		cmac->instance->fc = (u8) fc;  in pm3393_set_speed_duplex_fc()
412 		if (cmac->instance->enabled & MAC_DIRECTION_TX)  in pm3393_set_speed_duplex_fc()
420 	t1_tpi_read((mac)->adapter, OFFSET(name), &val0);     \
421 	t1_tpi_read((mac)->adapter, OFFSET((name)+1), &val1); \
422 	t1_tpi_read((mac)->adapter, OFFSET((name)+2), &val2); \
423 	(mac)->stats.stat_name = (u64)(val0 & 0xffff) | \
426 				 ((mac)->stats.stat_name & \
429 	    (1ULL << ((name - SUNI1x10GEXP_REG_MSTAT_COUNTER_0_LOW) >> 2))) \
430 		(mac)->stats.stat_name += 1ULL << 40; \
481 	return &mac->stats;  in pm3393_update_statistics()
486 	memcpy(mac_addr, cmac->instance->mac_addr, ETH_ALEN);  in pm3393_macaddress_get()
492 	u32 val, lo, mid, hi, enabled = cmac->instance->enabled;  in pm3393_macaddress_set()
513 	memcpy(cmac->instance->mac_addr, ma, ETH_ALEN);  in pm3393_macaddress_set()
560 	.reset                   = pm3393_reset,
586 	cmac->ops = &pm3393_ops;  in pm3393_mac_create()
587 	cmac->instance = (cmac_instance *) (cmac + 1);  in pm3393_mac_create()
588 	cmac->adapter = adapter;  in pm3393_mac_create()
589 	cmac->instance->fc = PAUSE_TX | PAUSE_RX;  in pm3393_mac_create()
628 	t1_tpi_write(adapter, OFFSET(0x2200), 0x0000c000);	/* IFLX Configuration - enable */  in pm3393_mac_create()
685 	/* The following steps are required to properly reset  in pm3393_mac_reset()
688 	 * section 13.1 -- Device Reset.  in pm3393_mac_reset()
691 	 * individually reset:  in pm3393_mac_reset()
693 	 * DRESETB      - Digital circuitry  in pm3393_mac_reset()
694 	 * PL4_ARESETB  - PL4 analog circuitry  in pm3393_mac_reset()
695 	 * XAUI_ARESETB - XAUI bus analog circuitry  in pm3393_mac_reset()
697 	 * Steps to reset PM3393 using RSTB pin:  in pm3393_mac_reset()
699 	 * 1. Assert RSTB pin low ( write 0 )  in pm3393_mac_reset()
700 	 * 2. Wait at least 1ms to initiate a complete initialization of device.  in pm3393_mac_reset()
702 	 * 4. Wait minimum of 1ms. (after external clocks and REFEL are stable)  in pm3393_mac_reset()
703 	 * 5. De-assert RSTB ( write 1 )  in pm3393_mac_reset()
704 	 * 6. Wait until internal timers to expires after ~14ms.  in pm3393_mac_reset()
705 	 *    - Allows analog clock synthesizer(PL4CSU) to stabilize to  in pm3393_mac_reset()
709 	 * 8. Verify the PM3393 came out of reset successfully.  in pm3393_mac_reset()
710 	 *    Set successful reset flag if everything worked else try again  in pm3393_mac_reset()
728 		msleep(2 /*1 extra ms for safety */ );  in pm3393_mac_reset()
735 		msleep(15 /*1 extra ms for safety */ );  in pm3393_mac_reset()
742 		/* Has PL4 analog block come out of reset correctly? */  in pm3393_mac_reset()
757 		/* ??? If this fails, might be able to software reset the XAUI part  in pm3393_mac_reset()
758 		 *     and try to recover... thus saving us from doing another HW reset */  in pm3393_mac_reset()
767 			dev_dbg(&adapter->pdev->dev,  in pm3393_mac_reset()
768 				"PM3393 HW reset %d: pl4_reset 0x%x, val 0x%x, "  in pm3393_mac_reset()
779 	.reset               = pm3393_mac_reset,