Lines Matching refs:tg3_flag
91 #define tg3_flag(tp, flag) \ macro
130 (tg3_flag(tp, JUMBO_CAPABLE) ? 9000 : 1500)
137 (tg3_flag(tp, LRG_PROD_RING_CAP) ? \
141 (tg3_flag(tp, LRG_PROD_RING_CAP) ? \
212 #define TG3_MAX_UCAST_ADDR(tp) (tg3_flag((tp), ENABLE_ASF) ? 2 : 3)
213 #define TG3_UCAST_ADDR_IDX(tp) (tg3_flag((tp), ENABLE_ASF) ? 2 : 1)
565 if (tg3_flag(tp, PCIX_TARGET_HWBUG) || tg3_flag(tp, ICH_WORKAROUND)) in _tw32_flush()
585 if (tg3_flag(tp, FLUSH_POSTED_WRITES) || in tw32_mailbox_flush()
586 (!tg3_flag(tp, MBOX_WRITE_REORDER) && in tw32_mailbox_flush()
587 !tg3_flag(tp, ICH_WORKAROUND))) in tw32_mailbox_flush()
595 if (tg3_flag(tp, TXD_MBOX_HWBUG)) in tg3_write32_tx_mbox()
597 if (tg3_flag(tp, MBOX_WRITE_REORDER) || in tg3_write32_tx_mbox()
598 tg3_flag(tp, FLUSH_POSTED_WRITES)) in tg3_write32_tx_mbox()
632 if (tg3_flag(tp, SRAM_USE_CONFIG)) { in tg3_write_mem()
659 if (tg3_flag(tp, SRAM_USE_CONFIG)) { in tg3_read_mem()
711 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_lock()
772 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_unlock()
849 if (!tg3_flag(tp, APE_HAS_NCSI)) in tg3_ape_scratchpad_read()
940 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_driver_state_change()
963 tg3_flag(tp, WOL_ENABLE)) { in tg3_ape_driver_state_change()
987 if (!tg3_flag(tp, ENABLE_APE) || in tg3_send_ape_heartbeat()
1020 if (tg3_flag(tp, 1SHOT_MSI)) in tg3_enable_ints()
1027 if (!tg3_flag(tp, TAGGED_STATUS) && in tg3_enable_ints()
1043 if (!(tg3_flag(tp, USE_LINKCHG_REG) || tg3_flag(tp, POLL_SERDES))) { in tg3_has_work()
1075 if (!tg3_flag(tp, TAGGED_STATUS) && tg3_has_work(tnapi)) in tg3_int_reenable()
1085 if (tg3_flag(tp, CPMU_PRESENT) || tg3_flag(tp, 5780_CLASS)) in tg3_switch_clocks()
1096 if (tg3_flag(tp, 5705_PLUS)) { in tg3_switch_clocks()
1446 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) in tg3_mdio_config_5785()
1459 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) { in tg3_mdio_config_5785()
1460 if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) in tg3_mdio_config_5785()
1462 if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) in tg3_mdio_config_5785()
1477 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) { in tg3_mdio_config_5785()
1478 if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) in tg3_mdio_config_5785()
1483 if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) in tg3_mdio_config_5785()
1497 if (tg3_flag(tp, MDIOBUS_INITED) && in tg3_mdio_start()
1508 if (tg3_flag(tp, 5717_PLUS)) { in tg3_mdio_init()
1520 } else if (tg3_flag(tp, IS_SSB_CORE) && tg3_flag(tp, ROBOSWITCH)) { in tg3_mdio_init()
1532 if (!tg3_flag(tp, USE_PHYLIB) || tg3_flag(tp, MDIOBUS_INITED)) in tg3_mdio_init()
1605 if (tg3_flag(tp, MDIOBUS_INITED)) { in tg3_mdio_fini()
1696 if (!tg3_flag(tp, 5780_CLASS) || !tg3_flag(tp, ENABLE_ASF)) in tg3_ump_link_report()
1716 if (tg3_flag(tp, ENABLE_ASF) && !tg3_flag(tp, ENABLE_APE)) { in tg3_stop_fw()
1735 if (tg3_flag(tp, ASF_NEW_HANDSHAKE)) { in tg3_write_sig_pre_reset()
1761 if (tg3_flag(tp, ASF_NEW_HANDSHAKE)) { in tg3_write_sig_post_reset()
1782 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_write_sig_legacy()
1810 if (tg3_flag(tp, NO_FWARE_REPORTED)) in tg3_poll_fw()
1813 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_poll_fw()
1837 if (!tg3_flag(tp, NO_FWARE_REPORTED)) { in tg3_poll_fw()
1853 if (i >= 100000 && !tg3_flag(tp, NO_FWARE_REPORTED)) { in tg3_poll_fw()
1966 if (tg3_flag(tp, USE_PHYLIB)) in tg3_setup_flow_control()
1971 if (autoneg == AUTONEG_ENABLE && tg3_flag(tp, PAUSE_AUTONEG)) { in tg3_setup_flow_control()
2221 if (!tg3_flag(tp, 5705_PLUS) || in tg3_phy_toggle_apd()
2222 (tg3_flag(tp, 5717_PLUS) && in tg3_phy_toggle_apd()
2252 if (!tg3_flag(tp, 5705_PLUS) || in tg3_phy_toggle_automdix()
2427 tg3_flag(tp, 57765_CLASS)) && in tg3_phy_eee_enable()
2619 if (tg3_flag(tp, ENABLE_ASF)) in tg3_warn_mgmt_link_flap()
2687 if (tg3_flag(tp, 5717_PLUS) && in tg3_phy_reset()
2737 } else if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_phy_reset()
2749 if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_phy_reset()
2809 if (!tg3_flag(tp, IS_NIC)) in tg3_pwrsrc_switch_to_vmain()
2836 if (!tg3_flag(tp, IS_NIC) || in tg3_pwrsrc_die_with_vmain()
2858 if (!tg3_flag(tp, IS_NIC)) in tg3_pwrsrc_switch_to_vaux()
2941 if (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE) || wol_enable) in tg3_frob_aux_power_5717()
2963 if (!tg3_flag(tp, IS_NIC) || tg3_flag(tp, 57765_CLASS)) in tg3_frob_aux_power()
2970 tg3_flag(tp, WOL_ENABLE) != 0 : 0); in tg3_frob_aux_power()
2983 if (tg3_flag(tp_peer, INIT_COMPLETE)) in tg3_frob_aux_power()
2986 if ((include_wol && tg3_flag(tp_peer, WOL_ENABLE)) || in tg3_frob_aux_power()
2987 tg3_flag(tp_peer, ENABLE_ASF)) in tg3_frob_aux_power()
2992 if ((include_wol && tg3_flag(tp, WOL_ENABLE)) || in tg3_frob_aux_power()
2993 tg3_flag(tp, ENABLE_ASF)) in tg3_frob_aux_power()
3131 if (tg3_flag(tp, NVRAM)) { in tg3_nvram_lock()
3154 if (tg3_flag(tp, NVRAM)) { in tg3_nvram_unlock()
3165 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) { in tg3_enable_nvram_access()
3175 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) { in tg3_disable_nvram_access()
3245 if (tg3_flag(tp, NVRAM) && in tg3_nvram_phys_addr()
3246 tg3_flag(tp, NVRAM_BUFFERED) && in tg3_nvram_phys_addr()
3247 tg3_flag(tp, FLASH) && in tg3_nvram_phys_addr()
3248 !tg3_flag(tp, NO_NVRAM_ADDR_TRANS) && in tg3_nvram_phys_addr()
3260 if (tg3_flag(tp, NVRAM) && in tg3_nvram_logical_addr()
3261 tg3_flag(tp, NVRAM_BUFFERED) && in tg3_nvram_logical_addr()
3262 tg3_flag(tp, FLASH) && in tg3_nvram_logical_addr()
3263 !tg3_flag(tp, NO_NVRAM_ADDR_TRANS) && in tg3_nvram_logical_addr()
3283 if (!tg3_flag(tp, NVRAM)) in tg3_nvram_read()
3497 !tg3_flag(tp, FLASH) || in tg3_nvram_write_block_buffered()
3498 !tg3_flag(tp, 57765_PLUS)) in tg3_nvram_write_block_buffered()
3502 !tg3_flag(tp, 5755_PLUS) && in tg3_nvram_write_block_buffered()
3512 if (!tg3_flag(tp, FLASH)) { in tg3_nvram_write_block_buffered()
3529 if (tg3_flag(tp, EEPROM_WRITE_PROT)) { in tg3_nvram_write_block()
3535 if (!tg3_flag(tp, NVRAM)) { in tg3_nvram_write_block()
3545 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) in tg3_nvram_write_block()
3551 if (tg3_flag(tp, NVRAM_BUFFERED) || !tg3_flag(tp, FLASH)) { in tg3_nvram_write_block()
3566 if (tg3_flag(tp, EEPROM_WRITE_PROT)) { in tg3_nvram_write_block()
3633 BUG_ON(cpu_base == TX_CPU_BASE && tg3_flag(tp, 5705_PLUS)); in tg3_halt_cpu()
3648 if (tg3_flag(tp, IS_SSB_CORE)) in tg3_halt_cpu()
3661 if (tg3_flag(tp, NVRAM)) in tg3_halt_cpu()
3702 if (cpu_base == TX_CPU_BASE && tg3_flag(tp, 5705_PLUS)) { in tg3_load_firmware_cpu()
3709 if (tg3_flag(tp, 5705_PLUS) && tg3_asic_rev(tp) != ASIC_REV_57766) in tg3_load_firmware_cpu()
3858 if (!tg3_flag(tp, NO_NVRAM)) in tg3_load_57766_firmware()
3901 if (!tg3_flag(tp, FW_TSO)) in tg3_load_tso_firmware()
4029 if (tg3_flag(tp, CLKREQ_BUG)) in tg3_power_down_prepare()
4038 tg3_flag(tp, WOL_ENABLE); in tg3_power_down_prepare()
4040 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_power_down_prepare()
4067 if (tg3_flag(tp, ENABLE_ASF) || device_should_wake) { in tg3_power_down_prepare()
4068 if (tg3_flag(tp, WOL_SPEED_100MB)) { in tg3_power_down_prepare()
4108 } else if (!tg3_flag(tp, ENABLE_ASF)) { in tg3_power_down_prepare()
4119 if (tg3_flag(tp, WOL_CAP)) in tg3_power_down_prepare()
4152 u32 speed = tg3_flag(tp, WOL_SPEED_100MB) ? in tg3_power_down_prepare()
4163 if (!tg3_flag(tp, 5750_PLUS)) in tg3_power_down_prepare()
4167 if ((tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, 5780_CLASS)) && in tg3_power_down_prepare()
4168 (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE))) in tg3_power_down_prepare()
4171 if (tg3_flag(tp, ENABLE_APE)) in tg3_power_down_prepare()
4183 if (!tg3_flag(tp, WOL_SPEED_100MB) && in tg3_power_down_prepare()
4194 } else if (tg3_flag(tp, 5780_CLASS) || in tg3_power_down_prepare()
4195 tg3_flag(tp, CPMU_PRESENT) || in tg3_power_down_prepare()
4198 } else if (!(tg3_flag(tp, 5750_PLUS) && tg3_flag(tp, ENABLE_ASF))) { in tg3_power_down_prepare()
4207 } else if (tg3_flag(tp, 5705_PLUS)) { in tg3_power_down_prepare()
4221 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_power_down_prepare()
4238 if (!(device_should_wake) && !tg3_flag(tp, ENABLE_ASF)) in tg3_power_down_prepare()
4244 if ((!tg3_flag(tp, IS_SSB_CORE)) && in tg3_power_down_prepare()
4251 if (!tg3_flag(tp, ENABLE_ASF)) { in tg3_power_down_prepare()
4270 pci_wake_from_d3(tp->pdev, tg3_flag(tp, WOL_ENABLE)); in tg3_power_down()
4415 if (tg3_flag(tp, WOL_SPEED_100MB)) in tg3_phy_copper_begin()
4759 if (tg3_flag(tp, ENABLE_APE)) in tg3_setup_eee()
4810 !tg3_flag(tp, INIT_COMPLETE)) in tg3_setup_copper_phy()
4974 if (tg3_flag(tp, ROBOSWITCH)) { in tg3_setup_copper_phy()
5004 if (tg3_flag(tp, RGMII_MODE)) { in tg3_setup_copper_phy()
5048 if (tg3_flag(tp, USE_LINKCHG_REG)) { in tg3_setup_copper_phy()
5059 (tg3_flag(tp, PCIX_MODE) || tg3_flag(tp, PCI_HIGH_SPEED))) { in tg3_setup_copper_phy()
5071 if (tg3_flag(tp, CLKREQ_BUG)) { in tg3_setup_copper_phy()
5453 if (tg3_flag(tp, INIT_COMPLETE) && in tg3_init_bcm8002()
5719 if (!tg3_flag(tp, HW_AUTONEG) && in tg3_setup_fiber_phy()
5721 tg3_flag(tp, INIT_COMPLETE)) { in tg3_setup_fiber_phy()
5752 if (tg3_flag(tp, HW_AUTONEG)) in tg3_setup_fiber_phy()
5974 } else if (!tg3_flag(tp, 5780_CLASS)) { in tg3_setup_fiber_mii_phy()
6106 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_setup_phy()
6115 if (tg3_flag(tp, ASPM_WORKAROUND)) { in tg3_setup_phy()
6162 if (tg3_flag(tp, PTP_CAPABLE)) { in tg3_get_ts_info()
6351 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_ptp_init()
6363 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_ptp_resume()
6372 if (!tg3_flag(tp, PTP_CAPABLE) || !tp->ptp_clock) in tg3_ptp_fini()
6416 if (tg3_flag(tp, SUPPORT_MSIX)) in tg3_dump_legacy_regs()
6428 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_dump_legacy_regs()
6440 if (tg3_flag(tp, NVRAM)) in tg3_dump_legacy_regs()
6453 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_dump_state()
6508 BUG_ON(tg3_flag(tp, MBOX_WRITE_REORDER) || in tg3_tx_recover()
6541 if (tg3_flag(tp, ENABLE_TSS)) in tg3_tx()
6974 if (!tg3_flag(tp, ENABLE_RSS)) { in tg3_rx()
7011 if (!(tg3_flag(tp, USE_LINKCHG_REG) || tg3_flag(tp, POLL_SERDES))) { in tg3_poll_link()
7018 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_poll_link()
7165 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll_work()
7179 if (tg3_flag(tp, ENABLE_RSS) && tnapi == &tp->napi[1]) { in tg3_poll_work()
7230 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll_msix()
7285 if (tg3_flag(tp, ERROR_PROCESSED)) in tg3_process_error()
7329 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll()
7335 if (tg3_flag(tp, TAGGED_STATUS)) { in tg3_poll()
7516 if (tg3_flag(tp, CHIP_RESETTING) || in tg3_interrupt()
7565 if (tg3_flag(tp, CHIP_RESETTING) || in tg3_interrupt_tagged()
7672 if (tg3_flag(tp, 40BIT_DMA_BUG)) in tg3_40bit_overflow_test()
7697 if (tg3_flag(tp, SHORT_DMA_BUG) && len <= 8) in tg3_tx_frag_set()
7913 if (tg3_flag(tp, ENABLE_TSS)) in tg3_start_xmit()
7961 tg3_flag(tp, TSO_BUG)) { in tg3_start_xmit()
7978 if (tg3_flag(tp, HW_TSO_1) || in tg3_start_xmit()
7979 tg3_flag(tp, HW_TSO_2) || in tg3_start_xmit()
7980 tg3_flag(tp, HW_TSO_3)) { in tg3_start_xmit()
7988 if (tg3_flag(tp, HW_TSO_3)) { in tg3_start_xmit()
7993 } else if (tg3_flag(tp, HW_TSO_2)) in tg3_start_xmit()
7995 else if (tg3_flag(tp, HW_TSO_1) || in tg3_start_xmit()
8024 if (tg3_flag(tp, USE_JUMBO_BDFLAG) && in tg3_start_xmit()
8034 tg3_flag(tp, TX_TSTAMP_EN)) { in tg3_start_xmit()
8052 if (tg3_flag(tp, 5701_DMA_BUG)) in tg3_start_xmit()
8062 if (!tg3_flag(tp, HW_TSO_1) && in tg3_start_xmit()
8063 !tg3_flag(tp, HW_TSO_2) && in tg3_start_xmit()
8064 !tg3_flag(tp, HW_TSO_3)) in tg3_start_xmit()
8165 if (!tg3_flag(tp, 5705_PLUS)) in tg3_mac_loopback()
8175 if (tg3_flag(tp, 5705_PLUS) || in tg3_mac_loopback()
8247 tg3_flag(tp, 5780_CLASS)) { in tg3_phy_lpbk_set()
8309 if (dev->mtu > ETH_DATA_LEN && tg3_flag(tp, 5780_CLASS)) in tg3_fix_features()
8336 if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_rx_prodring_free()
8352 if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) { in tg3_rx_prodring_free()
8389 if (tg3_flag(tp, 5780_CLASS) && in tg3_rx_prodring_alloc()
8425 if (!tg3_flag(tp, JUMBO_CAPABLE) || tg3_flag(tp, 5780_CLASS)) in tg3_rx_prodring_alloc()
8430 if (!tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_rx_prodring_alloc()
8502 if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) { in tg3_rx_prodring_init()
8625 if (tg3_flag(tp, ENABLE_TSS)) in tg3_mem_tx_acquire()
8679 if (tg3_flag(tp, ENABLE_RSS)) in tg3_mem_rx_acquire()
8692 if (!i && tg3_flag(tp, ENABLE_RSS)) in tg3_mem_rx_acquire()
8770 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_alloc_consistent()
8819 if (tg3_flag(tp, 5705_PLUS)) { in tg3_stop_block()
8955 tg3_flag(tp, PCIX_MODE)) in tg3_restore_pci_state()
8958 if (tg3_flag(tp, ENABLE_APE)) in tg3_restore_pci_state()
8966 if (!tg3_flag(tp, PCI_EXPRESS)) { in tg3_restore_pci_state()
8974 if (tg3_flag(tp, PCIX_MODE)) { in tg3_restore_pci_state()
8984 if (tg3_flag(tp, 5780_CLASS)) { in tg3_restore_pci_state()
8989 if (tg3_flag(tp, USING_MSI)) { in tg3_restore_pci_state()
9075 tg3_flag(tp, 5755_PLUS)) in tg3_chip_reset()
9121 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_chip_reset()
9124 !tg3_flag(tp, 57765_PLUS) && in tg3_chip_reset()
9149 if (tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, CPMU_PRESENT)) in tg3_chip_reset()
9182 if (tg3_flag(tp, PCI_EXPRESS) && pci_is_pcie(tp->pdev)) { in tg3_chip_reset()
9204 if (!tg3_flag(tp, CPMU_PRESENT)) in tg3_chip_reset()
9222 if (tg3_flag(tp, 5780_CLASS)) in tg3_chip_reset()
9231 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_chip_reset()
9277 if (tg3_flag(tp, PCI_EXPRESS) && in tg3_chip_reset()
9280 !tg3_flag(tp, 57765_PLUS)) { in tg3_chip_reset()
9311 if (tg3_flag(tp, 5750_PLUS)) in tg3_chip_reset()
9373 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_set_mac_addr()
9409 if (!tg3_flag(tp, 5705_PLUS)) in tg3_set_bdinfo()
9420 if (!tg3_flag(tp, ENABLE_TSS)) { in tg3_coal_tx_init()
9453 if (!tg3_flag(tp, ENABLE_RSS)) { in tg3_coal_rx_init()
9487 if (!tg3_flag(tp, 5705_PLUS)) { in __tg3_set_coalesce()
9506 if (!tg3_flag(tp, 5705_PLUS)) in tg3_tx_rcbs_disable()
9508 else if (tg3_flag(tp, 5717_PLUS)) in tg3_tx_rcbs_disable()
9510 else if (tg3_flag(tp, 57765_CLASS) || in tg3_tx_rcbs_disable()
9528 if (tg3_flag(tp, ENABLE_TSS)) in tg3_tx_rcbs_init()
9549 if (tg3_flag(tp, 5717_PLUS)) in tg3_rx_ret_rcbs_disable()
9551 else if (!tg3_flag(tp, 5705_PLUS)) in tg3_rx_ret_rcbs_disable()
9555 tg3_flag(tp, 57765_CLASS)) in tg3_rx_ret_rcbs_disable()
9572 if (tg3_flag(tp, ENABLE_RSS)) in tg3_rx_ret_rcbs_init()
9605 if (tg3_flag(tp, SUPPORT_MSIX)) { in tg3_rings_reset()
9609 if (tg3_flag(tp, ENABLE_TSS)) in tg3_rings_reset()
9617 if (!tg3_flag(tp, ENABLE_TSS)) in tg3_rings_reset()
9627 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_rings_reset()
9662 if (!tg3_flag(tp, 5750_PLUS) || in tg3_setup_rxbd_thresholds()
9663 tg3_flag(tp, 5780_CLASS) || in tg3_setup_rxbd_thresholds()
9666 tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9680 if (tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9683 if (!tg3_flag(tp, JUMBO_CAPABLE) || tg3_flag(tp, 5780_CLASS)) in tg3_setup_rxbd_thresholds()
9693 if (tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9742 if (!tg3_flag(tp, ENABLE_ASF)) in __tg3_set_rx_mode()
9810 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_rss_check_indir_tbl()
9866 if (tg3_flag(tp, INIT_COMPLETE)) in tg3_reset_hw()
9925 if (tg3_flag(tp, L1PLLPD_EN)) { in tg3_reset_hw()
9939 if (tg3_flag(tp, 57765_CLASS)) { in tg3_reset_hw()
9989 if (!tg3_flag(tp, CPMU_PRESENT)) { in tg3_reset_hw()
9990 if (!tg3_flag(tp, PCI_EXPRESS)) in tg3_reset_hw()
9996 tg3_flag(tp, PCIX_MODE)) { in tg3_reset_hw()
10002 if (tg3_flag(tp, ENABLE_APE)) { in tg3_reset_hw()
10029 if (tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10034 if (!tg3_flag(tp, 57765_CLASS) && in tg3_reset_hw()
10066 if (tg3_flag(tp, PTP_CAPABLE)) in tg3_reset_hw()
10088 if (tg3_flag(tp, 5750_PLUS)) { in tg3_reset_hw()
10098 } else if (tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10174 if (!tg3_flag(tp, 5717_PLUS)) in tg3_reset_hw()
10179 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10187 (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS))) { in tg3_reset_hw()
10189 if (tg3_flag(tp, JUMBO_RING_ENABLE)) { in tg3_reset_hw()
10198 if (!tg3_flag(tp, USE_JUMBO_BDFLAG) || in tg3_reset_hw()
10199 tg3_flag(tp, 57765_CLASS) || in tg3_reset_hw()
10208 if (tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10223 tg3_flag(tp, JUMBO_RING_ENABLE) ? tp->rx_jumbo_pending : 0; in tg3_reset_hw()
10275 if (tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10278 !tg3_flag(tp, IS_5788)) { in tg3_reset_hw()
10283 if (tg3_flag(tp, PCI_EXPRESS)) in tg3_reset_hw()
10294 if (tg3_flag(tp, HW_TSO_1) || in tg3_reset_hw()
10295 tg3_flag(tp, HW_TSO_2) || in tg3_reset_hw()
10296 tg3_flag(tp, HW_TSO_3)) in tg3_reset_hw()
10299 if (tg3_flag(tp, 57765_PLUS) || in tg3_reset_hw()
10312 tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10350 if (tg3_flag(tp, 5750_PLUS)) { in tg3_reset_hw()
10355 tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10378 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_reset_hw()
10404 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10417 if (tg3_flag(tp, ENABLE_APE)) in tg3_reset_hw()
10419 if (!tg3_flag(tp, 5705_PLUS) && in tg3_reset_hw()
10432 if (!tg3_flag(tp, IS_NIC)) { in tg3_reset_hw()
10450 if (tg3_flag(tp, EEPROM_WRITE_PROT)) in tg3_reset_hw()
10457 if (tg3_flag(tp, USING_MSIX)) { in tg3_reset_hw()
10462 if (!tg3_flag(tp, 1SHOT_MSI)) in tg3_reset_hw()
10467 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_reset_hw()
10480 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_reset_hw()
10485 !tg3_flag(tp, IS_5788)) { in tg3_reset_hw()
10491 if (tg3_flag(tp, 5755_PLUS)) in tg3_reset_hw()
10500 if (tg3_flag(tp, PCIX_MODE)) { in tg3_reset_hw()
10534 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10546 if (tg3_flag(tp, LRG_PROD_RING_CAP)) in tg3_reset_hw()
10550 if (tg3_flag(tp, HW_TSO_1) || in tg3_reset_hw()
10551 tg3_flag(tp, HW_TSO_2) || in tg3_reset_hw()
10552 tg3_flag(tp, HW_TSO_3)) in tg3_reset_hw()
10555 if (tg3_flag(tp, ENABLE_TSS)) in tg3_reset_hw()
10573 if (tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10581 if (tg3_flag(tp, 5755_PLUS) || in tg3_reset_hw()
10595 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_reset_hw()
10607 if (tg3_flag(tp, 5755_PLUS)) in tg3_reset_hw()
10613 if (tg3_flag(tp, ENABLE_RSS)) in tg3_reset_hw()
10651 if (tg3_flag(tp, 57765_CLASS)) in tg3_reset_hw()
10674 if (!tg3_flag(tp, USE_PHYLIB)) { in tg3_reset_hw()
10703 if (tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, 5780_CLASS)) in tg3_reset_hw()
10707 if (tg3_flag(tp, ENABLE_ASF)) in tg3_reset_hw()
10757 if (tg3_flag(tp, ENABLE_APE)) in tg3_reset_hw()
10900 if (unlikely(tg3_flag(tp, 5719_5720_RDMA_BUG) && in tg3_periodic_fetch_stats()
10975 if (tp->irq_sync || tg3_flag(tp, RESET_TASK_PENDING)) { in tg3_timer()
10981 tg3_flag(tp, 57765_CLASS)) in tg3_timer()
10984 if (tg3_flag(tp, FLUSH_POSTED_WRITES)) { in tg3_timer()
10989 if (!tg3_flag(tp, TAGGED_STATUS)) { in tg3_timer()
11011 if (tg3_flag(tp, 5705_PLUS)) in tg3_timer()
11017 if (tg3_flag(tp, USE_LINKCHG_REG)) { in tg3_timer()
11032 } else if (tg3_flag(tp, POLL_SERDES)) { in tg3_timer()
11057 tg3_flag(tp, 5780_CLASS)) { in tg3_timer()
11059 } else if (tg3_flag(tp, POLL_CPMU_LINK)) { in tg3_timer()
11089 if (tg3_flag(tp, ENABLE_ASF) && !tg3_flag(tp, ENABLE_APE)) { in tg3_timer()
11115 if (tg3_flag(tp, TAGGED_STATUS) && in tg3_timer_init()
11117 !tg3_flag(tp, 57765_CLASS)) in tg3_timer_init()
11192 if (tg3_flag(tp, TX_RECOVERY_PENDING)) { in tg3_reset_task()
11247 if (tg3_flag(tp, USING_MSI) || tg3_flag(tp, USING_MSIX)) { in tg3_request_irq()
11249 if (tg3_flag(tp, 1SHOT_MSI)) in tg3_request_irq()
11254 if (tg3_flag(tp, TAGGED_STATUS)) in tg3_request_irq()
11280 if (tg3_flag(tp, 57765_PLUS)) { in tg3_test_interrupt()
11308 if (tg3_flag(tp, 57765_PLUS) && in tg3_test_interrupt()
11326 if (tg3_flag(tp, 57765_PLUS) && tg3_flag(tp, 1SHOT_MSI)) { in tg3_test_interrupt()
11344 if (!tg3_flag(tp, USING_MSI)) in tg3_test_msi()
11505 if ((tg3_flag(tp, SUPPORT_MSI) || tg3_flag(tp, SUPPORT_MSIX)) && in tg3_ints_init()
11506 !tg3_flag(tp, TAGGED_STATUS)) { in tg3_ints_init()
11515 if (tg3_flag(tp, SUPPORT_MSIX) && tg3_enable_msix(tp)) in tg3_ints_init()
11517 else if (tg3_flag(tp, SUPPORT_MSI) && pci_enable_msi(tp->pdev) == 0) in tg3_ints_init()
11520 if (tg3_flag(tp, USING_MSI) || tg3_flag(tp, USING_MSIX)) { in tg3_ints_init()
11522 if (tg3_flag(tp, USING_MSIX) && tp->irq_cnt > 1) in tg3_ints_init()
11524 if (!tg3_flag(tp, 1SHOT_MSI)) in tg3_ints_init()
11529 if (!tg3_flag(tp, USING_MSIX)) { in tg3_ints_init()
11544 if (tg3_flag(tp, USING_MSIX)) in tg3_ints_fini()
11546 else if (tg3_flag(tp, USING_MSI)) in tg3_ints_fini()
11607 if (test_irq && tg3_flag(tp, USING_MSI)) { in tg3_start()
11619 if (!tg3_flag(tp, 57765_PLUS) && tg3_flag(tp, USING_MSI)) { in tg3_start()
11731 } else if (!tg3_flag(tp, TSO_CAPABLE)) { in tg3_open()
11991 if (tg3_flag(tp, NO_NVRAM)) in tg3_get_eeprom()
12001 if (tg3_flag(tp, CPMU_PRESENT)) { in tg3_get_eeprom()
12082 if (tg3_flag(tp, NO_NVRAM) || in tg3_set_eeprom()
12136 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_get_link_ksettings()
12167 if (tg3_flag(tp, PAUSE_AUTONEG)) { in tg3_get_link_ksettings()
12212 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_set_link_ksettings()
12314 if (tg3_flag(tp, WOL_CAP) && device_can_wakeup(&tp->pdev->dev)) in tg3_get_wol()
12319 if (tg3_flag(tp, WOL_ENABLE) && device_can_wakeup(&tp->pdev->dev)) in tg3_get_wol()
12332 !(tg3_flag(tp, WOL_CAP) && device_can_wakeup(dp))) in tg3_set_wol()
12370 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_nway_reset()
12401 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_get_ringparam()
12409 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_get_ringparam()
12430 (tg3_flag(tp, TSO_BUG) && in tg3_set_ringparam()
12444 if (tg3_flag(tp, MAX_RXPEND_64) && in tg3_set_ringparam()
12448 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_set_ringparam()
12479 epause->autoneg = !!tg3_flag(tp, PAUSE_AUTONEG); in tg3_get_pauseparam()
12501 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_set_pauseparam()
12602 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_get_rxnfc()
12627 if (tg3_flag(tp, SUPPORT_MSIX)) in tg3_get_rxfh_indir_size()
12668 if (!netif_running(dev) || !tg3_flag(tp, ENABLE_RSS)) in tg3_set_rxfh()
12711 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_set_channels()
12798 if (tg3_flag(tp, NO_NVRAM) || tg3_nvram_read(tp, 0, &magic)) in tg3_vpd_readblock()
12869 if (tg3_flag(tp, NO_NVRAM)) in tg3_test_nvram()
13196 if (tg3_flag(tp, 5705_PLUS)) { in tg3_test_registers()
13198 if (tg3_flag(tp, 5750_PLUS)) in tg3_test_registers()
13209 if (tg3_flag(tp, IS_5788) && in tg3_test_registers()
13332 if (tg3_flag(tp, 5717_PLUS)) in tg3_test_memory()
13334 else if (tg3_flag(tp, 57765_CLASS) || in tg3_test_memory()
13337 else if (tg3_flag(tp, 5755_PLUS)) in tg3_test_memory()
13341 else if (tg3_flag(tp, 5705_PLUS)) in tg3_test_memory()
13394 if (tg3_flag(tp, ENABLE_RSS)) in tg3_run_loopback()
13396 if (tg3_flag(tp, ENABLE_TSS)) in tg3_run_loopback()
13433 if (tg3_flag(tp, HW_TSO_1) || in tg3_run_loopback()
13434 tg3_flag(tp, HW_TSO_2) || in tg3_run_loopback()
13435 tg3_flag(tp, HW_TSO_3)) { in tg3_run_loopback()
13443 if (tg3_flag(tp, HW_TSO_3)) { in tg3_run_loopback()
13448 } else if (tg3_flag(tp, HW_TSO_2)) in tg3_run_loopback()
13450 else if (tg3_flag(tp, HW_TSO_1) || in tg3_run_loopback()
13462 if (tg3_flag(tp, USE_JUMBO_BDFLAG) && in tg3_run_loopback()
13623 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_test_loopback()
13638 !tg3_flag(tp, CPMU_PRESENT)) { in tg3_test_loopback()
13644 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13652 !tg3_flag(tp, USE_PHYLIB)) { in tg3_test_loopback()
13666 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_test_loopback()
13669 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13685 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_test_loopback()
13689 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13747 if (!tg3_flag(tp, 5705_PLUS)) in tg3_self_test()
13803 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_hwtstamp_set()
13887 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_hwtstamp_get()
13891 stmpconf.tx_type = (tg3_flag(tp, TX_TSTAMP_EN) ? in tg3_hwtstamp_get()
13949 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_ioctl()
14028 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_set_coalesce()
14167 if (!tp->hw_stats || !tg3_flag(tp, INIT_COMPLETE)) { in tg3_get_stats64()
14195 if (tg3_flag(tp, 5780_CLASS)) { in tg3_set_mtu()
14202 if (tg3_flag(tp, 5780_CLASS)) { in tg3_set_mtu()
14312 if (tg3_flag(tp, NO_NVRAM) || tg3_nvram_read(tp, 0, &val) != 0) in tg3_get_nvram_size()
14354 tg3_flag(tp, 5780_CLASS)) { in tg3_get_nvram_info()
14449 if (tg3_flag(tp, FLASH)) { in tg3_get_5752_nvram_info()
14954 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_nvram_init()
15001 tg3_flag(tp, 57765_CLASS)) in tg3_nvram_init()
15179 if (!tg3_flag(tp, 5705_PLUS)) in tg3_get_eeprom_hw_cfg()
15185 if (tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15220 if (tg3_flag(tp, 5717_PLUS) || in tg3_get_eeprom_hw_cfg()
15262 if (tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15267 tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15274 if (tg3_flag(tp, WOL_CAP) && in tg3_get_eeprom_hw_cfg()
15288 if ((tg3_flag(tp, 57765_PLUS) || in tg3_get_eeprom_hw_cfg()
15294 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_get_eeprom_hw_cfg()
15299 !tg3_flag(tp, 57765_PLUS) && in tg3_get_eeprom_hw_cfg()
15319 if (tg3_flag(tp, WOL_CAP)) in tg3_get_eeprom_hw_cfg()
15321 tg3_flag(tp, WOL_ENABLE)); in tg3_get_eeprom_hw_cfg()
15447 if (tg3_flag(tp, ENABLE_APE)) { in tg3_phy_probe()
15464 if (!tg3_flag(tp, ENABLE_ASF) && in tg3_phy_probe()
15470 if (tg3_flag(tp, USE_PHYLIB)) in tg3_phy_probe()
15477 if (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE)) { in tg3_phy_probe()
15515 } else if (!tg3_flag(tp, IS_SSB_CORE)) { in tg3_phy_probe()
15556 !tg3_flag(tp, ENABLE_APE) && in tg3_phy_probe()
15557 !tg3_flag(tp, ENABLE_ASF)) { in tg3_phy_probe()
15842 if (!tg3_flag(tp, 5705_PLUS)) in tg3_read_mgmtfw_ver()
15900 if (tg3_flag(tp, APE_HAS_NCSI)) in tg3_read_dash_ver()
15950 if (tg3_flag(tp, NO_NVRAM)) { in tg3_read_fw_ver()
15966 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_read_fw_ver()
15967 if (tg3_flag(tp, ENABLE_APE)) { in tg3_read_fw_ver()
15981 if (tg3_flag(tp, LRG_PROD_RING_CAP)) in tg3_rx_ret_ring_size()
15983 else if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) in tg3_rx_ret_ring_size()
16082 if (tg3_flag(tp, 57765_CLASS) || tg3_flag(tp, 5717_PLUS) || in tg3_detect_asic_rev()
16093 tg3_flag(tp, 57765_PLUS)) in tg3_detect_asic_rev()
16103 tg3_flag(tp, 5755_PLUS) || in tg3_detect_asic_rev()
16104 tg3_flag(tp, 5780_CLASS)) in tg3_detect_asic_rev()
16108 tg3_flag(tp, 5750_PLUS)) in tg3_detect_asic_rev()
16263 if (tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16292 else if (tg3_flag(tp, 57765_PLUS)) in tg3_get_invariants()
16294 else if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16297 else if (tg3_flag(tp, 5750_PLUS)) { in tg3_get_invariants()
16315 if (tg3_flag(tp, HW_TSO_1) || in tg3_get_invariants()
16316 tg3_flag(tp, HW_TSO_2) || in tg3_get_invariants()
16317 tg3_flag(tp, HW_TSO_3) || in tg3_get_invariants()
16318 tg3_flag(tp, FW_TSO)) { in tg3_get_invariants()
16338 if (tg3_flag(tp, 5750_PLUS)) { in tg3_get_invariants()
16347 if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16352 if (tg3_flag(tp, 57765_PLUS)) { in tg3_get_invariants()
16369 if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16382 if (tg3_flag(tp, 57765_PLUS) && in tg3_get_invariants()
16386 if (!tg3_flag(tp, 5705_PLUS) || in tg3_get_invariants()
16387 tg3_flag(tp, 5780_CLASS) || in tg3_get_invariants()
16388 tg3_flag(tp, USE_JUMBO_BDFLAG)) in tg3_get_invariants()
16419 } else if (!tg3_flag(tp, 5705_PLUS) || in tg3_get_invariants()
16420 tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16439 !tg3_flag(tp, PCI_EXPRESS)) in tg3_get_invariants()
16467 if (tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16513 if (tg3_flag(tp, PCIX_TARGET_HWBUG)) in tg3_get_invariants()
16516 (tg3_flag(tp, PCI_EXPRESS) && in tg3_get_invariants()
16528 if (tg3_flag(tp, TXD_MBOX_HWBUG) || tg3_flag(tp, MBOX_WRITE_REORDER)) { in tg3_get_invariants()
16530 if (tg3_flag(tp, MBOX_WRITE_REORDER)) in tg3_get_invariants()
16534 if (tg3_flag(tp, ICH_WORKAROUND)) { in tg3_get_invariants()
16557 (tg3_flag(tp, PCIX_MODE) && in tg3_get_invariants()
16572 tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16573 if (tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16593 if (tg3_flag(tp, FLUSH_POSTED_WRITES)) { in tg3_get_invariants()
16608 if (tg3_flag(tp, FW_TSO) && tg3_flag(tp, ENABLE_ASF)) { in tg3_get_invariants()
16614 if (tg3_flag(tp, ENABLE_APE)) { in tg3_get_invariants()
16636 tg3_flag(tp, EEPROM_WRITE_PROT)) in tg3_get_invariants()
16647 tg3_flag(tp, 57765_CLASS)) in tg3_get_invariants()
16654 if (tg3_flag(tp, IS_NIC)) in tg3_get_invariants()
16670 if (tp->dev->mtu > ETH_DATA_LEN && !tg3_flag(tp, 5780_CLASS)) in tg3_get_invariants()
16701 if (tg3_flag(tp, 5705_PLUS) && in tg3_get_invariants()
16705 !tg3_flag(tp, 57765_PLUS)) { in tg3_get_invariants()
16726 if (tg3_flag(tp, CPMU_PRESENT)) in tg3_get_invariants()
16778 !tg3_flag(tp, PCIX_TARGET_HWBUG)) { in tg3_get_invariants()
16804 !tg3_flag(tp, NO_NVRAM)) in tg3_get_invariants()
16815 if (!tg3_flag(tp, IS_5788) && in tg3_get_invariants()
16818 if (tg3_flag(tp, TAGGED_STATUS)) { in tg3_get_invariants()
16828 if (tg3_flag(tp, ENABLE_APE)) in tg3_get_invariants()
16881 if (tg3_flag(tp, ENABLE_APE) && tg3_flag(tp, ENABLE_ASF)) in tg3_get_invariants()
16887 tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16908 if (tg3_flag(tp, ASPM_WORKAROUND)) in tg3_get_invariants()
16924 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_get_device_address()
16932 tg3_flag(tp, 5780_CLASS)) { in tg3_get_device_address()
16939 } else if (tg3_flag(tp, 5717_PLUS)) { in tg3_get_device_address()
16964 if (!tg3_flag(tp, NO_NVRAM) && in tg3_get_device_address()
17009 !tg3_flag(tp, PCI_EXPRESS)) in tg3_calc_dma_bndry()
17022 if (tg3_flag(tp, 57765_PLUS)) { in tg3_calc_dma_bndry()
17041 if (tg3_flag(tp, PCIX_MODE) && !tg3_flag(tp, PCI_EXPRESS)) { in tg3_calc_dma_bndry()
17066 } else if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_calc_dma_bndry()
17239 if (tg3_flag(tp, 57765_PLUS)) in tg3_test_dma()
17242 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_test_dma()
17245 } else if (!tg3_flag(tp, PCIX_MODE)) { in tg3_test_dma()
17261 if (tg3_flag(tp, 40BIT_DMA_BUG) && in tg3_test_dma()
17284 if (tg3_flag(tp, ONE_DMA_AT_ONCE)) in tg3_test_dma()
17397 if (tg3_flag(tp, 57765_PLUS)) { in tg3_init_bufmgr_config()
17411 } else if (tg3_flag(tp, 5705_PLUS)) { in tg3_init_bufmgr_config()
17485 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_bus_string()
17488 } else if (tg3_flag(tp, PCIX_MODE)) { in tg3_bus_string()
17507 if (tg3_flag(tp, PCI_HIGH_SPEED)) in tg3_bus_string()
17512 if (tg3_flag(tp, PCI_32BIT)) in tg3_bus_string()
17543 if (tg3_flag(tp, 5705_PLUS)) { in tg3_init_coal()
17689 if (tg3_flag(tp, IS_5788)) in tg3_init_one()
17691 else if (tg3_flag(tp, 40BIT_DMA_BUG)) { in tg3_init_one()
17730 if (tg3_flag(tp, 5755_PLUS)) in tg3_init_one()
17738 if ((tg3_flag(tp, HW_TSO_1) || in tg3_init_one()
17739 tg3_flag(tp, HW_TSO_2) || in tg3_init_one()
17740 tg3_flag(tp, HW_TSO_3)) && in tg3_init_one()
17743 if (tg3_flag(tp, HW_TSO_2) || tg3_flag(tp, HW_TSO_3)) { in tg3_init_one()
17746 if (tg3_flag(tp, HW_TSO_3) || in tg3_init_one()
17765 !tg3_flag(tp, CPMU_PRESENT)) in tg3_init_one()
17777 !tg3_flag(tp, TSO_CAPABLE) && in tg3_init_one()
17814 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_init_one()
17873 if (tg3_flag(tp, PTP_CAPABLE)) { in tg3_init_one()
17906 tg3_flag(tp, USE_LINKCHG_REG) != 0, in tg3_init_one()
17908 tg3_flag(tp, ENABLE_ASF) != 0, in tg3_init_one()
17909 tg3_flag(tp, TSO_CAPABLE) != 0); in tg3_init_one()
17956 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_remove_one()