Lines Matching refs:tg3_asic_rev
627 if (tg3_asic_rev(tp) == ASIC_REV_5906 && in tg3_write_mem()
652 if (tg3_asic_rev(tp) == ASIC_REV_5906 && in tg3_read_mem()
680 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_lock_init()
716 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_lock()
736 if (tg3_asic_rev(tp) == ASIC_REV_5761) { in tg3_ape_lock()
777 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_unlock()
797 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_unlock()
1498 tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_mdio_start()
1597 if (tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_mdio_init()
1818 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_poll_fw()
2019 tg3_asic_rev(tp) != ASIC_REV_5785) in tg3_adjust_link()
2046 if (tg3_asic_rev(tp) == ASIC_REV_5785) { in tg3_adjust_link()
2235 if (tg3_asic_rev(tp) != ASIC_REV_5784 || !enable) in tg3_phy_toggle_apd()
2425 (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_phy_eee_enable()
2426 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_phy_eee_enable()
2632 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_phy_reset()
2647 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_phy_reset()
2648 tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_phy_reset()
2649 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_phy_reset()
2657 if (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_phy_reset()
2755 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_phy_reset()
2788 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_set_function_status()
2789 tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_set_function_status()
2798 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_set_function_status()
2799 tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_set_function_status()
2812 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_pwrsrc_switch_to_vmain()
2813 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_pwrsrc_switch_to_vmain()
2814 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_pwrsrc_switch_to_vmain()
2837 tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_pwrsrc_die_with_vmain()
2838 tg3_asic_rev(tp) == ASIC_REV_5701) in tg3_pwrsrc_die_with_vmain()
2861 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_pwrsrc_switch_to_vaux()
2862 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_pwrsrc_switch_to_vaux()
2894 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_pwrsrc_switch_to_vaux()
2966 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_frob_aux_power()
2967 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_frob_aux_power()
2968 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_frob_aux_power()
3017 switch (tg3_asic_rev(tp)) { in tg3_phy_power_bug()
3042 switch (tg3_asic_rev(tp)) { in tg3_phy_led_bug()
3062 if (tg3_asic_rev(tp) == ASIC_REV_5704) { in tg3_power_down_phy()
3074 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_power_down_phy()
3501 if (tg3_asic_rev(tp) != ASIC_REV_5752 && in tg3_nvram_write_block_buffered()
3635 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_halt_cpu()
3709 if (tg3_flag(tp, 5705_PLUS) && tg3_asic_rev(tp) != ASIC_REV_57766) in tg3_load_firmware_cpu()
3714 if (tg3_asic_rev(tp) != ASIC_REV_57766) { in tg3_load_firmware_cpu()
3914 if (tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_load_tso_firmware()
3976 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in __tg3_set_mac_addr()
3977 tg3_asic_rev(tp) == ASIC_REV_5704) { in __tg3_set_mac_addr()
4103 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_power_down_prepare()
4151 if (tg3_asic_rev(tp) == ASIC_REV_5700) { in tg3_power_down_prepare()
4184 (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_power_down_prepare()
4185 tg3_asic_rev(tp) == ASIC_REV_5701)) { in tg3_power_down_prepare()
4196 tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_power_down_prepare()
4201 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_power_down_prepare()
4202 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_power_down_prepare()
4224 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_power_down_prepare()
4225 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_power_down_prepare()
4377 switch (tg3_asic_rev(tp)) { in tg3_phy_autoneg_cfg()
4455 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_phy_copper_begin()
4756 if (tg3_asic_rev(tp) != ASIC_REV_5717) in tg3_setup_eee()
4795 if ((tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_setup_copper_phy()
4796 tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_setup_copper_phy()
4797 tg3_asic_rev(tp) == ASIC_REV_5705) && in tg3_setup_copper_phy()
4857 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_setup_copper_phy()
4858 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_setup_copper_phy()
5025 if (tg3_asic_rev(tp) == ASIC_REV_5700) { in tg3_setup_copper_phy()
5056 if (tg3_asic_rev(tp) == ASIC_REV_5700 && in tg3_setup_copper_phy()
5817 if ((tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_setup_fiber_mii_phy()
5818 tg3_asic_rev(tp) == ASIC_REV_5720) && in tg3_setup_fiber_mii_phy()
5869 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_setup_fiber_mii_phy()
5938 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_setup_fiber_mii_phy()
6092 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_setup_phy()
6093 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_setup_phy()
7659 if (tg3_asic_rev(tp) == ASIC_REV_5762 && mss) { in tg3_4g_tso_overflow_test()
7800 if (tg3_asic_rev(tp) != ASIC_REV_5701) in tigon3_dma_hwbug_workaround()
7996 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_start_xmit()
8177 tg3_asic_rev(tp) == ASIC_REV_5700) in tg3_mac_loopback()
8236 tg3_asic_rev(tp) == ASIC_REV_5785) { in tg3_phy_lpbk_set()
8260 if (tg3_asic_rev(tp) == ASIC_REV_5700) { in tg3_phy_lpbk_set()
9008 switch (tg3_asic_rev(tp)) { in tg3_override_clk()
9029 switch (tg3_asic_rev(tp)) { in tg3_restore_clk()
9074 if (tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_chip_reset()
9113 if (tg3_asic_rev(tp) == ASIC_REV_57780) { in tg3_chip_reset()
9123 if (tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_chip_reset()
9135 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_chip_reset()
9254 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_chip_reset()
9279 tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_chip_reset()
9291 if (tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_chip_reset()
9511 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_tx_rcbs_disable()
9553 else if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_rx_ret_rcbs_disable()
9554 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_rx_ret_rcbs_disable()
9664 tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_setup_rxbd_thresholds()
9665 tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_setup_rxbd_thresholds()
9668 else if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_setup_rxbd_thresholds()
9669 tg3_asic_rev(tp) == ASIC_REV_5787) in tg3_setup_rxbd_thresholds()
9847 if (tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_lso_rd_dma_workaround_bit()
9910 if (tg3_asic_rev(tp) == ASIC_REV_57780) { in tg3_reset_hw()
10035 tg3_asic_rev(tp) != ASIC_REV_5717 && in tg3_reset_hw()
10036 tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_reset_hw()
10039 } else if (tg3_asic_rev(tp) != ASIC_REV_5784 && in tg3_reset_hw()
10040 tg3_asic_rev(tp) != ASIC_REV_5761) { in tg3_reset_hw()
10090 } else if (tg3_asic_rev(tp) != ASIC_REV_5705) { in tg3_reset_hw()
10092 if (tg3_asic_rev(tp) == ASIC_REV_5704) in tg3_reset_hw()
10130 if (tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_reset_hw()
10132 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_reset_hw()
10133 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_reset_hw()
10200 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10242 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10243 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10263 if (tg3_asic_rev(tp) == ASIC_REV_5717) in tg3_reset_hw()
10266 if (tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_reset_hw()
10267 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_reset_hw()
10268 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_reset_hw()
10273 if (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_reset_hw()
10286 if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_reset_hw()
10300 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_reset_hw()
10301 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_reset_hw()
10304 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10305 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10308 if (tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_reset_hw()
10309 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_reset_hw()
10310 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_reset_hw()
10311 tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_reset_hw()
10315 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10322 tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_reset_hw()
10333 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_reset_hw()
10334 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10335 tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_reset_hw()
10338 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10421 tg3_asic_rev(tp) != ASIC_REV_5700) in tg3_reset_hw()
10439 if (tg3_asic_rev(tp) == ASIC_REV_5752) in tg3_reset_hw()
10443 if (tg3_asic_rev(tp) == ASIC_REV_5755) in tg3_reset_hw()
10478 if (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_reset_hw()
10494 if (tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_reset_hw()
10505 if (tg3_asic_rev(tp) == ASIC_REV_5703) { in tg3_reset_hw()
10508 } else if (tg3_asic_rev(tp) == ASIC_REV_5704) { in tg3_reset_hw()
10519 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_reset_hw()
10520 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_reset_hw()
10537 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_reset_hw()
10566 if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_reset_hw()
10582 tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_reset_hw()
10585 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10586 tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_reset_hw()
10610 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10635 if ((tg3_asic_rev(tp) == ASIC_REV_5704) && in tg3_reset_hw()
10657 if (tg3_asic_rev(tp) == ASIC_REV_5704 && in tg3_reset_hw()
10664 tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_reset_hw()
10927 if (tg3_asic_rev(tp) != ASIC_REV_5717 && in tg3_periodic_fetch_stats()
10928 tg3_asic_rev(tp) != ASIC_REV_5762 && in tg3_periodic_fetch_stats()
10980 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_timer()
11116 tg3_asic_rev(tp) != ASIC_REV_5717 && in tg3_timer_init()
11717 if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_open()
11791 (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_calc_crc_errors()
11792 tg3_asic_rev(tp) == ASIC_REV_5701)) { in tg3_calc_crc_errors()
12457 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_set_ringparam()
12458 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_set_ringparam()
12459 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_set_ringparam()
12567 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_set_pauseparam()
12568 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_set_pauseparam()
12569 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_set_pauseparam()
13335 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_test_memory()
13339 else if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_test_memory()
13451 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_run_loopback()
13637 if (tg3_asic_rev(tp) != ASIC_REV_5780 && in tg3_test_loopback()
14237 if (tg3_asic_rev(tp) == ASIC_REV_57766 || in tg3_change_mtu()
14238 tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_change_mtu()
14239 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_change_mtu()
14240 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_change_mtu()
14353 if (tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_get_nvram_info()
14794 if (tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_get_5720_nvram_info()
14878 if (tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_get_5720_nvram_info()
14925 if (tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_get_5720_nvram_info()
14939 if (tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_get_5720_nvram_info()
14974 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_nvram_init()
14975 tg3_asic_rev(tp) != ASIC_REV_5701) { in tg3_nvram_init()
14988 if (tg3_asic_rev(tp) == ASIC_REV_5752) in tg3_nvram_init()
14990 else if (tg3_asic_rev(tp) == ASIC_REV_5755) in tg3_nvram_init()
14992 else if (tg3_asic_rev(tp) == ASIC_REV_5787 || in tg3_nvram_init()
14993 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_nvram_init()
14994 tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_nvram_init()
14996 else if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_nvram_init()
14998 else if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_nvram_init()
15000 else if (tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_nvram_init()
15003 else if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_nvram_init()
15004 tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_nvram_init()
15006 else if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_nvram_init()
15007 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_nvram_init()
15120 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_eeprom_hw_cfg()
15148 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_get_eeprom_hw_cfg()
15149 tg3_asic_rev(tp) != ASIC_REV_5701 && in tg3_get_eeprom_hw_cfg()
15150 tg3_asic_rev(tp) != ASIC_REV_5703 && in tg3_get_eeprom_hw_cfg()
15154 if (tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_get_eeprom_hw_cfg()
15157 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_eeprom_hw_cfg()
15158 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_eeprom_hw_cfg()
15159 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_get_eeprom_hw_cfg()
15207 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_eeprom_hw_cfg()
15208 tg3_asic_rev(tp) == ASIC_REV_5701) in tg3_get_eeprom_hw_cfg()
15221 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_eeprom_hw_cfg()
15240 if ((tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_eeprom_hw_cfg()
15241 tg3_asic_rev(tp) == ASIC_REV_5701) && in tg3_get_eeprom_hw_cfg()
15289 (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_get_eeprom_hw_cfg()
15298 if (tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_get_eeprom_hw_cfg()
15533 (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_phy_probe()
15534 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_phy_probe()
15535 tg3_asic_rev(tp) == ASIC_REV_57766 || in tg3_phy_probe()
15536 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_phy_probe()
15537 (tg3_asic_rev(tp) == ASIC_REV_5717 && in tg3_phy_probe()
15539 (tg3_asic_rev(tp) == ASIC_REV_57765 && in tg3_phy_probe()
15635 if (tg3_asic_rev(tp) == ASIC_REV_5717) { in tg3_read_vpd()
15643 } else if (tg3_asic_rev(tp) == ASIC_REV_57780) { in tg3_read_vpd()
15654 } else if (tg3_asic_rev(tp) == ASIC_REV_57765) { in tg3_read_vpd()
15669 } else if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_read_vpd()
15680 } else if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_read_vpd()
15921 if (tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_read_otp_ver()
16027 if (tg3_asic_rev(tp) == ASIC_REV_USE_PROD_ID_REG) { in tg3_detect_asic_rev()
16073 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_detect_asic_rev()
16074 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_detect_asic_rev()
16075 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_detect_asic_rev()
16078 if (tg3_asic_rev(tp) == ASIC_REV_57765 || in tg3_detect_asic_rev()
16079 tg3_asic_rev(tp) == ASIC_REV_57766) in tg3_detect_asic_rev()
16083 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_detect_asic_rev()
16087 if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_detect_asic_rev()
16088 tg3_asic_rev(tp) == ASIC_REV_5787 || in tg3_detect_asic_rev()
16089 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_detect_asic_rev()
16090 tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_detect_asic_rev()
16091 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_detect_asic_rev()
16092 tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_detect_asic_rev()
16096 if (tg3_asic_rev(tp) == ASIC_REV_5780 || in tg3_detect_asic_rev()
16097 tg3_asic_rev(tp) == ASIC_REV_5714) in tg3_detect_asic_rev()
16100 if (tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_detect_asic_rev()
16101 tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_detect_asic_rev()
16102 tg3_asic_rev(tp) == ASIC_REV_5906 || in tg3_detect_asic_rev()
16107 if (tg3_asic_rev(tp) == ASIC_REV_5705 || in tg3_detect_asic_rev()
16117 if ((tg3_asic_rev(tp) == ASIC_REV_5703 && in tg3_10_100_only_device()
16123 if (tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_10_100_only_device()
16225 if (tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_get_invariants()
16285 if (tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_get_invariants()
16286 tg3_asic_rev(tp) == ASIC_REV_5714) in tg3_get_invariants()
16295 tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_invariants()
16300 if (tg3_asic_rev(tp) == ASIC_REV_5750 && in tg3_get_invariants()
16303 } else if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_get_invariants()
16304 tg3_asic_rev(tp) != ASIC_REV_5701 && in tg3_get_invariants()
16308 if (tg3_asic_rev(tp) == ASIC_REV_5705) in tg3_get_invariants()
16333 if (tg3_asic_rev(tp) == ASIC_REV_57766) in tg3_get_invariants()
16342 (tg3_asic_rev(tp) == ASIC_REV_5714 && in tg3_get_invariants()
16348 tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_invariants()
16364 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_invariants()
16365 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_get_invariants()
16370 tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_invariants()
16373 if (tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_get_invariants()
16376 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_invariants()
16377 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_invariants()
16378 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_get_invariants()
16379 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_invariants()
16401 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_invariants()
16405 if (tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_get_invariants()
16406 tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_get_invariants()
16413 } else if (tg3_asic_rev(tp) == ASIC_REV_5785) { in tg3_get_invariants()
16446 if (tg3_asic_rev(tp) == ASIC_REV_5703 && in tg3_get_invariants()
16515 else if (tg3_asic_rev(tp) == ASIC_REV_5701 || in tg3_get_invariants()
16549 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_invariants()
16558 (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16559 tg3_asic_rev(tp) == ASIC_REV_5701))) in tg3_get_invariants()
16571 if (tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_get_invariants()
16579 } else if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_invariants()
16580 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_invariants()
16581 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_get_invariants()
16586 if (tg3_asic_rev(tp) == ASIC_REV_5717) in tg3_get_invariants()
16635 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16642 else if (tg3_asic_rev(tp) == ASIC_REV_5752) in tg3_get_invariants()
16645 if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_get_invariants()
16646 tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_get_invariants()
16660 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_invariants()
16674 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16683 if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_invariants()
16687 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16688 (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_get_invariants()
16703 tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_get_invariants()
16704 tg3_asic_rev(tp) != ASIC_REV_57780 && in tg3_get_invariants()
16706 if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_get_invariants()
16707 tg3_asic_rev(tp) == ASIC_REV_5787 || in tg3_get_invariants()
16708 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_get_invariants()
16709 tg3_asic_rev(tp) == ASIC_REV_5761) { in tg3_get_invariants()
16719 if (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_get_invariants()
16737 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_invariants()
16738 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_get_invariants()
16745 if (tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_get_invariants()
16746 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_get_invariants()
16755 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_get_invariants()
16756 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_invariants()
16803 if (tg3_asic_rev(tp) == ASIC_REV_57766 && in tg3_get_invariants()
16810 if (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_get_invariants()
16816 tg3_asic_rev(tp) != ASIC_REV_5700) in tg3_get_invariants()
16849 if (tg3_asic_rev(tp) == ASIC_REV_5700) in tg3_get_invariants()
16859 if (tg3_asic_rev(tp) == ASIC_REV_5700) in tg3_get_invariants()
16869 tg3_asic_rev(tp) == ASIC_REV_5701 && in tg3_get_invariants()
16886 if (tg3_asic_rev(tp) == ASIC_REV_5701 && in tg3_get_invariants()
16903 if (tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_get_invariants()
16904 tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_get_invariants()
16905 tg3_asic_rev(tp) == ASIC_REV_5755) in tg3_get_invariants()
16931 if (tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_get_device_address()
16944 } else if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_device_address()
17007 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_calc_dma_bndry()
17008 tg3_asic_rev(tp) != ASIC_REV_5701 && in tg3_calc_dma_bndry()
17246 if (tg3_asic_rev(tp) == ASIC_REV_5705 || in tg3_test_dma()
17247 tg3_asic_rev(tp) == ASIC_REV_5750) in tg3_test_dma()
17252 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_test_dma()
17253 tg3_asic_rev(tp) == ASIC_REV_5704) { in tg3_test_dma()
17262 tg3_asic_rev(tp) == ASIC_REV_5704) in tg3_test_dma()
17267 if (tg3_asic_rev(tp) == ASIC_REV_5703) in tg3_test_dma()
17274 } else if (tg3_asic_rev(tp) == ASIC_REV_5780) { in tg3_test_dma()
17277 } else if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_test_dma()
17287 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_test_dma()
17288 tg3_asic_rev(tp) == ASIC_REV_5704) in tg3_test_dma()
17291 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_test_dma()
17292 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_test_dma()
17312 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_test_dma()
17313 tg3_asic_rev(tp) != ASIC_REV_5701) in tg3_test_dma()
17418 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_init_bufmgr_config()
17747 tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_init_one()
17748 (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_init_one()
17750 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_init_one()
17751 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_init_one()
17764 if (tg3_asic_rev(tp) != ASIC_REV_5780 && in tg3_init_one()
17858 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_init_one()
17859 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_init_one()
17860 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_init_one()