14343 	u32 nvcfg1;  in tg3_get_nvram_info()  local
14345 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_nvram_info()
14346 	if (nvcfg1 & NVRAM_CFG1_FLASHIF_ENAB) {  in tg3_get_nvram_info()
14349 		nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;  in tg3_get_nvram_info()
14350 		tw32(NVRAM_CFG1, nvcfg1);  in tg3_get_nvram_info()
14355 		switch (nvcfg1 & NVRAM_CFG1_VENDOR_MASK) {  in tg3_get_nvram_info()
14421 	u32 nvcfg1;  in tg3_get_5752_nvram_info()  local
14423 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_5752_nvram_info()
14426 	if (nvcfg1 & (1 << 27))  in tg3_get_5752_nvram_info()
14429 	switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_5752_nvram_info()
14450 		tg3_nvram_get_pagesize(tp, nvcfg1);  in tg3_get_5752_nvram_info()
14455 		nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;  in tg3_get_5752_nvram_info()
14456 		tw32(NVRAM_CFG1, nvcfg1);  in tg3_get_5752_nvram_info()
14462 	u32 nvcfg1, protect = 0;  in tg3_get_5755_nvram_info()  local
14464 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_5755_nvram_info()
14467 	if (nvcfg1 & (1 << 27)) {  in tg3_get_5755_nvram_info()
14472 	nvcfg1 &= NVRAM_CFG1_5752VENDOR_MASK;  in tg3_get_5755_nvram_info()
14473 	switch (nvcfg1) {  in tg3_get_5755_nvram_info()
14482 		if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_1 ||  in tg3_get_5755_nvram_info()
14483 		    nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_5)  in tg3_get_5755_nvram_info()
14486 		else if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_2)  in tg3_get_5755_nvram_info()
14500 		if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE10)  in tg3_get_5755_nvram_info()
14504 		else if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE20)  in tg3_get_5755_nvram_info()
14518 	u32 nvcfg1;  in tg3_get_5787_nvram_info()  local
14520 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_5787_nvram_info()
14522 	switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_5787_nvram_info()
14531 		nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;  in tg3_get_5787_nvram_info()
14532 		tw32(NVRAM_CFG1, nvcfg1);  in tg3_get_5787_nvram_info()
14556 	u32 nvcfg1, protect = 0;  in tg3_get_5761_nvram_info()  local
14558 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_5761_nvram_info()
14561 	if (nvcfg1 & (1 << 27)) {  in tg3_get_5761_nvram_info()
14566 	nvcfg1 &= NVRAM_CFG1_5752VENDOR_MASK;  in tg3_get_5761_nvram_info()
14567 	switch (nvcfg1) {  in tg3_get_5761_nvram_info()
14600 		switch (nvcfg1) {  in tg3_get_5761_nvram_info()
14638 	u32 nvcfg1;  in tg3_get_57780_nvram_info()  local
14640 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_57780_nvram_info()
14642 	switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_57780_nvram_info()
14649 		nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;  in tg3_get_57780_nvram_info()
14650 		tw32(NVRAM_CFG1, nvcfg1);  in tg3_get_57780_nvram_info()
14663 		switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_57780_nvram_info()
14686 		switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_57780_nvram_info()
14703 	tg3_nvram_get_pagesize(tp, nvcfg1);  in tg3_get_57780_nvram_info()
14711 	u32 nvcfg1;  in tg3_get_5717_nvram_info()  local
14713 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_5717_nvram_info()
14715 	switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_5717_nvram_info()
14722 		nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;  in tg3_get_5717_nvram_info()
14723 		tw32(NVRAM_CFG1, nvcfg1);  in tg3_get_5717_nvram_info()
14736 		switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_5717_nvram_info()
14763 		switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_5717_nvram_info()
14782 	tg3_nvram_get_pagesize(tp, nvcfg1);  in tg3_get_5717_nvram_info()
14789 	u32 nvcfg1, nvmpinstrp, nv_status;  in tg3_get_5720_nvram_info()  local
14791 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_5720_nvram_info()
14792 	nvmpinstrp = nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK;  in tg3_get_5720_nvram_info()
14795 		if (!(nvcfg1 & NVRAM_CFG1_5762VENDOR_MASK)) {  in tg3_get_5720_nvram_info()
14839 		nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;  in tg3_get_5720_nvram_info()
14840 		tw32(NVRAM_CFG1, nvcfg1);  in tg3_get_5720_nvram_info()
14935 	tg3_nvram_get_pagesize(tp, nvcfg1);  in tg3_get_5720_nvram_info()