Lines Matching refs:grc_mode
3538 u32 grc_mode; in tg3_nvram_write_block() local
3548 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3549 tw32(GRC_MODE, grc_mode | GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
3559 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3560 tw32(GRC_MODE, grc_mode & ~GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
9245 tw32(GRC_MODE, tp->grc_mode); in tg3_chip_reset()
9926 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw() local
9929 val = grc_mode & ~GRC_MODE_PCIE_PORT_MASK; in tg3_reset_hw()
9936 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
9941 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw() local
9944 val = grc_mode & ~GRC_MODE_PCIE_PORT_MASK; in tg3_reset_hw()
9952 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
9956 u32 grc_mode; in tg3_reset_hw() local
9963 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9966 val = grc_mode & ~GRC_MODE_PCIE_PORT_MASK; in tg3_reset_hw()
9975 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
10047 tp->grc_mode &= ~(GRC_MODE_HOST_SENDBDS | in tg3_reset_hw()
10051 tp->grc_mode |= GRC_MODE_HOST_SENDBDS; in tg3_reset_hw()
10059 tp->grc_mode |= GRC_MODE_NO_TX_PHDR_CSUM; in tg3_reset_hw()
10069 tw32(GRC_MODE, tp->grc_mode | val); in tg3_reset_hw()
16742 tp->grc_mode |= GRC_MODE_IRQ_ON_FLOW_ATTN; in tg3_get_invariants()
16765 tw32(GRC_MODE, val | tp->grc_mode); in tg3_get_invariants()
17627 tp->grc_mode = (GRC_MODE_WSWAP_DATA | GRC_MODE_BSWAP_DATA | in tg3_init_one()
17630 tp->grc_mode |= GRC_MODE_BSWAP_NONFRM_DATA; in tg3_init_one()