Lines Matching refs:TG3PCI_CLOCK_CTRL
1088 clock_ctrl = tr32(TG3PCI_CLOCK_CTRL); in tg3_switch_clocks()
1098 tw32_wait_f(TG3PCI_CLOCK_CTRL, in tg3_switch_clocks()
1102 tw32_wait_f(TG3PCI_CLOCK_CTRL, in tg3_switch_clocks()
1106 tw32_wait_f(TG3PCI_CLOCK_CTRL, in tg3_switch_clocks()
1110 tw32_wait_f(TG3PCI_CLOCK_CTRL, clock_ctrl, 40); in tg3_switch_clocks()
4192 tw32_wait_f(TG3PCI_CLOCK_CTRL, base_val | CLOCK_CTRL_ALTCLK | in tg3_power_down_prepare()
4215 tw32_wait_f(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl | newbits1, in tg3_power_down_prepare()
4218 tw32_wait_f(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl | newbits2, in tg3_power_down_prepare()
4233 tw32_wait_f(TG3PCI_CLOCK_CTRL, in tg3_power_down_prepare()
9258 tw32(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl); in tg3_chip_reset()
9992 tw32_f(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl); in tg3_reset_hw()
17254 u32 ccval = (tr32(TG3PCI_CLOCK_CTRL) & 0x1f); in tg3_test_dma()
17489 u32 clock_ctrl = tr32(TG3PCI_CLOCK_CTRL) & 0x1f; in tg3_bus_string()