Lines Matching refs:GRC_MODE
3548 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3549 tw32(GRC_MODE, grc_mode | GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
3559 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3560 tw32(GRC_MODE, grc_mode & ~GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
6438 tg3_rd32_loop(tp, regs, GRC_MODE, 0x4c); in tg3_dump_legacy_regs()
9245 tw32(GRC_MODE, tp->grc_mode); in tg3_chip_reset()
9926 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9930 tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL); in tg3_reset_hw()
9936 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
9941 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9945 tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL); in tg3_reset_hw()
9952 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
9963 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9967 tw32(GRC_MODE, val | GRC_MODE_PCIE_DL_SEL); in tg3_reset_hw()
9975 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
10069 tw32(GRC_MODE, tp->grc_mode | val); in tg3_reset_hw()
16754 val = tr32(GRC_MODE); in tg3_get_invariants()
16765 tw32(GRC_MODE, val | tp->grc_mode); in tg3_get_invariants()