1900 	    (!!test_bit(BNX2X_AFEX_FCOE_Q_UPDATE_PENDING, &bp->sp_state))) {  in bnx2x_sp_event()
1911 		set_bit(BNX2X_AFEX_PENDING_VIFSET_MCP_ACK, &bp->sp_state);  in bnx2x_sp_event()
1913 		clear_bit(BNX2X_AFEX_FCOE_Q_UPDATE_PENDING, &bp->sp_state);  in bnx2x_sp_event()
5354 	clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &bp->sp_state);  in bnx2x_handle_rx_mode_eqe()
5357 	if (test_and_clear_bit(BNX2X_FILTER_RX_MODE_SCHED, &bp->sp_state))  in bnx2x_handle_rx_mode_eqe()
5360 				    &bp->sp_state))  in bnx2x_handle_rx_mode_eqe()
5363 				    &bp->sp_state))  in bnx2x_handle_rx_mode_eqe()
5435 		set_bit(BNX2X_AFEX_FCOE_Q_UPDATE_PENDING, &bp->sp_state);  in bnx2x_after_function_update()
5740 			       &bp->sp_state)) {  in bnx2x_sp_task()
6179 	ramrod_param.pstate = &bp->sp_state;  in bnx2x_set_q_rx_mode()
6185 	set_bit(BNX2X_FILTER_RX_MODE_PENDING, &bp->sp_state);  in bnx2x_set_q_rx_mode()
9393 	if (test_bit(BNX2X_FILTER_RX_MODE_PENDING, &bp->sp_state))  in bnx2x_chip_cleanup()
9394 		set_bit(BNX2X_FILTER_RX_MODE_SCHED, &bp->sp_state);  in bnx2x_chip_cleanup()
12743 	if (test_bit(BNX2X_FILTER_RX_MODE_PENDING, &bp->sp_state)) {  in bnx2x_set_rx_mode_inner()
12744 		set_bit(BNX2X_FILTER_RX_MODE_SCHED, &bp->sp_state);  in bnx2x_set_rx_mode_inner()
14270 		bp->sp_state = 0;  in bnx2x_io_slot_reset()
14644 		clear_bit(BNX2X_FILTER_ISCSI_ETH_STOP_SCHED, &bp->sp_state);  in bnx2x_set_iscsi_eth_rx_mode()
14649 		clear_bit(BNX2X_FILTER_ISCSI_ETH_START_SCHED, &bp->sp_state);  in bnx2x_set_iscsi_eth_rx_mode()
14651 	if (test_bit(BNX2X_FILTER_RX_MODE_PENDING, &bp->sp_state))  in bnx2x_set_iscsi_eth_rx_mode()
14652 		set_bit(sched_state, &bp->sp_state);  in bnx2x_set_iscsi_eth_rx_mode()
14693 				   &bp->sp_state, BNX2X_OBJ_TYPE_RX,  in bnx2x_drv_ctl()