504 	opcode |= (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0);  in bnx2x_dmae_opcode()
857 	int port = BP_PORT(bp);  in bnx2x_hc_int_disable()
1471 			TM_REG_LIN0_VNIC_UC + 4*BP_PORT(bp),  in bnx2x_poll_hw_usage_counters()
1476 			TM_REG_LIN0_NUM_SCANS + 4*BP_PORT(bp),  in bnx2x_poll_hw_usage_counters()
1567 	int port = BP_PORT(bp);  in bnx2x_hc_int_enable()
2347 			   USTORM_ETH_PAUSE_ENABLED_OFFSET(BP_PORT(bp)),  in bnx2x_init_dropless_fc()
2554 		int /*abs*/func = n * (2 * vn + BP_PORT(bp)) + BP_PATH(bp);  in bnx2x_read_mf_cfg()
2642 		storm_memset_cmng(bp, &bp->cmng, BP_PORT(bp));  in bnx2x_set_local_cmng()
2715 		bp->link_params.port = BP_PORT(bp);  in bnx2x__link_status_update()
2955 		REG_WR(bp, NIG_REG_LLH0_FUNC_VLAN_ID + BP_PORT(bp) * 8,  in bnx2x_handle_update_svid_cmd()
2983 	int port = BP_PORT(bp);  in bnx2x_pmf_update()
3342 		storm_memset_cmng(bp, &bp->cmng, BP_PORT(bp));  in bnx2x_pf_init()
3355 	int port = BP_PORT(bp);  in bnx2x_e1h_disable()
3364 	int port = BP_PORT(bp);  in bnx2x_e1h_enable()
3565 	storm_memset_cmng(bp, &bp->cmng, BP_PORT(bp));  in bnx2x_config_mf_bw()
4017 	int port = BP_PORT(bp);  in bnx2x_attn_int_asserted()
4139 	int port = BP_PORT(bp);  in bnx2x_fan_failure()
4164 	int port = BP_PORT(bp);  in bnx2x_attn_int_deasserted0()
4217 		int port = BP_PORT(bp);  in bnx2x_attn_int_deasserted1()
4261 		int port = BP_PORT(bp);  in bnx2x_attn_int_deasserted2()
5028 	int port = BP_PORT(bp);  in bnx2x_chk_parity_attn()
5115 	int port = BP_PORT(bp);  in bnx2x_attn_int_deasserted()
6042 	int port = BP_PORT(bp);  in bnx2x_init_def_sb()
6541 				       bp->common.shmem2_base, BP_PORT(bp));  in bnx2x_pre_irq_nic_init()
6566 		REG_RD(bp, MISC_REG_AEU_AFTER_INVERT_1_FUNC_0 + BP_PORT(bp)*4) &  in bnx2x_post_irq_nic_init()
7001 	    (u32)offsetof(struct shmem2_region, lfa_host_addr[BP_PORT(bp)]))  in bnx2x__common_init_phy()
7515 	int port = BP_PORT(bp);  in bnx2x_init_hw_port()
7580 		REG_WR(bp, (BP_PORT(bp) ?  in bnx2x_init_hw_port()
7588 			REG_WR(bp, BP_PORT(bp) ?  in bnx2x_init_hw_port()
7591 			REG_WR(bp, BP_PORT(bp) ?  in bnx2x_init_hw_port()
7594 			REG_WR(bp, BP_PORT(bp) ?  in bnx2x_init_hw_port()
7602 			REG_WR(bp, BP_PORT(bp) ?  in bnx2x_init_hw_port()
7681 			REG_WR(bp, BP_PORT(bp) ?  in bnx2x_init_hw_port()
7685 			REG_WR(bp, BP_PORT(bp) ?  in bnx2x_init_hw_port()
7691 			REG_WR(bp, BP_PORT(bp) ?  in bnx2x_init_hw_port()
7715 			REG_WR(bp, (BP_PORT(bp) ? NIG_REG_LLH1_CLS_TYPE :  in bnx2x_init_hw_port()
7813 	int port = BP_PORT(bp);  in bnx2x_init_searcher()
7847 	int rc, i, port = BP_PORT(bp);  in bnx2x_reset_nic_mode()
7953 	int port = BP_PORT(bp);  in bnx2x_init_hw_func()
8229 				BP_PORT(bp) * (main_mem_size * 4);  in bnx2x_init_hw_func()
8985 	int port = BP_PORT(bp);  in bnx2x_reset_func()
9066 	int port = BP_PORT(bp);  in bnx2x_reset_port()
9149 	int port = BP_PORT(bp);  in bnx2x_send_unload_req()
9296 	int port = BP_PORT(bp);  in bnx2x_disable_ptp()
9338 	int port = BP_PORT(bp);  in bnx2x_chip_cleanup()
9510 		int port = BP_PORT(bp);  in bnx2x_disable_close_the_gate()
9610 		offsetof(struct shmem_region, validity_map[BP_PORT(bp)]);  in bnx2x_reset_mcp_prep()
9655 			val = SHMEM_RD(bp, validity_map[BP_PORT(bp)]);  in bnx2x_init_shmem()
10429 	u8 port = BP_PORT(bp);  in bnx2x_prev_unload_close_mac()
10442 			base_addr = BP_PORT(bp) ? NIG_REG_INGRESS_BMAC1_MEM  in bnx2x_prev_unload_close_mac()
10463 		vals->emac_addr = NIG_REG_NIG_EMAC0_EN + BP_PORT(bp)*4;  in bnx2x_prev_unload_close_mac()
10470 			base_addr = BP_PORT(bp) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;  in bnx2x_prev_unload_close_mac()
10526 		addr = BNX2X_PREV_UNDI_PROD_ADDR(BP_PORT(bp));  in bnx2x_prev_unload_undi_inc()
10538 		       BP_PORT(bp), BP_FUNC(bp), addr, bd, rcq);  in bnx2x_prev_unload_undi_inc()
10625 	val = !!(entry && (entry->undi & (1 << BP_PORT(bp))));  in bnx2x_port_after_undi()
10669 	tmp_list->undi = after_undi ? (1 << BP_PORT(bp)) : 0;  in bnx2x_prev_mark_path()
10873 			       (MCPR_NVM_SW_ARB_ARB_REQ_CLR1 << BP_PORT(bp)));  in bnx2x_prev_unload()
11017 	    (u32)offsetof(struct shmem2_region, lfa_host_addr[BP_PORT(bp)]))  in bnx2x_get_common_hwinfo()
11021 				     lfa_host_addr[BP_PORT(bp)]));  in bnx2x_get_common_hwinfo()
11089 			dev_info.port_feature_config[BP_PORT(bp)].mba_config) &  in bnx2x_get_common_hwinfo()
11185 	int cfg_size = 0, idx, port = BP_PORT(bp);  in bnx2x_link_settings_supported()
11493 	int port = BP_PORT(bp);  in bnx2x_get_port_hwinfo()
11578 	int port = BP_PORT(bp);  in bnx2x_get_iscsi_info()
11662 	int port = BP_PORT(bp);  in bnx2x_get_fcoe_info()
11744 	int port = BP_PORT(bp);  in bnx2x_get_cnic_mac_hwinfo()
11836 	int port = BP_PORT(bp);  in bnx2x_get_mac_hwinfo()
11899 		tmp = BP_PORT(bp);  in bnx2x_get_dropless_info()
11996 		bp->base_fw_ndsb = BP_PORT(bp) * FP_SB_MAX_E1x + BP_L_ID(bp);  in bnx2x_get_hwinfo()
12181 			u8 other_port = !BP_PORT(bp);  in bnx2x_get_hwinfo()
12381 	    SHMEM2_RD(bp, dcbx_en[BP_PORT(bp)])) {  in bnx2x_init_bp()
14757 			int port = BP_PORT(bp);  in bnx2x_drv_ctl()
14859 	offset = SHMEM2_RD(bp, fc_npiv_nvram_tbl_addr[BP_PORT(bp)]);  in bnx2x_get_fc_npiv()
15083 		offset += USTORM_RX_PRODS_E1X_OFFSET(BP_PORT(bp), fp->cl_id);  in bnx2x_rx_ustorm_prods_offset()
15110 	int port = BP_PORT(bp);  in bnx2x_ptp_task()
15162 	int port = BP_PORT(bp);  in bnx2x_set_rx_ts()
15187 	int port = BP_PORT(bp);  in bnx2x_cyclecounter_read()
15277 	int port = BP_PORT(bp);  in bnx2x_configure_ptp_filters()
15389 	int rc, port = BP_PORT(bp);  in bnx2x_configure_ptp()