98 	return bcm_readl(bcm_enet_shared_base[1] +  in enet_dmac_readl()
105 	bcm_writel(val, bcm_enet_shared_base[1] +  in enet_dmac_writel()
139 		udelay(1);  in do_mdio_op()
142 	return (limit < 0) ? 1 : 0;  in do_mdio_op()
159 		return -1;  in bcm_enet_mdio_read()
255 		if (priv->rx_dirty_desc == priv->rx_ring_size - 1) {  in bcm_enet_refill_rx()
268 			enet_dma_writel(priv, 1, ENETDMA_BUFALLOC_REG(priv->rx_chan));  in bcm_enet_refill_rx()
270 			enet_dmac_writel(priv, 1, ENETDMAC_BUFALLOC, priv->rx_chan);  in bcm_enet_refill_rx()
546 	/* read mib registers in workqueue */  in bcm_enet_isr_mac()
680 	val = (dev->dev_addr[0] << 8 | dev->dev_addr[1]);  in bcm_enet_set_mac_address()
731 		enet_writel(priv, tmp, ENET_PML_REG(i + 1));  in bcm_enet_set_multicast_list()
733 		tmp = (dmi_addr[0] << 8 | dmi_addr[1]);  in bcm_enet_set_multicast_list()
735 		enet_writel(priv, tmp, ENET_PMH_REG(i++ + 1));  in bcm_enet_set_multicast_list()
739 		enet_writel(priv, 0, ENET_PML_REG(i + 1));  in bcm_enet_set_multicast_list()
740 		enet_writel(priv, 0, ENET_PMH_REG(i + 1));  in bcm_enet_set_multicast_list()
802 		status_changed = 1;  in bcm_enet_adjust_phy_link()
809 				    (phydev->duplex == DUPLEX_FULL) ? 1 : 0);  in bcm_enet_adjust_phy_link()
810 		status_changed = 1;  in bcm_enet_adjust_phy_link()
821 			rx_pause_en = 1;  in bcm_enet_adjust_phy_link()
822 			tx_pause_en = 1;  in bcm_enet_adjust_phy_link()
833 		status_changed = 1;  in bcm_enet_adjust_phy_link()
843 			       phydev->pause == 1 ? "rx&tx" : "off");  in bcm_enet_adjust_phy_link()
927 		priv->old_duplex = -1;  in bcm_enet_open()
928 		priv->old_pause = -1;  in bcm_enet_open()
1061 	/* set flow control low/high threshold to 1/3 / 2/3 */  in bcm_enet_open()
1084 	/* watch "mib counters about to overflow" interrupt */  in bcm_enet_open()
1159 		udelay(1);  in bcm_enet_disable_mac()
1179 		udelay(1);  in bcm_enet_disable_dma()
1205 	/* make sure no mib update is scheduled */  in bcm_enet_stop()
1214 	bcm_enet_tx_reclaim(dev, 1, 0);  in bcm_enet_stop()
1255 	{ "rx_packets", DEV_STAT(rx_packets), -1 },
1256 	{ "tx_packets",	DEV_STAT(tx_packets), -1 },
1257 	{ "rx_bytes", DEV_STAT(rx_bytes), -1 },
1258 	{ "tx_bytes", DEV_STAT(tx_bytes), -1 },
1259 	{ "rx_errors", DEV_STAT(rx_errors), -1 },
1260 	{ "tx_errors", DEV_STAT(tx_errors), -1 },
1261 	{ "rx_dropped",	DEV_STAT(rx_dropped), -1 },
1262 	{ "tx_dropped",	DEV_STAT(tx_dropped), -1 },
1264 	{ "rx_good_octets", GEN_STAT(mib.rx_gd_octets), ETH_MIB_RX_GD_OCTETS},
1265 	{ "rx_good_pkts", GEN_STAT(mib.rx_gd_pkts), ETH_MIB_RX_GD_PKTS },
1266 	{ "rx_broadcast", GEN_STAT(mib.rx_brdcast), ETH_MIB_RX_BRDCAST },
1267 	{ "rx_multicast", GEN_STAT(mib.rx_mult), ETH_MIB_RX_MULT },
1268 	{ "rx_64_octets", GEN_STAT(mib.rx_64), ETH_MIB_RX_64 },
1269 	{ "rx_65_127_oct", GEN_STAT(mib.rx_65_127), ETH_MIB_RX_65_127 },
1270 	{ "rx_128_255_oct", GEN_STAT(mib.rx_128_255), ETH_MIB_RX_128_255 },
1271 	{ "rx_256_511_oct", GEN_STAT(mib.rx_256_511), ETH_MIB_RX_256_511 },
1272 	{ "rx_512_1023_oct", GEN_STAT(mib.rx_512_1023), ETH_MIB_RX_512_1023 },
1273 	{ "rx_1024_max_oct", GEN_STAT(mib.rx_1024_max), ETH_MIB_RX_1024_MAX },
1274 	{ "rx_jabber", GEN_STAT(mib.rx_jab), ETH_MIB_RX_JAB },
1275 	{ "rx_oversize", GEN_STAT(mib.rx_ovr), ETH_MIB_RX_OVR },
1276 	{ "rx_fragment", GEN_STAT(mib.rx_frag), ETH_MIB_RX_FRAG },
1277 	{ "rx_dropped",	GEN_STAT(mib.rx_drop), ETH_MIB_RX_DROP },
1278 	{ "rx_crc_align", GEN_STAT(mib.rx_crc_align), ETH_MIB_RX_CRC_ALIGN },
1279 	{ "rx_undersize", GEN_STAT(mib.rx_und), ETH_MIB_RX_UND },
1280 	{ "rx_crc", GEN_STAT(mib.rx_crc), ETH_MIB_RX_CRC },
1281 	{ "rx_align", GEN_STAT(mib.rx_align), ETH_MIB_RX_ALIGN },
1282 	{ "rx_symbol_error", GEN_STAT(mib.rx_sym), ETH_MIB_RX_SYM },
1283 	{ "rx_pause", GEN_STAT(mib.rx_pause), ETH_MIB_RX_PAUSE },
1284 	{ "rx_control", GEN_STAT(mib.rx_cntrl), ETH_MIB_RX_CNTRL },
1286 	{ "tx_good_octets", GEN_STAT(mib.tx_gd_octets), ETH_MIB_TX_GD_OCTETS },
1287 	{ "tx_good_pkts", GEN_STAT(mib.tx_gd_pkts), ETH_MIB_TX_GD_PKTS },
1288 	{ "tx_broadcast", GEN_STAT(mib.tx_brdcast), ETH_MIB_TX_BRDCAST },
1289 	{ "tx_multicast", GEN_STAT(mib.tx_mult), ETH_MIB_TX_MULT },
1290 	{ "tx_64_oct", GEN_STAT(mib.tx_64), ETH_MIB_TX_64 },
1291 	{ "tx_65_127_oct", GEN_STAT(mib.tx_65_127), ETH_MIB_TX_65_127 },
1292 	{ "tx_128_255_oct", GEN_STAT(mib.tx_128_255), ETH_MIB_TX_128_255 },
1293 	{ "tx_256_511_oct", GEN_STAT(mib.tx_256_511), ETH_MIB_TX_256_511 },
1294 	{ "tx_512_1023_oct", GEN_STAT(mib.tx_512_1023), ETH_MIB_TX_512_1023},
1295 	{ "tx_1024_max_oct", GEN_STAT(mib.tx_1024_max), ETH_MIB_TX_1024_MAX },
1296 	{ "tx_jabber", GEN_STAT(mib.tx_jab), ETH_MIB_TX_JAB },
1297 	{ "tx_oversize", GEN_STAT(mib.tx_ovr), ETH_MIB_TX_OVR },
1298 	{ "tx_fragment", GEN_STAT(mib.tx_frag), ETH_MIB_TX_FRAG },
1299 	{ "tx_underrun", GEN_STAT(mib.tx_underrun), ETH_MIB_TX_UNDERRUN },
1300 	{ "tx_collisions", GEN_STAT(mib.tx_col), ETH_MIB_TX_COL },
1301 	{ "tx_single_collision", GEN_STAT(mib.tx_1_col), ETH_MIB_TX_1_COL },
1302 	{ "tx_multiple_collision", GEN_STAT(mib.tx_m_col), ETH_MIB_TX_M_COL },
1303 	{ "tx_excess_collision", GEN_STAT(mib.tx_ex_col), ETH_MIB_TX_EX_COL },
1304 	{ "tx_late_collision", GEN_STAT(mib.tx_late), ETH_MIB_TX_LATE },
1305 	{ "tx_deferred", GEN_STAT(mib.tx_def), ETH_MIB_TX_DEF },
1306 	{ "tx_carrier_sense", GEN_STAT(mib.tx_crs), ETH_MIB_TX_CRS },
1307 	{ "tx_pause", GEN_STAT(mib.tx_pause), ETH_MIB_TX_PAUSE },
1365 		if (s->mib_reg == -1)  in update_mib_counters()
1377 	/* also empty unused mib counters to make sure mib counter  in update_mib_counters()
1392 	/* reenable mib interrupt */  in bcm_enet_update_mib_counters_defer()
1414 		if (s->mib_reg == -1)  in bcm_enet_get_ethtool_stats()
1490 			(cmd->base.speed == SPEED_100) ? 1 : 0;  in bcm_enet_set_link_ksettings()
1492 			(cmd->base.duplex == DUPLEX_FULL) ? 1 : 0;  in bcm_enet_set_link_ksettings()
1530 		was_running = 1;  in bcm_enet_set_ringparam()
1680 		udelay(1);  in bcm_enet_hw_preinit()
1695 	/* set mib counters to self-clear when read */  in bcm_enet_hw_preinit()
1727 	irq_rx = platform_get_irq(pdev, 1);  in bcm_enet_probe()
1826 		bus->phy_mask = ~(1 << priv->phy_id);  in bcm_enet_probe()
1840 		    pd->mii_config(dev, 1, bcm_enet_mdio_read_mii,  in bcm_enet_probe()
1852 	/* init the mib update lock&work */  in bcm_enet_probe()
1856 	/* zero mib counters */  in bcm_enet_probe()
2030 		up = (val & BMSR_LSTATUS) ? 1 : 0;  in swphy_poll_timer()
2056 		duplex = (media & ADVERTISE_FULL) ? 1 : 0;  in swphy_poll_timer()
2123 	if (priv->irq_tx != -1) {  in bcm_enetsw_open()
2191 	/* reset mib */  in bcm_enetsw_open()
2195 	mdelay(1);  in bcm_enetsw_open()
2198 	mdelay(1);  in bcm_enetsw_open()
2244 	/* set flow control low/high threshold to 1/3 / 2/3 */  in bcm_enetsw_open()
2332 	if (priv->irq_tx != -1)  in bcm_enetsw_open()
2365 	bcm_enet_tx_reclaim(dev, 1, 0);  in bcm_enetsw_stop()
2376 	if (priv->irq_tx != -1)  in bcm_enetsw_stop()
2404 	return 1;  in bcm_enetsw_phy_is_external()
2459 	{ "rx_packets", DEV_STAT(rx_packets), -1 },
2460 	{ "tx_packets",	DEV_STAT(tx_packets), -1 },
2461 	{ "rx_bytes", DEV_STAT(rx_bytes), -1 },
2462 	{ "tx_bytes", DEV_STAT(tx_bytes), -1 },
2463 	{ "rx_errors", DEV_STAT(rx_errors), -1 },
2464 	{ "tx_errors", DEV_STAT(tx_errors), -1 },
2465 	{ "rx_dropped",	DEV_STAT(rx_dropped), -1 },
2466 	{ "tx_dropped",	DEV_STAT(tx_dropped), -1 },
2468 	{ "tx_good_octets", GEN_STAT(mib.tx_gd_octets), ETHSW_MIB_RX_GD_OCT },
2469 	{ "tx_unicast", GEN_STAT(mib.tx_unicast), ETHSW_MIB_RX_BRDCAST },
2470 	{ "tx_broadcast", GEN_STAT(mib.tx_brdcast), ETHSW_MIB_RX_BRDCAST },
2471 	{ "tx_multicast", GEN_STAT(mib.tx_mult), ETHSW_MIB_RX_MULT },
2472 	{ "tx_64_octets", GEN_STAT(mib.tx_64), ETHSW_MIB_RX_64 },
2473 	{ "tx_65_127_oct", GEN_STAT(mib.tx_65_127), ETHSW_MIB_RX_65_127 },
2474 	{ "tx_128_255_oct", GEN_STAT(mib.tx_128_255), ETHSW_MIB_RX_128_255 },
2475 	{ "tx_256_511_oct", GEN_STAT(mib.tx_256_511), ETHSW_MIB_RX_256_511 },
2476 	{ "tx_512_1023_oct", GEN_STAT(mib.tx_512_1023), ETHSW_MIB_RX_512_1023},
2477 	{ "tx_1024_1522_oct", GEN_STAT(mib.tx_1024_max),
2479 	{ "tx_1523_2047_oct", GEN_STAT(mib.tx_1523_2047),
2481 	{ "tx_2048_4095_oct", GEN_STAT(mib.tx_2048_4095),
2483 	{ "tx_4096_8191_oct", GEN_STAT(mib.tx_4096_8191),
2485 	{ "tx_8192_9728_oct", GEN_STAT(mib.tx_8192_9728),
2487 	{ "tx_oversize", GEN_STAT(mib.tx_ovr), ETHSW_MIB_RX_OVR },
2488 	{ "tx_oversize_drop", GEN_STAT(mib.tx_ovr), ETHSW_MIB_RX_OVR_DISC },
2489 	{ "tx_dropped",	GEN_STAT(mib.tx_drop), ETHSW_MIB_RX_DROP },
2490 	{ "tx_undersize", GEN_STAT(mib.tx_underrun), ETHSW_MIB_RX_UND },
2491 	{ "tx_pause", GEN_STAT(mib.tx_pause), ETHSW_MIB_RX_PAUSE },
2493 	{ "rx_good_octets", GEN_STAT(mib.rx_gd_octets), ETHSW_MIB_TX_ALL_OCT },
2494 	{ "rx_broadcast", GEN_STAT(mib.rx_brdcast), ETHSW_MIB_TX_BRDCAST },
2495 	{ "rx_multicast", GEN_STAT(mib.rx_mult), ETHSW_MIB_TX_MULT },
2496 	{ "rx_unicast", GEN_STAT(mib.rx_unicast), ETHSW_MIB_TX_MULT },
2497 	{ "rx_pause", GEN_STAT(mib.rx_pause), ETHSW_MIB_TX_PAUSE },
2498 	{ "rx_dropped", GEN_STAT(mib.rx_drop), ETHSW_MIB_TX_DROP_PKTS },
2557 		if (reg == -1)  in bcm_enetsw_get_ethtool_stats()
2564 			hi = enetsw_readl(priv, ENETSW_MIB_REG(reg + 1));  in bcm_enetsw_get_ethtool_stats()
2577 		if (s->mib_reg == -1)  in bcm_enetsw_get_ethtool_stats()
2620 		was_running = 1;  in bcm_enetsw_set_ringparam()
2659 	irq_tx = platform_get_irq(pdev, 1);  in bcm_enetsw_probe()
2709 	priv->tx_chan = 1;  in bcm_enetsw_probe()