55 	u16 cfg_block;  member
139 	enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_MASK, ENET_DMA_INT_DEFAULTS);  in bcm4908_enet_dma_ring_intrs_on()
145 	enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_MASK, 0);  in bcm4908_enet_dma_ring_intrs_off()
151 	enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_STAT, ENET_DMA_INT_DEFAULTS);  in bcm4908_enet_dma_ring_intrs_ack()
212 	tx_ring->cfg_block = ENET_DMA_CH_TX_CFG;  in bcm4908_enet_dma_alloc()
222 	rx_ring->cfg_block = ENET_DMA_CH_RX_CFG;  in bcm4908_enet_dma_alloc()
241 		enet_write(enet, rings[i]->cfg_block + ENET_DMA_CH_CFG, 0);  in bcm4908_enet_dma_reset()
298 	enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, 0);  in bcm4908_enet_dma_ring_init()
299 	enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_MAX_BURST, ENET_DMA_MAX_BURST_LEN);  in bcm4908_enet_dma_ring_init()
300 	enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_MASK, 0);  in bcm4908_enet_dma_ring_init()
351 	enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE);  in bcm4908_enet_dma_tx_ring_enable()
357 	enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, 0);  in bcm4908_enet_dma_tx_ring_disable()
363 	enet_set(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE);  in bcm4908_enet_dma_rx_ring_enable()
372 	enet_maskset(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0);  in bcm4908_enet_dma_rx_ring_disable()
376 		tmp = enet_read(enet, ring->cfg_block + ENET_DMA_CH_CFG);  in bcm4908_enet_dma_rx_ring_disable()
379 		enet_maskset(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0);  in bcm4908_enet_dma_rx_ring_disable()