Lines Matching refs:CSR0_STOP
195 #define CSR0_STOP 0x4 macro
763 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); in pcnet32_set_link_ksettings()
893 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */ in pcnet32_set_ringparam()
989 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */ in pcnet32_loopback_test()
1003 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */ in pcnet32_loopback_test()
1076 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */ in pcnet32_loopback_test()
1444 if (!(csr0 & CSR0_STOP)) /* If not stopped */ in pcnet32_get_regs()
1481 if (!(csr0 & CSR0_STOP)) /* If not stopped */ in pcnet32_get_regs()
2429 if (lp->a->read_csr(ioaddr, CSR0) & CSR0_STOP) in pcnet32_restart()
2460 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); in pcnet32_tx_timeout()
2640 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); in pcnet32_close()
2740 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); in pcnet32_set_multicast_list()