Lines Matching refs:ena_dev
69 static int ena_com_mem_addr_set(struct ena_com_dev *ena_dev, in ena_com_mem_addr_set() argument
73 if ((addr & GENMASK_ULL(ena_dev->dma_addr_bits - 1, 0)) != addr) { in ena_com_mem_addr_set()
74 netdev_err(ena_dev->net_device, in ena_com_mem_addr_set()
87 struct ena_com_dev *ena_dev = admin_queue->ena_dev; in ena_com_admin_init_sq() local
95 netdev_err(ena_dev->net_device, "Memory allocation failed\n"); in ena_com_admin_init_sq()
110 struct ena_com_dev *ena_dev = admin_queue->ena_dev; in ena_com_admin_init_cq() local
118 netdev_err(ena_dev->net_device, "Memory allocation failed\n"); in ena_com_admin_init_cq()
128 static int ena_com_admin_init_aenq(struct ena_com_dev *ena_dev, in ena_com_admin_init_aenq() argument
131 struct ena_com_aenq *aenq = &ena_dev->aenq; in ena_com_admin_init_aenq()
135 ena_dev->aenq.q_depth = ENA_ASYNC_QUEUE_DEPTH; in ena_com_admin_init_aenq()
137 aenq->entries = dma_alloc_coherent(ena_dev->dmadev, size, in ena_com_admin_init_aenq()
141 netdev_err(ena_dev->net_device, "Memory allocation failed\n"); in ena_com_admin_init_aenq()
151 writel(addr_low, ena_dev->reg_bar + ENA_REGS_AENQ_BASE_LO_OFF); in ena_com_admin_init_aenq()
152 writel(addr_high, ena_dev->reg_bar + ENA_REGS_AENQ_BASE_HI_OFF); in ena_com_admin_init_aenq()
155 aenq_caps |= ena_dev->aenq.q_depth & ENA_REGS_AENQ_CAPS_AENQ_DEPTH_MASK; in ena_com_admin_init_aenq()
159 writel(aenq_caps, ena_dev->reg_bar + ENA_REGS_AENQ_CAPS_OFF); in ena_com_admin_init_aenq()
162 netdev_err(ena_dev->net_device, in ena_com_admin_init_aenq()
183 netdev_err(admin_queue->ena_dev->net_device, in get_comp_ctxt()
190 netdev_err(admin_queue->ena_dev->net_device, in get_comp_ctxt()
196 netdev_err(admin_queue->ena_dev->net_device, in get_comp_ctxt()
227 netdev_dbg(admin_queue->ena_dev->net_device, in __ena_com_submit_admin_cmd()
270 struct ena_com_dev *ena_dev = admin_queue->ena_dev; in ena_com_init_comp_ctxt() local
278 netdev_err(ena_dev->net_device, "Memory allocation failed\n"); in ena_com_init_comp_ctxt()
316 static int ena_com_init_io_sq(struct ena_com_dev *ena_dev, in ena_com_init_io_sq() argument
325 io_sq->dma_addr_bits = (u8)ena_dev->dma_addr_bits; in ena_com_init_io_sq()
334 dev_node = dev_to_node(ena_dev->dmadev); in ena_com_init_io_sq()
335 set_dev_node(ena_dev->dmadev, ctx->numa_node); in ena_com_init_io_sq()
337 dma_alloc_coherent(ena_dev->dmadev, size, in ena_com_init_io_sq()
340 set_dev_node(ena_dev->dmadev, dev_node); in ena_com_init_io_sq()
343 dma_alloc_coherent(ena_dev->dmadev, size, in ena_com_init_io_sq()
349 netdev_err(ena_dev->net_device, in ena_com_init_io_sq()
358 ena_dev->llq_info.desc_list_entry_size; in ena_com_init_io_sq()
366 dev_node = dev_to_node(ena_dev->dmadev); in ena_com_init_io_sq()
367 set_dev_node(ena_dev->dmadev, ctx->numa_node); in ena_com_init_io_sq()
369 devm_kzalloc(ena_dev->dmadev, size, GFP_KERNEL); in ena_com_init_io_sq()
370 set_dev_node(ena_dev->dmadev, dev_node); in ena_com_init_io_sq()
373 devm_kzalloc(ena_dev->dmadev, size, GFP_KERNEL); in ena_com_init_io_sq()
376 netdev_err(ena_dev->net_device, in ena_com_init_io_sq()
381 memcpy(&io_sq->llq_info, &ena_dev->llq_info, in ena_com_init_io_sq()
406 static int ena_com_init_io_cq(struct ena_com_dev *ena_dev, in ena_com_init_io_cq() argument
423 prev_node = dev_to_node(ena_dev->dmadev); in ena_com_init_io_cq()
424 set_dev_node(ena_dev->dmadev, ctx->numa_node); in ena_com_init_io_cq()
426 dma_alloc_coherent(ena_dev->dmadev, size, in ena_com_init_io_cq()
428 set_dev_node(ena_dev->dmadev, prev_node); in ena_com_init_io_cq()
431 dma_alloc_coherent(ena_dev->dmadev, size, in ena_com_init_io_cq()
437 netdev_err(ena_dev->net_device, "Memory allocation failed\n"); in ena_com_init_io_cq()
458 netdev_err(admin_queue->ena_dev->net_device, in ena_com_handle_single_admin_completion()
515 netdev_err(admin_queue->ena_dev->net_device, in ena_com_comp_status_to_errno()
563 netdev_err(admin_queue->ena_dev->net_device, in ena_com_wait_and_process_admin_cq_polling()
576 admin_queue->ena_dev->ena_min_poll_delay_us); in ena_com_wait_and_process_admin_cq_polling()
580 netdev_err(admin_queue->ena_dev->net_device, in ena_com_wait_and_process_admin_cq_polling()
604 static int ena_com_set_llq(struct ena_com_dev *ena_dev) in ena_com_set_llq() argument
609 struct ena_com_llq_info *llq_info = &ena_dev->llq_info; in ena_com_set_llq()
613 admin_queue = &ena_dev->admin_queue; in ena_com_set_llq()
634 netdev_err(ena_dev->net_device, in ena_com_set_llq()
640 static int ena_com_config_llq_info(struct ena_com_dev *ena_dev, in ena_com_config_llq_info() argument
644 struct ena_com_llq_info *llq_info = &ena_dev->llq_info; in ena_com_config_llq_info()
657 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
673 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
679 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
703 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
709 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
718 netdev_err(ena_dev->net_device, "Illegal entry size %d\n", in ena_com_config_llq_info()
742 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
748 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
765 rc = ena_com_set_llq(ena_dev); in ena_com_config_llq_info()
767 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
795 netdev_err(admin_queue->ena_dev->net_device, in ena_com_wait_and_process_admin_cq_interrupts()
803 netdev_err(admin_queue->ena_dev->net_device, in ena_com_wait_and_process_admin_cq_interrupts()
828 static u32 ena_com_reg_bar_read32(struct ena_com_dev *ena_dev, u16 offset) in ena_com_reg_bar_read32() argument
830 struct ena_com_mmio_read *mmio_read = &ena_dev->mmio_read; in ena_com_reg_bar_read32()
844 return readl(ena_dev->reg_bar + offset); in ena_com_reg_bar_read32()
855 writel(mmio_read_reg, ena_dev->reg_bar + ENA_REGS_MMIO_REG_READ_OFF); in ena_com_reg_bar_read32()
865 netdev_err(ena_dev->net_device, in ena_com_reg_bar_read32()
874 netdev_err(ena_dev->net_device, in ena_com_reg_bar_read32()
904 static int ena_com_destroy_io_sq(struct ena_com_dev *ena_dev, in ena_com_destroy_io_sq() argument
907 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_destroy_io_sq()
934 netdev_err(ena_dev->net_device, in ena_com_destroy_io_sq()
940 static void ena_com_io_queue_free(struct ena_com_dev *ena_dev, in ena_com_io_queue_free() argument
949 dma_free_coherent(ena_dev->dmadev, size, in ena_com_io_queue_free()
959 dma_free_coherent(ena_dev->dmadev, size, in ena_com_io_queue_free()
967 devm_kfree(ena_dev->dmadev, io_sq->bounce_buf_ctrl.base_buffer); in ena_com_io_queue_free()
972 static int wait_for_reset_state(struct ena_com_dev *ena_dev, u32 timeout, in wait_for_reset_state() argument
982 val = ena_com_reg_bar_read32(ena_dev, ENA_REGS_DEV_STS_OFF); in wait_for_reset_state()
985 netdev_err(ena_dev->net_device, in wait_for_reset_state()
997 ena_delay_exponential_backoff_us(exp++, ena_dev->ena_min_poll_delay_us); in wait_for_reset_state()
1001 static bool ena_com_check_supported_feature_id(struct ena_com_dev *ena_dev, in ena_com_check_supported_feature_id() argument
1008 !(ena_dev->supported_features & feature_mask)) in ena_com_check_supported_feature_id()
1014 static int ena_com_get_feature_ex(struct ena_com_dev *ena_dev, in ena_com_get_feature_ex() argument
1025 if (!ena_com_check_supported_feature_id(ena_dev, feature_id)) { in ena_com_get_feature_ex()
1026 netdev_dbg(ena_dev->net_device, "Feature %d isn't supported\n", in ena_com_get_feature_ex()
1032 admin_queue = &ena_dev->admin_queue; in ena_com_get_feature_ex()
1042 ret = ena_com_mem_addr_set(ena_dev, in ena_com_get_feature_ex()
1046 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_get_feature_ex()
1063 netdev_err(ena_dev->net_device, in ena_com_get_feature_ex()
1070 static int ena_com_get_feature(struct ena_com_dev *ena_dev, in ena_com_get_feature() argument
1075 return ena_com_get_feature_ex(ena_dev, in ena_com_get_feature()
1083 int ena_com_get_current_hash_function(struct ena_com_dev *ena_dev) in ena_com_get_current_hash_function() argument
1085 return ena_dev->rss.hash_func; in ena_com_get_current_hash_function()
1088 static void ena_com_hash_key_fill_default_key(struct ena_com_dev *ena_dev) in ena_com_hash_key_fill_default_key() argument
1091 (ena_dev->rss).hash_key; in ena_com_hash_key_fill_default_key()
1100 static int ena_com_hash_key_allocate(struct ena_com_dev *ena_dev) in ena_com_hash_key_allocate() argument
1102 struct ena_rss *rss = &ena_dev->rss; in ena_com_hash_key_allocate()
1104 if (!ena_com_check_supported_feature_id(ena_dev, in ena_com_hash_key_allocate()
1109 dma_alloc_coherent(ena_dev->dmadev, sizeof(*rss->hash_key), in ena_com_hash_key_allocate()
1118 static void ena_com_hash_key_destroy(struct ena_com_dev *ena_dev) in ena_com_hash_key_destroy() argument
1120 struct ena_rss *rss = &ena_dev->rss; in ena_com_hash_key_destroy()
1123 dma_free_coherent(ena_dev->dmadev, sizeof(*rss->hash_key), in ena_com_hash_key_destroy()
1128 static int ena_com_hash_ctrl_init(struct ena_com_dev *ena_dev) in ena_com_hash_ctrl_init() argument
1130 struct ena_rss *rss = &ena_dev->rss; in ena_com_hash_ctrl_init()
1133 dma_alloc_coherent(ena_dev->dmadev, sizeof(*rss->hash_ctrl), in ena_com_hash_ctrl_init()
1142 static void ena_com_hash_ctrl_destroy(struct ena_com_dev *ena_dev) in ena_com_hash_ctrl_destroy() argument
1144 struct ena_rss *rss = &ena_dev->rss; in ena_com_hash_ctrl_destroy()
1147 dma_free_coherent(ena_dev->dmadev, sizeof(*rss->hash_ctrl), in ena_com_hash_ctrl_destroy()
1152 static int ena_com_indirect_table_allocate(struct ena_com_dev *ena_dev, in ena_com_indirect_table_allocate() argument
1155 struct ena_rss *rss = &ena_dev->rss; in ena_com_indirect_table_allocate()
1160 ret = ena_com_get_feature(ena_dev, &get_resp, in ena_com_indirect_table_allocate()
1167 netdev_err(ena_dev->net_device, in ena_com_indirect_table_allocate()
1178 dma_alloc_coherent(ena_dev->dmadev, tbl_size, in ena_com_indirect_table_allocate()
1185 devm_kzalloc(ena_dev->dmadev, tbl_size, GFP_KERNEL); in ena_com_indirect_table_allocate()
1197 dma_free_coherent(ena_dev->dmadev, tbl_size, rss->rss_ind_tbl, in ena_com_indirect_table_allocate()
1205 static void ena_com_indirect_table_destroy(struct ena_com_dev *ena_dev) in ena_com_indirect_table_destroy() argument
1207 struct ena_rss *rss = &ena_dev->rss; in ena_com_indirect_table_destroy()
1212 dma_free_coherent(ena_dev->dmadev, tbl_size, rss->rss_ind_tbl, in ena_com_indirect_table_destroy()
1217 devm_kfree(ena_dev->dmadev, rss->host_rss_ind_tbl); in ena_com_indirect_table_destroy()
1221 static int ena_com_create_io_sq(struct ena_com_dev *ena_dev, in ena_com_create_io_sq() argument
1224 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_create_io_sq()
1257 ret = ena_com_mem_addr_set(ena_dev, in ena_com_create_io_sq()
1261 netdev_err(ena_dev->net_device, in ena_com_create_io_sq()
1273 netdev_err(ena_dev->net_device, in ena_com_create_io_sq()
1280 io_sq->db_addr = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_sq()
1284 io_sq->header_addr = (u8 __iomem *)((uintptr_t)ena_dev->mem_bar in ena_com_create_io_sq()
1288 (u8 __iomem *)((uintptr_t)ena_dev->mem_bar + in ena_com_create_io_sq()
1292 netdev_dbg(ena_dev->net_device, "Created sq[%u], depth[%u]\n", in ena_com_create_io_sq()
1298 static int ena_com_ind_tbl_convert_to_device(struct ena_com_dev *ena_dev) in ena_com_ind_tbl_convert_to_device() argument
1300 struct ena_rss *rss = &ena_dev->rss; in ena_com_ind_tbl_convert_to_device()
1310 io_sq = &ena_dev->io_sq_queues[qid]; in ena_com_ind_tbl_convert_to_device()
1321 static void ena_com_update_intr_delay_resolution(struct ena_com_dev *ena_dev, in ena_com_update_intr_delay_resolution() argument
1324 u16 prev_intr_delay_resolution = ena_dev->intr_delay_resolution; in ena_com_update_intr_delay_resolution()
1327 netdev_err(ena_dev->net_device, in ena_com_update_intr_delay_resolution()
1333 ena_dev->intr_moder_rx_interval = in ena_com_update_intr_delay_resolution()
1334 ena_dev->intr_moder_rx_interval * in ena_com_update_intr_delay_resolution()
1339 ena_dev->intr_moder_tx_interval = in ena_com_update_intr_delay_resolution()
1340 ena_dev->intr_moder_tx_interval * in ena_com_update_intr_delay_resolution()
1344 ena_dev->intr_delay_resolution = intr_delay_resolution; in ena_com_update_intr_delay_resolution()
1365 netdev_dbg(admin_queue->ena_dev->net_device, in ena_com_execute_admin_command()
1368 netdev_err(admin_queue->ena_dev->net_device, in ena_com_execute_admin_command()
1377 netdev_err(admin_queue->ena_dev->net_device, in ena_com_execute_admin_command()
1380 netdev_dbg(admin_queue->ena_dev->net_device, in ena_com_execute_admin_command()
1386 int ena_com_create_io_cq(struct ena_com_dev *ena_dev, in ena_com_create_io_cq() argument
1389 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_create_io_cq()
1406 ret = ena_com_mem_addr_set(ena_dev, in ena_com_create_io_cq()
1410 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_create_io_cq()
1420 netdev_err(ena_dev->net_device, in ena_com_create_io_cq()
1427 io_cq->unmask_reg = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_cq()
1432 (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_cq()
1437 (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_cq()
1440 netdev_dbg(ena_dev->net_device, "Created cq[%u], depth[%u]\n", in ena_com_create_io_cq()
1446 int ena_com_get_io_handlers(struct ena_com_dev *ena_dev, u16 qid, in ena_com_get_io_handlers() argument
1451 netdev_err(ena_dev->net_device, in ena_com_get_io_handlers()
1457 *io_sq = &ena_dev->io_sq_queues[qid]; in ena_com_get_io_handlers()
1458 *io_cq = &ena_dev->io_cq_queues[qid]; in ena_com_get_io_handlers()
1463 void ena_com_abort_admin_commands(struct ena_com_dev *ena_dev) in ena_com_abort_admin_commands() argument
1465 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_abort_admin_commands()
1483 void ena_com_wait_for_abort_completion(struct ena_com_dev *ena_dev) in ena_com_wait_for_abort_completion() argument
1485 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_wait_for_abort_completion()
1493 ena_dev->ena_min_poll_delay_us); in ena_com_wait_for_abort_completion()
1499 int ena_com_destroy_io_cq(struct ena_com_dev *ena_dev, in ena_com_destroy_io_cq() argument
1502 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_destroy_io_cq()
1519 netdev_err(ena_dev->net_device, in ena_com_destroy_io_cq()
1525 bool ena_com_get_admin_running_state(struct ena_com_dev *ena_dev) in ena_com_get_admin_running_state() argument
1527 return ena_dev->admin_queue.running_state; in ena_com_get_admin_running_state()
1530 void ena_com_set_admin_running_state(struct ena_com_dev *ena_dev, bool state) in ena_com_set_admin_running_state() argument
1532 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_set_admin_running_state()
1536 ena_dev->admin_queue.running_state = state; in ena_com_set_admin_running_state()
1540 void ena_com_admin_aenq_enable(struct ena_com_dev *ena_dev) in ena_com_admin_aenq_enable() argument
1542 u16 depth = ena_dev->aenq.q_depth; in ena_com_admin_aenq_enable()
1544 WARN(ena_dev->aenq.head != depth, "Invalid AENQ state\n"); in ena_com_admin_aenq_enable()
1549 writel(depth, ena_dev->reg_bar + ENA_REGS_AENQ_HEAD_DB_OFF); in ena_com_admin_aenq_enable()
1552 int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag) in ena_com_set_aenq_config() argument
1560 ret = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_AENQ_CONFIG, 0); in ena_com_set_aenq_config()
1562 dev_info(ena_dev->dmadev, "Can't get aenq configuration\n"); in ena_com_set_aenq_config()
1567 netdev_warn(ena_dev->net_device, in ena_com_set_aenq_config()
1574 admin_queue = &ena_dev->admin_queue; in ena_com_set_aenq_config()
1588 netdev_err(ena_dev->net_device, in ena_com_set_aenq_config()
1594 int ena_com_get_dma_width(struct ena_com_dev *ena_dev) in ena_com_get_dma_width() argument
1596 u32 caps = ena_com_reg_bar_read32(ena_dev, ENA_REGS_CAPS_OFF); in ena_com_get_dma_width()
1600 netdev_err(ena_dev->net_device, "Reg read timeout occurred\n"); in ena_com_get_dma_width()
1607 netdev_dbg(ena_dev->net_device, "ENA dma width: %d\n", width); in ena_com_get_dma_width()
1610 netdev_err(ena_dev->net_device, "DMA width illegal value: %d\n", in ena_com_get_dma_width()
1615 ena_dev->dma_addr_bits = width; in ena_com_get_dma_width()
1620 int ena_com_validate_version(struct ena_com_dev *ena_dev) in ena_com_validate_version() argument
1629 ver = ena_com_reg_bar_read32(ena_dev, ENA_REGS_VERSION_OFF); in ena_com_validate_version()
1630 ctrl_ver = ena_com_reg_bar_read32(ena_dev, in ena_com_validate_version()
1635 netdev_err(ena_dev->net_device, "Reg read timeout occurred\n"); in ena_com_validate_version()
1639 dev_info(ena_dev->dmadev, "ENA device version: %d.%d\n", in ena_com_validate_version()
1644 dev_info(ena_dev->dmadev, in ena_com_validate_version()
1661 netdev_err(ena_dev->net_device, in ena_com_validate_version()
1670 ena_com_free_ena_admin_queue_comp_ctx(struct ena_com_dev *ena_dev, in ena_com_free_ena_admin_queue_comp_ctx() argument
1677 devm_kfree(ena_dev->dmadev, admin_queue->comp_ctx); in ena_com_free_ena_admin_queue_comp_ctx()
1682 void ena_com_admin_destroy(struct ena_com_dev *ena_dev) in ena_com_admin_destroy() argument
1684 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_admin_destroy()
1687 struct ena_com_aenq *aenq = &ena_dev->aenq; in ena_com_admin_destroy()
1690 ena_com_free_ena_admin_queue_comp_ctx(ena_dev, admin_queue); in ena_com_admin_destroy()
1694 dma_free_coherent(ena_dev->dmadev, size, sq->entries, in ena_com_admin_destroy()
1700 dma_free_coherent(ena_dev->dmadev, size, cq->entries, in ena_com_admin_destroy()
1705 if (ena_dev->aenq.entries) in ena_com_admin_destroy()
1706 dma_free_coherent(ena_dev->dmadev, size, aenq->entries, in ena_com_admin_destroy()
1711 void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling) in ena_com_set_admin_polling_mode() argument
1718 writel(mask_value, ena_dev->reg_bar + ENA_REGS_INTR_MASK_OFF); in ena_com_set_admin_polling_mode()
1719 ena_dev->admin_queue.polling = polling; in ena_com_set_admin_polling_mode()
1722 void ena_com_set_admin_auto_polling_mode(struct ena_com_dev *ena_dev, in ena_com_set_admin_auto_polling_mode() argument
1725 ena_dev->admin_queue.auto_polling = polling; in ena_com_set_admin_auto_polling_mode()
1728 int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev) in ena_com_mmio_reg_read_request_init() argument
1730 struct ena_com_mmio_read *mmio_read = &ena_dev->mmio_read; in ena_com_mmio_reg_read_request_init()
1734 dma_alloc_coherent(ena_dev->dmadev, in ena_com_mmio_reg_read_request_init()
1740 ena_com_mmio_reg_read_request_write_dev_addr(ena_dev); in ena_com_mmio_reg_read_request_init()
1753 void ena_com_set_mmio_read_mode(struct ena_com_dev *ena_dev, bool readless_supported) in ena_com_set_mmio_read_mode() argument
1755 struct ena_com_mmio_read *mmio_read = &ena_dev->mmio_read; in ena_com_set_mmio_read_mode()
1760 void ena_com_mmio_reg_read_request_destroy(struct ena_com_dev *ena_dev) in ena_com_mmio_reg_read_request_destroy() argument
1762 struct ena_com_mmio_read *mmio_read = &ena_dev->mmio_read; in ena_com_mmio_reg_read_request_destroy()
1764 writel(0x0, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_LO_OFF); in ena_com_mmio_reg_read_request_destroy()
1765 writel(0x0, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_HI_OFF); in ena_com_mmio_reg_read_request_destroy()
1767 dma_free_coherent(ena_dev->dmadev, sizeof(*mmio_read->read_resp), in ena_com_mmio_reg_read_request_destroy()
1773 void ena_com_mmio_reg_read_request_write_dev_addr(struct ena_com_dev *ena_dev) in ena_com_mmio_reg_read_request_write_dev_addr() argument
1775 struct ena_com_mmio_read *mmio_read = &ena_dev->mmio_read; in ena_com_mmio_reg_read_request_write_dev_addr()
1781 writel(addr_low, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_LO_OFF); in ena_com_mmio_reg_read_request_write_dev_addr()
1782 writel(addr_high, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_HI_OFF); in ena_com_mmio_reg_read_request_write_dev_addr()
1785 int ena_com_admin_init(struct ena_com_dev *ena_dev, in ena_com_admin_init() argument
1788 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_admin_init()
1792 dev_sts = ena_com_reg_bar_read32(ena_dev, ENA_REGS_DEV_STS_OFF); in ena_com_admin_init()
1795 netdev_err(ena_dev->net_device, "Reg read timeout occurred\n"); in ena_com_admin_init()
1800 netdev_err(ena_dev->net_device, in ena_com_admin_init()
1807 admin_queue->q_dmadev = ena_dev->dmadev; in ena_com_admin_init()
1827 admin_queue->sq.db_addr = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_admin_init()
1833 writel(addr_low, ena_dev->reg_bar + ENA_REGS_AQ_BASE_LO_OFF); in ena_com_admin_init()
1834 writel(addr_high, ena_dev->reg_bar + ENA_REGS_AQ_BASE_HI_OFF); in ena_com_admin_init()
1839 writel(addr_low, ena_dev->reg_bar + ENA_REGS_ACQ_BASE_LO_OFF); in ena_com_admin_init()
1840 writel(addr_high, ena_dev->reg_bar + ENA_REGS_ACQ_BASE_HI_OFF); in ena_com_admin_init()
1854 writel(aq_caps, ena_dev->reg_bar + ENA_REGS_AQ_CAPS_OFF); in ena_com_admin_init()
1855 writel(acq_caps, ena_dev->reg_bar + ENA_REGS_ACQ_CAPS_OFF); in ena_com_admin_init()
1856 ret = ena_com_admin_init_aenq(ena_dev, aenq_handlers); in ena_com_admin_init()
1860 admin_queue->ena_dev = ena_dev; in ena_com_admin_init()
1865 ena_com_admin_destroy(ena_dev); in ena_com_admin_init()
1870 int ena_com_create_io_queue(struct ena_com_dev *ena_dev, in ena_com_create_io_queue() argument
1878 netdev_err(ena_dev->net_device, in ena_com_create_io_queue()
1884 io_sq = &ena_dev->io_sq_queues[ctx->qid]; in ena_com_create_io_queue()
1885 io_cq = &ena_dev->io_cq_queues[ctx->qid]; in ena_com_create_io_queue()
1906 min_t(u32, ena_dev->tx_max_header_size, SZ_256); in ena_com_create_io_queue()
1908 ret = ena_com_init_io_sq(ena_dev, ctx, io_sq); in ena_com_create_io_queue()
1911 ret = ena_com_init_io_cq(ena_dev, ctx, io_cq); in ena_com_create_io_queue()
1915 ret = ena_com_create_io_cq(ena_dev, io_cq); in ena_com_create_io_queue()
1919 ret = ena_com_create_io_sq(ena_dev, io_sq, io_cq->idx); in ena_com_create_io_queue()
1926 ena_com_destroy_io_cq(ena_dev, io_cq); in ena_com_create_io_queue()
1928 ena_com_io_queue_free(ena_dev, io_sq, io_cq); in ena_com_create_io_queue()
1932 void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid) in ena_com_destroy_io_queue() argument
1938 netdev_err(ena_dev->net_device, in ena_com_destroy_io_queue()
1944 io_sq = &ena_dev->io_sq_queues[qid]; in ena_com_destroy_io_queue()
1945 io_cq = &ena_dev->io_cq_queues[qid]; in ena_com_destroy_io_queue()
1947 ena_com_destroy_io_sq(ena_dev, io_sq); in ena_com_destroy_io_queue()
1948 ena_com_destroy_io_cq(ena_dev, io_cq); in ena_com_destroy_io_queue()
1950 ena_com_io_queue_free(ena_dev, io_sq, io_cq); in ena_com_destroy_io_queue()
1953 int ena_com_get_link_params(struct ena_com_dev *ena_dev, in ena_com_get_link_params() argument
1956 return ena_com_get_feature(ena_dev, resp, ENA_ADMIN_LINK_CONFIG, 0); in ena_com_get_link_params()
1959 int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev, in ena_com_get_dev_attr_feat() argument
1965 rc = ena_com_get_feature(ena_dev, &get_resp, in ena_com_get_dev_attr_feat()
1973 ena_dev->supported_features = get_resp.u.dev_attr.supported_features; in ena_com_get_dev_attr_feat()
1974 ena_dev->capabilities = get_resp.u.dev_attr.capabilities; in ena_com_get_dev_attr_feat()
1976 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { in ena_com_get_dev_attr_feat()
1977 rc = ena_com_get_feature(ena_dev, &get_resp, in ena_com_get_dev_attr_feat()
1989 ena_dev->tx_max_header_size = in ena_com_get_dev_attr_feat()
1992 rc = ena_com_get_feature(ena_dev, &get_resp, in ena_com_get_dev_attr_feat()
1996 ena_dev->tx_max_header_size = in ena_com_get_dev_attr_feat()
2003 rc = ena_com_get_feature(ena_dev, &get_resp, in ena_com_get_dev_attr_feat()
2011 rc = ena_com_get_feature(ena_dev, &get_resp, in ena_com_get_dev_attr_feat()
2022 rc = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_HW_HINTS, 0); in ena_com_get_dev_attr_feat()
2033 rc = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_LLQ, 0); in ena_com_get_dev_attr_feat()
2045 void ena_com_admin_q_comp_intr_handler(struct ena_com_dev *ena_dev) in ena_com_admin_q_comp_intr_handler() argument
2047 ena_com_handle_admin_completion(&ena_dev->admin_queue); in ena_com_admin_q_comp_intr_handler()
2053 static ena_aenq_handler ena_com_get_specific_aenq_cb(struct ena_com_dev *ena_dev, in ena_com_get_specific_aenq_cb() argument
2056 struct ena_aenq_handlers *aenq_handlers = ena_dev->aenq.aenq_handlers; in ena_com_get_specific_aenq_cb()
2068 void ena_com_aenq_intr_handler(struct ena_com_dev *ena_dev, void *data) in ena_com_aenq_intr_handler() argument
2072 struct ena_com_aenq *aenq = &ena_dev->aenq; in ena_com_aenq_intr_handler()
2094 netdev_dbg(ena_dev->net_device, in ena_com_aenq_intr_handler()
2099 handler_cb = ena_com_get_specific_aenq_cb(ena_dev, in ena_com_aenq_intr_handler()
2125 ena_dev->reg_bar + ENA_REGS_AENQ_HEAD_DB_OFF); in ena_com_aenq_intr_handler()
2128 int ena_com_dev_reset(struct ena_com_dev *ena_dev, in ena_com_dev_reset() argument
2134 stat = ena_com_reg_bar_read32(ena_dev, ENA_REGS_DEV_STS_OFF); in ena_com_dev_reset()
2135 cap = ena_com_reg_bar_read32(ena_dev, ENA_REGS_CAPS_OFF); in ena_com_dev_reset()
2139 netdev_err(ena_dev->net_device, "Reg read32 timeout occurred\n"); in ena_com_dev_reset()
2144 netdev_err(ena_dev->net_device, in ena_com_dev_reset()
2152 netdev_err(ena_dev->net_device, "Invalid timeout value\n"); in ena_com_dev_reset()
2160 writel(reset_val, ena_dev->reg_bar + ENA_REGS_DEV_CTL_OFF); in ena_com_dev_reset()
2163 ena_com_mmio_reg_read_request_write_dev_addr(ena_dev); in ena_com_dev_reset()
2165 rc = wait_for_reset_state(ena_dev, timeout, in ena_com_dev_reset()
2168 netdev_err(ena_dev->net_device, in ena_com_dev_reset()
2174 writel(0, ena_dev->reg_bar + ENA_REGS_DEV_CTL_OFF); in ena_com_dev_reset()
2175 rc = wait_for_reset_state(ena_dev, timeout, 0); in ena_com_dev_reset()
2177 netdev_err(ena_dev->net_device, in ena_com_dev_reset()
2186 ena_dev->admin_queue.completion_timeout = timeout * 100000; in ena_com_dev_reset()
2188 ena_dev->admin_queue.completion_timeout = ADMIN_CMD_TIMEOUT_US; in ena_com_dev_reset()
2193 static int ena_get_dev_stats(struct ena_com_dev *ena_dev, in ena_get_dev_stats() argument
2202 admin_queue = &ena_dev->admin_queue; in ena_get_dev_stats()
2215 netdev_err(ena_dev->net_device, in ena_get_dev_stats()
2221 int ena_com_get_eni_stats(struct ena_com_dev *ena_dev, in ena_com_get_eni_stats() argument
2227 if (!ena_com_get_cap(ena_dev, ENA_ADMIN_ENI_STATS)) { in ena_com_get_eni_stats()
2228 netdev_err(ena_dev->net_device, in ena_com_get_eni_stats()
2235 ret = ena_get_dev_stats(ena_dev, &ctx, ENA_ADMIN_GET_STATS_TYPE_ENI); in ena_com_get_eni_stats()
2243 int ena_com_get_dev_basic_stats(struct ena_com_dev *ena_dev, in ena_com_get_dev_basic_stats() argument
2250 ret = ena_get_dev_stats(ena_dev, &ctx, ENA_ADMIN_GET_STATS_TYPE_BASIC); in ena_com_get_dev_basic_stats()
2258 int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, u32 mtu) in ena_com_set_dev_mtu() argument
2265 if (!ena_com_check_supported_feature_id(ena_dev, ENA_ADMIN_MTU)) { in ena_com_set_dev_mtu()
2266 netdev_dbg(ena_dev->net_device, "Feature %d isn't supported\n", in ena_com_set_dev_mtu()
2272 admin_queue = &ena_dev->admin_queue; in ena_com_set_dev_mtu()
2286 netdev_err(ena_dev->net_device, in ena_com_set_dev_mtu()
2292 int ena_com_get_offload_settings(struct ena_com_dev *ena_dev, in ena_com_get_offload_settings() argument
2298 ret = ena_com_get_feature(ena_dev, &resp, in ena_com_get_offload_settings()
2301 netdev_err(ena_dev->net_device, in ena_com_get_offload_settings()
2311 int ena_com_set_hash_function(struct ena_com_dev *ena_dev) in ena_com_set_hash_function() argument
2313 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_set_hash_function()
2314 struct ena_rss *rss = &ena_dev->rss; in ena_com_set_hash_function()
2320 if (!ena_com_check_supported_feature_id(ena_dev, in ena_com_set_hash_function()
2322 netdev_dbg(ena_dev->net_device, "Feature %d isn't supported\n", in ena_com_set_hash_function()
2328 ret = ena_com_get_feature(ena_dev, &get_resp, in ena_com_set_hash_function()
2334 netdev_err(ena_dev->net_device, in ena_com_set_hash_function()
2349 ret = ena_com_mem_addr_set(ena_dev, in ena_com_set_hash_function()
2353 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_set_hash_function()
2365 netdev_err(ena_dev->net_device, in ena_com_set_hash_function()
2374 int ena_com_fill_hash_function(struct ena_com_dev *ena_dev, in ena_com_fill_hash_function() argument
2381 struct ena_rss *rss = &ena_dev->rss; in ena_com_fill_hash_function()
2390 rc = ena_com_get_feature_ex(ena_dev, &get_resp, in ena_com_fill_hash_function()
2398 netdev_err(ena_dev->net_device, in ena_com_fill_hash_function()
2407 netdev_err(ena_dev->net_device, in ena_com_fill_hash_function()
2421 netdev_err(ena_dev->net_device, "Invalid hash function (%d)\n", in ena_com_fill_hash_function()
2428 rc = ena_com_set_hash_function(ena_dev); in ena_com_fill_hash_function()
2437 int ena_com_get_hash_function(struct ena_com_dev *ena_dev, in ena_com_get_hash_function() argument
2440 struct ena_rss *rss = &ena_dev->rss; in ena_com_get_hash_function()
2447 rc = ena_com_get_feature_ex(ena_dev, &get_resp, in ena_com_get_hash_function()
2464 int ena_com_get_hash_key(struct ena_com_dev *ena_dev, u8 *key) in ena_com_get_hash_key() argument
2467 ena_dev->rss.hash_key; in ena_com_get_hash_key()
2476 int ena_com_get_hash_ctrl(struct ena_com_dev *ena_dev, in ena_com_get_hash_ctrl() argument
2480 struct ena_rss *rss = &ena_dev->rss; in ena_com_get_hash_ctrl()
2484 rc = ena_com_get_feature_ex(ena_dev, &get_resp, in ena_com_get_hash_ctrl()
2497 int ena_com_set_hash_ctrl(struct ena_com_dev *ena_dev) in ena_com_set_hash_ctrl() argument
2499 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_set_hash_ctrl()
2500 struct ena_rss *rss = &ena_dev->rss; in ena_com_set_hash_ctrl()
2506 if (!ena_com_check_supported_feature_id(ena_dev, in ena_com_set_hash_ctrl()
2508 netdev_dbg(ena_dev->net_device, "Feature %d isn't supported\n", in ena_com_set_hash_ctrl()
2523 ret = ena_com_mem_addr_set(ena_dev, in ena_com_set_hash_ctrl()
2527 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_set_hash_ctrl()
2538 netdev_err(ena_dev->net_device, in ena_com_set_hash_ctrl()
2544 int ena_com_set_default_hash_ctrl(struct ena_com_dev *ena_dev) in ena_com_set_default_hash_ctrl() argument
2546 struct ena_rss *rss = &ena_dev->rss; in ena_com_set_default_hash_ctrl()
2553 rc = ena_com_get_hash_ctrl(ena_dev, 0, NULL); in ena_com_set_default_hash_ctrl()
2589 netdev_err(ena_dev->net_device, in ena_com_set_default_hash_ctrl()
2597 rc = ena_com_set_hash_ctrl(ena_dev); in ena_com_set_default_hash_ctrl()
2601 ena_com_get_hash_ctrl(ena_dev, 0, NULL); in ena_com_set_default_hash_ctrl()
2606 int ena_com_fill_hash_ctrl(struct ena_com_dev *ena_dev, in ena_com_fill_hash_ctrl() argument
2610 struct ena_rss *rss = &ena_dev->rss; in ena_com_fill_hash_ctrl()
2616 netdev_err(ena_dev->net_device, "Invalid proto num (%u)\n", in ena_com_fill_hash_ctrl()
2622 rc = ena_com_get_hash_ctrl(ena_dev, proto, NULL); in ena_com_fill_hash_ctrl()
2629 netdev_err(ena_dev->net_device, in ena_com_fill_hash_ctrl()
2636 rc = ena_com_set_hash_ctrl(ena_dev); in ena_com_fill_hash_ctrl()
2640 ena_com_get_hash_ctrl(ena_dev, 0, NULL); in ena_com_fill_hash_ctrl()
2645 int ena_com_indirect_table_fill_entry(struct ena_com_dev *ena_dev, in ena_com_indirect_table_fill_entry() argument
2648 struct ena_rss *rss = &ena_dev->rss; in ena_com_indirect_table_fill_entry()
2661 int ena_com_indirect_table_set(struct ena_com_dev *ena_dev) in ena_com_indirect_table_set() argument
2663 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_indirect_table_set()
2664 struct ena_rss *rss = &ena_dev->rss; in ena_com_indirect_table_set()
2670 ena_dev, ENA_ADMIN_RSS_INDIRECTION_TABLE_CONFIG)) { in ena_com_indirect_table_set()
2671 netdev_dbg(ena_dev->net_device, "Feature %d isn't supported\n", in ena_com_indirect_table_set()
2676 ret = ena_com_ind_tbl_convert_to_device(ena_dev); in ena_com_indirect_table_set()
2678 netdev_err(ena_dev->net_device, in ena_com_indirect_table_set()
2692 ret = ena_com_mem_addr_set(ena_dev, in ena_com_indirect_table_set()
2696 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_indirect_table_set()
2710 netdev_err(ena_dev->net_device, in ena_com_indirect_table_set()
2716 int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl) in ena_com_indirect_table_get() argument
2718 struct ena_rss *rss = &ena_dev->rss; in ena_com_indirect_table_get()
2726 rc = ena_com_get_feature_ex(ena_dev, &get_resp, in ena_com_indirect_table_get()
2742 int ena_com_rss_init(struct ena_com_dev *ena_dev, u16 indr_tbl_log_size) in ena_com_rss_init() argument
2746 memset(&ena_dev->rss, 0x0, sizeof(ena_dev->rss)); in ena_com_rss_init()
2748 rc = ena_com_indirect_table_allocate(ena_dev, indr_tbl_log_size); in ena_com_rss_init()
2756 rc = ena_com_hash_key_allocate(ena_dev); in ena_com_rss_init()
2758 ena_com_hash_key_fill_default_key(ena_dev); in ena_com_rss_init()
2762 rc = ena_com_hash_ctrl_init(ena_dev); in ena_com_rss_init()
2769 ena_com_hash_key_destroy(ena_dev); in ena_com_rss_init()
2771 ena_com_indirect_table_destroy(ena_dev); in ena_com_rss_init()
2777 void ena_com_rss_destroy(struct ena_com_dev *ena_dev) in ena_com_rss_destroy() argument
2779 ena_com_indirect_table_destroy(ena_dev); in ena_com_rss_destroy()
2780 ena_com_hash_key_destroy(ena_dev); in ena_com_rss_destroy()
2781 ena_com_hash_ctrl_destroy(ena_dev); in ena_com_rss_destroy()
2783 memset(&ena_dev->rss, 0x0, sizeof(ena_dev->rss)); in ena_com_rss_destroy()
2786 int ena_com_allocate_host_info(struct ena_com_dev *ena_dev) in ena_com_allocate_host_info() argument
2788 struct ena_host_attribute *host_attr = &ena_dev->host_attr; in ena_com_allocate_host_info()
2791 dma_alloc_coherent(ena_dev->dmadev, SZ_4K, in ena_com_allocate_host_info()
2803 int ena_com_allocate_debug_area(struct ena_com_dev *ena_dev, in ena_com_allocate_debug_area() argument
2806 struct ena_host_attribute *host_attr = &ena_dev->host_attr; in ena_com_allocate_debug_area()
2809 dma_alloc_coherent(ena_dev->dmadev, debug_area_size, in ena_com_allocate_debug_area()
2821 void ena_com_delete_host_info(struct ena_com_dev *ena_dev) in ena_com_delete_host_info() argument
2823 struct ena_host_attribute *host_attr = &ena_dev->host_attr; in ena_com_delete_host_info()
2826 dma_free_coherent(ena_dev->dmadev, SZ_4K, host_attr->host_info, in ena_com_delete_host_info()
2832 void ena_com_delete_debug_area(struct ena_com_dev *ena_dev) in ena_com_delete_debug_area() argument
2834 struct ena_host_attribute *host_attr = &ena_dev->host_attr; in ena_com_delete_debug_area()
2837 dma_free_coherent(ena_dev->dmadev, host_attr->debug_area_size, in ena_com_delete_debug_area()
2844 int ena_com_set_host_attributes(struct ena_com_dev *ena_dev) in ena_com_set_host_attributes() argument
2846 struct ena_host_attribute *host_attr = &ena_dev->host_attr; in ena_com_set_host_attributes()
2858 admin_queue = &ena_dev->admin_queue; in ena_com_set_host_attributes()
2863 ret = ena_com_mem_addr_set(ena_dev, in ena_com_set_host_attributes()
2867 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_set_host_attributes()
2871 ret = ena_com_mem_addr_set(ena_dev, in ena_com_set_host_attributes()
2875 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_set_host_attributes()
2888 netdev_err(ena_dev->net_device, in ena_com_set_host_attributes()
2895 bool ena_com_interrupt_moderation_supported(struct ena_com_dev *ena_dev) in ena_com_interrupt_moderation_supported() argument
2897 return ena_com_check_supported_feature_id(ena_dev, in ena_com_interrupt_moderation_supported()
2901 static int ena_com_update_nonadaptive_moderation_interval(struct ena_com_dev *ena_dev, in ena_com_update_nonadaptive_moderation_interval() argument
2907 netdev_err(ena_dev->net_device, in ena_com_update_nonadaptive_moderation_interval()
2917 int ena_com_update_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev, in ena_com_update_nonadaptive_moderation_interval_tx() argument
2920 return ena_com_update_nonadaptive_moderation_interval(ena_dev, in ena_com_update_nonadaptive_moderation_interval_tx()
2922 ena_dev->intr_delay_resolution, in ena_com_update_nonadaptive_moderation_interval_tx()
2923 &ena_dev->intr_moder_tx_interval); in ena_com_update_nonadaptive_moderation_interval_tx()
2926 int ena_com_update_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev, in ena_com_update_nonadaptive_moderation_interval_rx() argument
2929 return ena_com_update_nonadaptive_moderation_interval(ena_dev, in ena_com_update_nonadaptive_moderation_interval_rx()
2931 ena_dev->intr_delay_resolution, in ena_com_update_nonadaptive_moderation_interval_rx()
2932 &ena_dev->intr_moder_rx_interval); in ena_com_update_nonadaptive_moderation_interval_rx()
2935 int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev) in ena_com_init_interrupt_moderation() argument
2941 rc = ena_com_get_feature(ena_dev, &get_resp, in ena_com_init_interrupt_moderation()
2946 netdev_dbg(ena_dev->net_device, in ena_com_init_interrupt_moderation()
2951 netdev_err(ena_dev->net_device, in ena_com_init_interrupt_moderation()
2957 ena_com_disable_adaptive_moderation(ena_dev); in ena_com_init_interrupt_moderation()
2963 ena_com_update_intr_delay_resolution(ena_dev, delay_resolution); in ena_com_init_interrupt_moderation()
2966 ena_com_disable_adaptive_moderation(ena_dev); in ena_com_init_interrupt_moderation()
2971 unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev) in ena_com_get_nonadaptive_moderation_interval_tx() argument
2973 return ena_dev->intr_moder_tx_interval; in ena_com_get_nonadaptive_moderation_interval_tx()
2976 unsigned int ena_com_get_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev) in ena_com_get_nonadaptive_moderation_interval_rx() argument
2978 return ena_dev->intr_moder_rx_interval; in ena_com_get_nonadaptive_moderation_interval_rx()
2981 int ena_com_config_dev_mode(struct ena_com_dev *ena_dev, in ena_com_config_dev_mode() argument
2985 struct ena_com_llq_info *llq_info = &ena_dev->llq_info; in ena_com_config_dev_mode()
2989 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; in ena_com_config_dev_mode()
2993 rc = ena_com_config_llq_info(ena_dev, llq_features, llq_default_cfg); in ena_com_config_dev_mode()
2997 ena_dev->tx_max_header_size = llq_info->desc_list_entry_size - in ena_com_config_dev_mode()
3000 if (unlikely(ena_dev->tx_max_header_size == 0)) { in ena_com_config_dev_mode()
3001 netdev_err(ena_dev->net_device, in ena_com_config_dev_mode()
3006 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_DEV; in ena_com_config_dev_mode()