1 // SPDX-License-Identifier: GPL-2.0
3  * Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch
4  * Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch
5  * Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch
6  * Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch
8  * These switches have a built-in 8051 CPU and can download and execute a
10  * handling the switch in a memory-mapped manner by connecting to that external
31 #include "vitesse-vsc73xx.h"
33 #define VSC73XX_BLOCK_MAC	0x1 /* Subblocks 0-4, 6 (CPU port) */
84 #define VSC73XX_MAC_CFG_MAC_RX_RST	BIT(5)
118 #define VSC73XX_ADVPORTM_EXT_PORT	BIT(5)
180 #define VSC73XX_MACACCESS_CMD_CLEAR_TABLE	5
199 /* Arbiter block 5 registers */
266 #define IS_7385(a) ((a)->chipid == VSC73XX_CHIPID_ID_7385)
267 #define IS_7388(a) ((a)->chipid == VSC73XX_CHIPID_ID_7388)
268 #define IS_7395(a) ((a)->chipid == VSC73XX_CHIPID_ID_7395)
269 #define IS_7398(a) ((a)->chipid == VSC73XX_CHIPID_ID_7398)
278  * Some counters are custom, non-standard. The standard counters are
279  * named in accordance with RFC2819, RFC2021 and IEEE Std 802.3-2002 Annex
284 	{ 1, "RxBroadcast+MulticastPkts" }, /* non-standard counter */
285 	{ 2, "RxTotalErrorPackets" }, /* non-standard counter */
288 	{ 5, "RxEtherStatsPkts64Octets" },
294 	{ 11, "RxJumboFrames" }, /* non-standard counter */
296 	{ 13, "RxFIFODrops" }, /* non-standard counter */
297 	{ 14, "RxBackwardDrops" }, /* non-standard counter */
298 	{ 15, "RxClassifierDrops" }, /* non-standard counter */
305 	/* 22-24 are undefined */
307 	{ 26, "RxQoSClass0" }, /* non-standard counter */
308 	{ 27, "RxQoSClass1" }, /* non-standard counter */
309 	{ 28, "RxQoSClass2" }, /* non-standard counter */
310 	{ 29, "RxQoSClass3" }, /* non-standard counter */
315 	{ 1, "TxBroadcast+MulticastPkts" }, /* non-standard counter */
316 	{ 2, "TxTotalErrorPackets" }, /* non-standard counter */
319 	{ 5, "TxEtherStatsPkts64Octets" },
325 	{ 11, "TxJumboFrames" }, /* non-standard counter */
327 	{ 13, "TxFIFODrops" }, /* non-standard counter */
328 	{ 14, "TxDrops" }, /* non-standard counter */
335 	/* 21-24 are undefined */
337 	{ 26, "TxQoSClass0" }, /* non-standard counter */
338 	{ 27, "TxQoSClass1" }, /* non-standard counter */
339 	{ 28, "TxQoSClass2" }, /* non-standard counter */
340 	{ 29, "TxQoSClass3" }, /* non-standard counter */
379 	return vsc->ops->read(vsc, block, subblock, reg, val);  in vsc73xx_read()
385 	return vsc->ops->write(vsc, block, subblock, reg, val);  in vsc73xx_write()
394 	/* Same read-modify-write algorithm as e.g. regmap */  in vsc73xx_update_bits()
415 		dev_err(vsc->dev, "unable to read mailbox (%d)\n", ret);  in vsc73xx_detect()
420 		dev_info(vsc->dev, "chip seems dead.\n");  in vsc73xx_detect()
421 		return -EAGAIN;  in vsc73xx_detect()
427 		dev_err(vsc->dev, "unable to read chip id (%d)\n", ret);  in vsc73xx_detect()
440 		dev_err(vsc->dev, "unsupported chip, id=%04x\n", id);  in vsc73xx_detect()
441 		return -ENODEV;  in vsc73xx_detect()
444 	vsc->chipid = id;  in vsc73xx_detect()
447 	dev_info(vsc->dev, "VSC%04X (rev: %d) switch found\n", id, rev);  in vsc73xx_detect()
452 		dev_err(vsc->dev, "unable to read iCPU control\n");  in vsc73xx_detect()
465 		dev_err(vsc->dev,  in vsc73xx_detect()
467 		dev_err(vsc->dev, "no idea how to deal with this\n");  in vsc73xx_detect()
468 		return -ENODEV;  in vsc73xx_detect()
471 		dev_err(vsc->dev,  in vsc73xx_detect()
473 		return -EAGAIN;  in vsc73xx_detect()
476 		dev_err(vsc->dev,  in vsc73xx_detect()
478 		dev_err(vsc->dev, "no idea how to deal with this\n");  in vsc73xx_detect()
479 		return -ENODEV;  in vsc73xx_detect()
482 	dev_info(vsc->dev, "iCPU disabled, no external memory\n");  in vsc73xx_detect()
489 	struct vsc73xx *vsc = ds->priv;  in vsc73xx_phy_read()
504 		dev_err(vsc->dev, "reading reg %02x from phy%d failed\n",  in vsc73xx_phy_read()
506 		return -EIO;  in vsc73xx_phy_read()
510 	dev_dbg(vsc->dev, "read reg %02x from phy%d = %04x\n",  in vsc73xx_phy_read()
519 	struct vsc73xx *vsc = ds->priv;  in vsc73xx_phy_write()
530 		dev_info(vsc->dev, "reset PHY - disallowed\n");  in vsc73xx_phy_write()
539 	dev_dbg(vsc->dev, "write %04x to reg %02x in phy%d\n",  in vsc73xx_phy_write()
562 	struct vsc73xx *vsc = ds->priv;  in vsc73xx_setup()
565 	dev_info(vsc->dev, "set up the switch\n");  in vsc73xx_setup()
574 	 * VSC7385 SparX-G5 datasheet section 6.6.1  in vsc73xx_setup()
575 	 * VSC7395 SparX-G5e datasheet section 6.6.1  in vsc73xx_setup()
613 		if (i == 5)  in vsc73xx_setup()
652 	 * augmented after auto-negotiation on the PHY-facing  in vsc73xx_init_port()
693 	val = (vsc->addr[5] << 16) | (vsc->addr[4] << 8) | (vsc->addr[3]);  in vsc73xx_init_port()
698 	val = (vsc->addr[2] << 16) | (vsc->addr[1] << 8) | (vsc->addr[0]);  in vsc73xx_init_port()
760 	struct vsc73xx *vsc = ds->priv;  in vsc73xx_adjust_link()
763 	/* Special handling of the CPU-facing port */  in vsc73xx_adjust_link()
782 	if (!phydev->link) {  in vsc73xx_adjust_link()
785 		dev_dbg(vsc->dev, "port %d: went down\n",  in vsc73xx_adjust_link()
804 			if (--maxloop == 0) {  in vsc73xx_adjust_link()
805 				dev_err(vsc->dev,  in vsc73xx_adjust_link()
832 	if (phydev->speed == SPEED_1000) {  in vsc73xx_adjust_link()
833 		dev_dbg(vsc->dev, "port %d: 1000 Mbit mode full duplex\n",  in vsc73xx_adjust_link()
837 		if (phydev->interface == PHY_INTERFACE_MODE_RGMII)  in vsc73xx_adjust_link()
842 	} else if (phydev->speed == SPEED_100) {  in vsc73xx_adjust_link()
843 		if (phydev->duplex == DUPLEX_FULL) {  in vsc73xx_adjust_link()
845 			dev_dbg(vsc->dev,  in vsc73xx_adjust_link()
850 			dev_dbg(vsc->dev,  in vsc73xx_adjust_link()
855 	} else if (phydev->speed == SPEED_10) {  in vsc73xx_adjust_link()
856 		if (phydev->duplex == DUPLEX_FULL) {  in vsc73xx_adjust_link()
858 			dev_dbg(vsc->dev,  in vsc73xx_adjust_link()
863 			dev_dbg(vsc->dev,  in vsc73xx_adjust_link()
869 		dev_err(vsc->dev,  in vsc73xx_adjust_link()
881 	struct vsc73xx *vsc = ds->priv;  in vsc73xx_port_enable()
883 	dev_info(vsc->dev, "enable port %d\n", port);  in vsc73xx_port_enable()
891 	struct vsc73xx *vsc = ds->priv;  in vsc73xx_port_disable()
919 		if (cnt->counter == counter)  in vsc73xx_find_counter()
930 	struct vsc73xx *vsc = ds->priv;  in vsc73xx_get_strings()
945 	indices[1] = ((val >> 5) & 0x1f); /* RX counter 1 */  in vsc73xx_get_strings()
949 	indices[5] = ((val >> 26) & 0x1f); /* TX counter 2 */  in vsc73xx_get_strings()
958 	 * figure out what counters we use in this set-up and return the  in vsc73xx_get_strings()
967 				cnt->name, ETH_GSTRING_LEN);  in vsc73xx_get_strings()
980 				cnt->name, ETH_GSTRING_LEN);  in vsc73xx_get_strings()
997 	struct vsc73xx *vsc = ds->priv;  in vsc73xx_get_ethtool_stats()
1016 			dev_err(vsc->dev, "error reading counter %d\n", i);  in vsc73xx_get_ethtool_stats()
1025 	struct vsc73xx *vsc = ds->priv;  in vsc73xx_change_mtu()
1120 	vsc->gc.label = devm_kasprintf(vsc->dev, GFP_KERNEL, "VSC%04x",  in vsc73xx_gpio_probe()
1121 				       vsc->chipid);  in vsc73xx_gpio_probe()
1122 	vsc->gc.ngpio = 4;  in vsc73xx_gpio_probe()
1123 	vsc->gc.owner = THIS_MODULE;  in vsc73xx_gpio_probe()
1124 	vsc->gc.parent = vsc->dev;  in vsc73xx_gpio_probe()
1125 	vsc->gc.base = -1;  in vsc73xx_gpio_probe()
1126 	vsc->gc.get = vsc73xx_gpio_get;  in vsc73xx_gpio_probe()
1127 	vsc->gc.set = vsc73xx_gpio_set;  in vsc73xx_gpio_probe()
1128 	vsc->gc.direction_input = vsc73xx_gpio_direction_input;  in vsc73xx_gpio_probe()
1129 	vsc->gc.direction_output = vsc73xx_gpio_direction_output;  in vsc73xx_gpio_probe()
1130 	vsc->gc.get_direction = vsc73xx_gpio_get_direction;  in vsc73xx_gpio_probe()
1131 	vsc->gc.can_sleep = true;  in vsc73xx_gpio_probe()
1132 	ret = devm_gpiochip_add_data(vsc->dev, &vsc->gc, vsc);  in vsc73xx_gpio_probe()
1134 		dev_err(vsc->dev, "unable to register GPIO chip\n");  in vsc73xx_gpio_probe()
1142 	struct device *dev = vsc->dev;  in vsc73xx_probe()
1146 	vsc->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);  in vsc73xx_probe()
1147 	if (IS_ERR(vsc->reset)) {  in vsc73xx_probe()
1149 		return PTR_ERR(vsc->reset);  in vsc73xx_probe()
1151 	if (vsc->reset)  in vsc73xx_probe()
1156 	if (ret == -EAGAIN) {  in vsc73xx_probe()
1157 		dev_err(vsc->dev,  in vsc73xx_probe()
1159 		gpiod_set_value_cansleep(vsc->reset, 1);  in vsc73xx_probe()
1164 		gpiod_set_value_cansleep(vsc->reset, 0);  in vsc73xx_probe()
1171 		return -ENODEV;  in vsc73xx_probe()
1174 	eth_random_addr(vsc->addr);  in vsc73xx_probe()
1175 	dev_info(vsc->dev,  in vsc73xx_probe()
1177 		 vsc->addr[0], vsc->addr[1], vsc->addr[2],  in vsc73xx_probe()
1178 		 vsc->addr[3], vsc->addr[4], vsc->addr[5]);  in vsc73xx_probe()
1180 	/* The VSC7395 switch chips have 5+1 ports which means 5  in vsc73xx_probe()
1183 	 * and 6, so they leave a "hole" in the port map for port 5,  in vsc73xx_probe()
1191 	vsc->ds = devm_kzalloc(dev, sizeof(*vsc->ds), GFP_KERNEL);  in vsc73xx_probe()
1192 	if (!vsc->ds)  in vsc73xx_probe()
1193 		return -ENOMEM;  in vsc73xx_probe()
1195 	vsc->ds->dev = dev;  in vsc73xx_probe()
1196 	vsc->ds->num_ports = 8;  in vsc73xx_probe()
1197 	vsc->ds->priv = vsc;  in vsc73xx_probe()
1199 	vsc->ds->ops = &vsc73xx_ds_ops;  in vsc73xx_probe()
1200 	ret = dsa_register_switch(vsc->ds);  in vsc73xx_probe()
1208 		dsa_unregister_switch(vsc->ds);  in vsc73xx_probe()
1218 	dsa_unregister_switch(vsc->ds);  in vsc73xx_remove()
1219 	gpiod_set_value(vsc->reset, 1);  in vsc73xx_remove()
1225 	dsa_switch_shutdown(vsc->ds);  in vsc73xx_shutdown()