Lines Matching +full:realtek +full:- +full:smi
1 // SPDX-License-Identifier: GPL-2.0
2 /* Realtek SMI subdriver for the Realtek RTL8366RB ethernet switch
9 * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
24 #include "realtek.h"
46 /* Switch per-port learning disablement register */
164 * VID such as untagged or priority-tagged frames for respective
167 * a C-tag with VID != 0 for respective port.
354 * struct rtl8366rb - RTL8366RB-specific data
355 * @max_mtu: per-port max MTU setting
410 mib->offset; in rtl8366rb_get_mib_counter()
415 ret = regmap_write(priv->map, addr, 0); /* Write whatever */ in rtl8366rb_get_mib_counter()
420 ret = regmap_read(priv->map, RTL8366RB_MIB_CTRL_REG, &val); in rtl8366rb_get_mib_counter()
422 return -EIO; in rtl8366rb_get_mib_counter()
425 return -EBUSY; in rtl8366rb_get_mib_counter()
428 return -EIO; in rtl8366rb_get_mib_counter()
432 for (i = mib->length; i > 0; i--) { in rtl8366rb_get_mib_counter()
433 ret = regmap_read(priv->map, addr + (i - 1), &val); in rtl8366rb_get_mib_counter()
461 ret = regmap_update_bits(priv->map, RTL8366RB_INTERRUPT_MASK_REG, in rtl8366rb_mask_irq()
464 dev_err(priv->dev, "could not mask IRQ\n"); in rtl8366rb_mask_irq()
472 ret = regmap_update_bits(priv->map, RTL8366RB_INTERRUPT_MASK_REG, in rtl8366rb_unmask_irq()
476 dev_err(priv->dev, "could not unmask IRQ\n"); in rtl8366rb_unmask_irq()
486 ret = regmap_read(priv->map, RTL8366RB_INTERRUPT_STATUS_REG, in rtl8366rb_irq()
489 dev_err(priv->dev, "can't read interrupt status\n"); in rtl8366rb_irq()
504 line -= 5; in rtl8366rb_irq()
505 child_irq = irq_find_mapping(priv->irqdomain, line); in rtl8366rb_irq()
520 irq_set_chip_data(irq, domain->host_data); in rtl8366rb_irq_map()
550 intc = of_get_child_by_name(priv->dev->of_node, "interrupt-controller"); in rtl8366rb_setup_cascaded_irq()
552 dev_err(priv->dev, "missing child interrupt-controller node\n"); in rtl8366rb_setup_cascaded_irq()
553 return -EINVAL; in rtl8366rb_setup_cascaded_irq()
558 dev_err(priv->dev, "failed to get parent IRQ\n"); in rtl8366rb_setup_cascaded_irq()
559 ret = irq ? irq : -EINVAL; in rtl8366rb_setup_cascaded_irq()
564 ret = regmap_read(priv->map, RTL8366RB_INTERRUPT_STATUS_REG, in rtl8366rb_setup_cascaded_irq()
567 dev_err(priv->dev, "can't read interrupt status\n"); in rtl8366rb_setup_cascaded_irq()
576 dev_info(priv->dev, "active high/rising IRQ\n"); in rtl8366rb_setup_cascaded_irq()
581 dev_info(priv->dev, "active low/falling IRQ\n"); in rtl8366rb_setup_cascaded_irq()
585 ret = regmap_update_bits(priv->map, RTL8366RB_INTERRUPT_CONTROL_REG, in rtl8366rb_setup_cascaded_irq()
589 dev_err(priv->dev, "could not configure IRQ polarity\n"); in rtl8366rb_setup_cascaded_irq()
593 ret = devm_request_threaded_irq(priv->dev, irq, NULL, in rtl8366rb_setup_cascaded_irq()
597 dev_err(priv->dev, "unable to request irq: %d\n", ret); in rtl8366rb_setup_cascaded_irq()
600 priv->irqdomain = irq_domain_add_linear(intc, in rtl8366rb_setup_cascaded_irq()
604 if (!priv->irqdomain) { in rtl8366rb_setup_cascaded_irq()
605 dev_err(priv->dev, "failed to create IRQ domain\n"); in rtl8366rb_setup_cascaded_irq()
606 ret = -EINVAL; in rtl8366rb_setup_cascaded_irq()
609 for (i = 0; i < priv->num_ports; i++) in rtl8366rb_setup_cascaded_irq()
610 irq_set_parent(irq_create_mapping(priv->irqdomain, i), irq); in rtl8366rb_setup_cascaded_irq()
625 dev_info(priv->dev, "set MAC: %02X:%02X:%02X:%02X:%02X:%02X\n", in rtl8366rb_set_addr()
628 ret = regmap_write(priv->map, RTL8366RB_SMAR0, val); in rtl8366rb_set_addr()
632 ret = regmap_write(priv->map, RTL8366RB_SMAR1, val); in rtl8366rb_set_addr()
636 ret = regmap_write(priv->map, RTL8366RB_SMAR2, val); in rtl8366rb_set_addr()
684 /* This v1 init sequence is from Belkin F5D8235 U-Boot release */
699 /* This v2 init sequence is from Belkin F5D8235 U-Boot release */
735 /* Belkin F5D8235 v1, "belkin,f5d8235-v1" */
777 ret = regmap_read(priv->map, in rtl8366rb_jam_table()
783 ret = regmap_write(priv->map, in rtl8366rb_jam_table()
791 dev_dbg(priv->dev, "jam %04x into register %04x\n", in rtl8366rb_jam_table()
794 ret = regmap_write(priv->map, in rtl8366rb_jam_table()
805 struct realtek_priv *priv = ds->priv; in rtl8366rb_setup()
815 rb = priv->chip_data; in rtl8366rb_setup()
817 ret = regmap_read(priv->map, RTL8366RB_CHIP_ID_REG, &chip_id); in rtl8366rb_setup()
819 dev_err(priv->dev, "unable to read chip id\n"); in rtl8366rb_setup()
827 dev_err(priv->dev, "unknown chip id (%04x)\n", chip_id); in rtl8366rb_setup()
828 return -ENODEV; in rtl8366rb_setup()
831 ret = regmap_read(priv->map, RTL8366RB_CHIP_VERSION_CTRL_REG, in rtl8366rb_setup()
834 dev_err(priv->dev, "unable to read chip version\n"); in rtl8366rb_setup()
838 dev_info(priv->dev, "RTL%04x ver %u chip found\n", in rtl8366rb_setup()
863 * without them, using just the off-the-shelf tables. in rtl8366rb_setup()
865 if (of_machine_is_compatible("belkin,f5d8235-v1")) { in rtl8366rb_setup()
881 ret = regmap_write(priv->map, RTL8366RB_PORT_ISO(i), in rtl8366rb_setup()
888 ret = regmap_write(priv->map, RTL8366RB_PORT_ISO(RTL8366RB_PORT_NUM_CPU), in rtl8366rb_setup()
900 ret = regmap_write(priv->map, in rtl8366rb_setup()
907 ret = regmap_write(priv->map, 0x0c, 0x240); in rtl8366rb_setup()
910 ret = regmap_write(priv->map, 0x0d, 0x240); in rtl8366rb_setup()
924 ret = regmap_update_bits(priv->map, RTL8368RB_CPU_CTRL_REG, in rtl8366rb_setup()
926 BIT(priv->cpu_port)); in rtl8366rb_setup()
930 /* Make sure we default-enable the fixed CPU port */ in rtl8366rb_setup()
931 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, in rtl8366rb_setup()
932 BIT(priv->cpu_port), in rtl8366rb_setup()
938 ret = regmap_update_bits(priv->map, RTL8366RB_SGCR, in rtl8366rb_setup()
945 rb->max_mtu[i] = 1532; in rtl8366rb_setup()
948 ret = regmap_write(priv->map, RTL8366RB_PORT_LEARNDIS_CTRL, in rtl8366rb_setup()
954 ret = regmap_write(priv->map, RTL8366RB_SECURITY_CTRL, 0); in rtl8366rb_setup()
961 * IO modes in the Realtek source code, if your WAN port is in rtl8366rb_setup()
965 ret = regmap_update_bits(priv->map, RTL8366RB_PMC0, in rtl8366rb_setup()
971 /* Accept all packets by default, we enable filtering on-demand */ in rtl8366rb_setup()
972 ret = regmap_write(priv->map, RTL8366RB_VLAN_INGRESS_CTRL1_REG, in rtl8366rb_setup()
976 ret = regmap_write(priv->map, RTL8366RB_VLAN_INGRESS_CTRL2_REG, in rtl8366rb_setup()
982 ret = regmap_update_bits(priv->map, RTL8366RB_SSCR2, in rtl8366rb_setup()
988 ret = regmap_update_bits(priv->map, RTL8366RB_LED_BLINKRATE_REG, in rtl8366rb_setup()
999 if (priv->leds_disabled) { in rtl8366rb_setup()
1001 regmap_update_bits(priv->map, in rtl8366rb_setup()
1004 regmap_update_bits(priv->map, in rtl8366rb_setup()
1007 regmap_update_bits(priv->map, in rtl8366rb_setup()
1017 ret = regmap_update_bits(priv->map, in rtl8366rb_setup()
1031 dev_info(priv->dev, "no interrupt support\n"); in rtl8366rb_setup()
1033 if (priv->setup_interface) { in rtl8366rb_setup()
1034 ret = priv->setup_interface(ds); in rtl8366rb_setup()
1036 dev_err(priv->dev, "could not set up MDIO bus\n"); in rtl8366rb_setup()
1037 return -ENODEV; in rtl8366rb_setup()
1048 /* This switch uses the 4 byte protocol A Realtek DSA tag */ in rtl8366_get_tag_protocol()
1057 struct realtek_priv *priv = ds->priv; in rtl8366rb_mac_link_up()
1060 if (port != priv->cpu_port) in rtl8366rb_mac_link_up()
1063 dev_dbg(priv->dev, "MAC link up on CPU port (%d)\n", port); in rtl8366rb_mac_link_up()
1066 ret = regmap_update_bits(priv->map, RTL8366RB_MAC_FORCE_CTRL_REG, in rtl8366rb_mac_link_up()
1069 dev_err(priv->dev, "failed to force 1Gbit on CPU port\n"); in rtl8366rb_mac_link_up()
1073 ret = regmap_update_bits(priv->map, RTL8366RB_PAACR2, in rtl8366rb_mac_link_up()
1077 dev_err(priv->dev, "failed to set PAACR on CPU port\n"); in rtl8366rb_mac_link_up()
1082 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port), in rtl8366rb_mac_link_up()
1085 dev_err(priv->dev, "failed to enable the CPU port\n"); in rtl8366rb_mac_link_up()
1094 struct realtek_priv *priv = ds->priv; in rtl8366rb_mac_link_down()
1097 if (port != priv->cpu_port) in rtl8366rb_mac_link_down()
1100 dev_dbg(priv->dev, "MAC link down on CPU port (%d)\n", port); in rtl8366rb_mac_link_down()
1103 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port), in rtl8366rb_mac_link_down()
1106 dev_err(priv->dev, "failed to disable the CPU port\n"); in rtl8366rb_mac_link_down()
1117 if (priv->leds_disabled) in rb8366rb_set_port_led()
1122 ret = regmap_update_bits(priv->map, in rb8366rb_set_port_led()
1127 ret = regmap_update_bits(priv->map, in rb8366rb_set_port_led()
1133 ret = regmap_update_bits(priv->map, in rb8366rb_set_port_led()
1138 ret = regmap_update_bits(priv->map, in rb8366rb_set_port_led()
1144 ret = regmap_update_bits(priv->map, in rb8366rb_set_port_led()
1150 dev_err(priv->dev, "no LED for port %d\n", port); in rb8366rb_set_port_led()
1154 dev_err(priv->dev, "error updating LED on port %d\n", port); in rb8366rb_set_port_led()
1161 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_enable()
1164 dev_dbg(priv->dev, "enable port %d\n", port); in rtl8366rb_port_enable()
1165 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port), in rtl8366rb_port_enable()
1177 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_disable()
1180 dev_dbg(priv->dev, "disable port %d\n", port); in rtl8366rb_port_disable()
1181 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port), in rtl8366rb_port_disable()
1195 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_bridge_join()
1208 ret = regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(i), in rtl8366rb_port_bridge_join()
1212 dev_err(priv->dev, "failed to join port %d\n", port); in rtl8366rb_port_bridge_join()
1218 return regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(port), in rtl8366rb_port_bridge_join()
1227 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_bridge_leave()
1240 ret = regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(i), in rtl8366rb_port_bridge_leave()
1243 dev_err(priv->dev, "failed to leave port %d\n", port); in rtl8366rb_port_bridge_leave()
1249 regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(port), in rtl8366rb_port_bridge_leave()
1254 * rtl8366rb_drop_untagged() - make the switch drop untagged and C-tagged frames
1255 * @priv: SMI state container
1256 * @port: the port to drop untagged and C-tagged frames on
1257 * @drop: whether to drop or pass untagged and C-tagged frames
1263 return regmap_update_bits(priv->map, RTL8366RB_VLAN_INGRESS_CTRL1_REG, in rtl8366rb_drop_untagged()
1272 struct realtek_priv *priv = ds->priv; in rtl8366rb_vlan_filtering()
1276 rb = priv->chip_data; in rtl8366rb_vlan_filtering()
1278 dev_dbg(priv->dev, "port %d: %s VLAN filtering\n", port, in rtl8366rb_vlan_filtering()
1282 ret = regmap_update_bits(priv->map, RTL8366RB_VLAN_INGRESS_CTRL2_REG, in rtl8366rb_vlan_filtering()
1288 * not drop any untagged or C-tagged frames. If we turn off VLAN in rtl8366rb_vlan_filtering()
1292 ret = rtl8366rb_drop_untagged(priv, port, !rb->pvid_enabled[port]); in rtl8366rb_vlan_filtering()
1306 return -EINVAL; in rtl8366rb_port_pre_bridge_flags()
1316 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_bridge_flags()
1320 ret = regmap_update_bits(priv->map, RTL8366RB_PORT_LEARNDIS_CTRL, in rtl8366rb_port_bridge_flags()
1333 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_stp_state_set()
1352 dev_err(priv->dev, "unknown bridge state requested\n"); in rtl8366rb_port_stp_state_set()
1358 regmap_update_bits(priv->map, RTL8366RB_STP_STATE_BASE + i, in rtl8366rb_port_stp_state_set()
1367 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_fast_age()
1370 regmap_update_bits(priv->map, RTL8366RB_SECURITY_CTRL, in rtl8366rb_port_fast_age()
1373 regmap_update_bits(priv->map, RTL8366RB_SECURITY_CTRL, in rtl8366rb_port_fast_age()
1379 struct realtek_priv *priv = ds->priv; in rtl8366rb_change_mtu()
1385 /* Cache the per-port MTU setting */ in rtl8366rb_change_mtu()
1386 rb = priv->chip_data; in rtl8366rb_change_mtu()
1387 rb->max_mtu[port] = new_mtu; in rtl8366rb_change_mtu()
1402 if (rb->max_mtu[i] > max_mtu) in rtl8366rb_change_mtu()
1403 max_mtu = rb->max_mtu[i]; in rtl8366rb_change_mtu()
1414 return regmap_update_bits(priv->map, RTL8366RB_SGCR, in rtl8366rb_change_mtu()
1437 return -EINVAL; in rtl8366rb_get_vlan_4k()
1440 ret = regmap_write(priv->map, RTL8366RB_VLAN_TABLE_WRITE_BASE, in rtl8366rb_get_vlan_4k()
1446 ret = regmap_write(priv->map, RTL8366RB_TABLE_ACCESS_CTRL_REG, in rtl8366rb_get_vlan_4k()
1452 ret = regmap_read(priv->map, in rtl8366rb_get_vlan_4k()
1459 vlan4k->vid = vid; in rtl8366rb_get_vlan_4k()
1460 vlan4k->untag = (data[1] >> RTL8366RB_VLAN_UNTAG_SHIFT) & in rtl8366rb_get_vlan_4k()
1462 vlan4k->member = data[1] & RTL8366RB_VLAN_MEMBER_MASK; in rtl8366rb_get_vlan_4k()
1463 vlan4k->fid = data[2] & RTL8366RB_VLAN_FID_MASK; in rtl8366rb_get_vlan_4k()
1475 if (vlan4k->vid >= RTL8366RB_NUM_VIDS || in rtl8366rb_set_vlan_4k()
1476 vlan4k->member > RTL8366RB_VLAN_MEMBER_MASK || in rtl8366rb_set_vlan_4k()
1477 vlan4k->untag > RTL8366RB_VLAN_UNTAG_MASK || in rtl8366rb_set_vlan_4k()
1478 vlan4k->fid > RTL8366RB_FIDMAX) in rtl8366rb_set_vlan_4k()
1479 return -EINVAL; in rtl8366rb_set_vlan_4k()
1481 data[0] = vlan4k->vid & RTL8366RB_VLAN_VID_MASK; in rtl8366rb_set_vlan_4k()
1482 data[1] = (vlan4k->member & RTL8366RB_VLAN_MEMBER_MASK) | in rtl8366rb_set_vlan_4k()
1483 ((vlan4k->untag & RTL8366RB_VLAN_UNTAG_MASK) << in rtl8366rb_set_vlan_4k()
1485 data[2] = vlan4k->fid & RTL8366RB_VLAN_FID_MASK; in rtl8366rb_set_vlan_4k()
1488 ret = regmap_write(priv->map, in rtl8366rb_set_vlan_4k()
1496 ret = regmap_write(priv->map, RTL8366RB_TABLE_ACCESS_CTRL_REG, in rtl8366rb_set_vlan_4k()
1512 return -EINVAL; in rtl8366rb_get_vlan_mc()
1515 ret = regmap_read(priv->map, in rtl8366rb_get_vlan_mc()
1522 vlanmc->vid = data[0] & RTL8366RB_VLAN_VID_MASK; in rtl8366rb_get_vlan_mc()
1523 vlanmc->priority = (data[0] >> RTL8366RB_VLAN_PRIORITY_SHIFT) & in rtl8366rb_get_vlan_mc()
1525 vlanmc->untag = (data[1] >> RTL8366RB_VLAN_UNTAG_SHIFT) & in rtl8366rb_get_vlan_mc()
1527 vlanmc->member = data[1] & RTL8366RB_VLAN_MEMBER_MASK; in rtl8366rb_get_vlan_mc()
1528 vlanmc->fid = data[2] & RTL8366RB_VLAN_FID_MASK; in rtl8366rb_get_vlan_mc()
1541 vlanmc->vid >= RTL8366RB_NUM_VIDS || in rtl8366rb_set_vlan_mc()
1542 vlanmc->priority > RTL8366RB_PRIORITYMAX || in rtl8366rb_set_vlan_mc()
1543 vlanmc->member > RTL8366RB_VLAN_MEMBER_MASK || in rtl8366rb_set_vlan_mc()
1544 vlanmc->untag > RTL8366RB_VLAN_UNTAG_MASK || in rtl8366rb_set_vlan_mc()
1545 vlanmc->fid > RTL8366RB_FIDMAX) in rtl8366rb_set_vlan_mc()
1546 return -EINVAL; in rtl8366rb_set_vlan_mc()
1548 data[0] = (vlanmc->vid & RTL8366RB_VLAN_VID_MASK) | in rtl8366rb_set_vlan_mc()
1549 ((vlanmc->priority & RTL8366RB_VLAN_PRIORITY_MASK) << in rtl8366rb_set_vlan_mc()
1551 data[1] = (vlanmc->member & RTL8366RB_VLAN_MEMBER_MASK) | in rtl8366rb_set_vlan_mc()
1552 ((vlanmc->untag & RTL8366RB_VLAN_UNTAG_MASK) << in rtl8366rb_set_vlan_mc()
1554 data[2] = vlanmc->fid & RTL8366RB_VLAN_FID_MASK; in rtl8366rb_set_vlan_mc()
1557 ret = regmap_write(priv->map, in rtl8366rb_set_vlan_mc()
1572 if (port >= priv->num_ports) in rtl8366rb_get_mc_index()
1573 return -EINVAL; in rtl8366rb_get_mc_index()
1575 ret = regmap_read(priv->map, RTL8366RB_PORT_VLAN_CTRL_REG(port), in rtl8366rb_get_mc_index()
1592 rb = priv->chip_data; in rtl8366rb_set_mc_index()
1595 if (port >= priv->num_ports || index >= RTL8366RB_NUM_VLANS) in rtl8366rb_set_mc_index()
1596 return -EINVAL; in rtl8366rb_set_mc_index()
1598 ret = regmap_update_bits(priv->map, RTL8366RB_PORT_VLAN_CTRL_REG(port), in rtl8366rb_set_mc_index()
1606 rb->pvid_enabled[port] = pvid_enabled; in rtl8366rb_set_mc_index()
1609 * not drop any untagged or C-tagged frames. Make sure to update the in rtl8366rb_set_mc_index()
1612 if (dsa_port_is_vlan_filtering(dsa_to_port(priv->ds, port))) in rtl8366rb_set_mc_index()
1620 unsigned int max = RTL8366RB_NUM_VLANS - 1; in rtl8366rb_is_vlan_valid()
1622 if (priv->vlan4k_enabled) in rtl8366rb_is_vlan_valid()
1623 max = RTL8366RB_NUM_VIDS - 1; in rtl8366rb_is_vlan_valid()
1633 dev_dbg(priv->dev, "%s VLAN\n", enable ? "enable" : "disable"); in rtl8366rb_enable_vlan()
1634 return regmap_update_bits(priv->map, in rtl8366rb_enable_vlan()
1641 dev_dbg(priv->dev, "%s VLAN 4k\n", enable ? "enable" : "disable"); in rtl8366rb_enable_vlan4k()
1642 return regmap_update_bits(priv->map, RTL8366RB_SGCR, in rtl8366rb_enable_vlan4k()
1654 return -EINVAL; in rtl8366rb_phy_read()
1656 mutex_lock(&priv->map_lock); in rtl8366rb_phy_read()
1658 ret = regmap_write(priv->map_nolock, RTL8366RB_PHY_ACCESS_CTRL_REG, in rtl8366rb_phy_read()
1665 ret = regmap_write(priv->map_nolock, reg, 0); in rtl8366rb_phy_read()
1667 dev_err(priv->dev, in rtl8366rb_phy_read()
1673 ret = regmap_read(priv->map_nolock, RTL8366RB_PHY_ACCESS_DATA_REG, in rtl8366rb_phy_read()
1680 dev_dbg(priv->dev, "read PHY%d register 0x%04x @ %08x, val <- %04x\n", in rtl8366rb_phy_read()
1684 mutex_unlock(&priv->map_lock); in rtl8366rb_phy_read()
1696 return -EINVAL; in rtl8366rb_phy_write()
1698 mutex_lock(&priv->map_lock); in rtl8366rb_phy_write()
1700 ret = regmap_write(priv->map_nolock, RTL8366RB_PHY_ACCESS_CTRL_REG, in rtl8366rb_phy_write()
1707 dev_dbg(priv->dev, "write PHY%d register 0x%04x @ %04x, val -> %04x\n", in rtl8366rb_phy_write()
1710 ret = regmap_write(priv->map_nolock, reg, val); in rtl8366rb_phy_write()
1715 mutex_unlock(&priv->map_lock); in rtl8366rb_phy_write()
1722 return rtl8366rb_phy_read(ds->priv, phy, regnum); in rtl8366rb_dsa_phy_read()
1728 return rtl8366rb_phy_write(ds->priv, phy, regnum, val); in rtl8366rb_dsa_phy_write()
1737 priv->write_reg_noack(priv, RTL8366RB_RESET_CTRL_REG, in rtl8366rb_reset_chip()
1741 ret = regmap_read(priv->map, RTL8366RB_RESET_CTRL_REG, &val); in rtl8366rb_reset_chip()
1747 } while (--timeout); in rtl8366rb_reset_chip()
1750 dev_err(priv->dev, "timeout waiting for the switch to reset\n"); in rtl8366rb_reset_chip()
1751 return -EIO; in rtl8366rb_reset_chip()
1759 struct device *dev = priv->dev; in rtl8366rb_detect()
1764 ret = regmap_read(priv->map, 0x5c, &val); in rtl8366rb_detect()
1774 return -ENODEV; in rtl8366rb_detect()
1777 priv->cpu_port = RTL8366RB_PORT_NUM_CPU; in rtl8366rb_detect()
1778 priv->num_ports = RTL8366RB_NUM_PORTS; in rtl8366rb_detect()
1779 priv->num_vlan_mc = RTL8366RB_NUM_VLANS; in rtl8366rb_detect()
1780 priv->mib_counters = rtl8366rb_mib_counters; in rtl8366rb_detect()
1781 priv->num_mib_counters = ARRAY_SIZE(rtl8366rb_mib_counters); in rtl8366rb_detect()
1784 dev_info(dev, "found an Unknown Realtek switch (id=0x%04x)\n", in rtl8366rb_detect()