Lines Matching +full:0 +full:xf003

15 #define MV88E6352_ADDR_SERDES		0x0f
16 #define MV88E6352_SERDES_PAGE_FIBER	0x01
17 #define MV88E6352_SERDES_IRQ		0x0b
18 #define MV88E6352_SERDES_INT_ENABLE	0x12
28 #define MV88E6352_SERDES_INT_STATUS	0x13
30 #define MV88E6352_SERDES_SPEC_CTRL2	0x1a
31 #define MV88E6352_SERDES_OUT_AMP_MASK		0x0007
33 #define MV88E6341_PORT5_LANE		0x15
35 #define MV88E6390_PORT9_LANE0		0x09
36 #define MV88E6390_PORT9_LANE1		0x12
37 #define MV88E6390_PORT9_LANE2		0x13
38 #define MV88E6390_PORT9_LANE3		0x14
39 #define MV88E6390_PORT10_LANE0		0x0a
40 #define MV88E6390_PORT10_LANE1		0x15
41 #define MV88E6390_PORT10_LANE2		0x16
42 #define MV88E6390_PORT10_LANE3		0x17
45 #define MV88E6390_10G_CTRL1		(0x1000 + MDIO_CTRL1)
46 #define MV88E6390_10G_STAT1		(0x1000 + MDIO_STAT1)
47 #define MV88E6393X_10G_INT_ENABLE	0x9000
49 #define MV88E6393X_10G_INT_STATUS	0x9001
52 #define MV88E6390_SGMII_BMCR		(0x2000 + MII_BMCR)
53 #define MV88E6390_SGMII_BMSR		(0x2000 + MII_BMSR)
54 #define MV88E6390_SGMII_ADVERTISE	(0x2000 + MII_ADVERTISE)
55 #define MV88E6390_SGMII_LPA		(0x2000 + MII_LPA)
56 #define MV88E6390_SGMII_INT_ENABLE	0xa001
65 #define MV88E6390_SGMII_INT_STATUS	0xa002
66 #define MV88E6390_SGMII_PHY_STATUS	0xa003
68 #define MV88E6390_SGMII_PHY_STATUS_SPEED_1000	0x8000
69 #define MV88E6390_SGMII_PHY_STATUS_SPEED_100	0x4000
70 #define MV88E6390_SGMII_PHY_STATUS_SPEED_10	0x0000
78 #define MV88E6390_PG_CONTROL		0xf010
79 #define MV88E6390_PG_CONTROL_ENABLE_PC		BIT(0)
81 #define MV88E6393X_PORT0_LANE			0x00
82 #define MV88E6393X_PORT9_LANE			0x09
83 #define MV88E6393X_PORT10_LANE			0x0a
86 #define MV88E6393X_SERDES_POC			0xf002
87 #define MV88E6393X_SERDES_POC_PCS_1000BASEX	0x0000
88 #define MV88E6393X_SERDES_POC_PCS_2500BASEX	0x0001
89 #define MV88E6393X_SERDES_POC_PCS_SGMII_PHY	0x0002
90 #define MV88E6393X_SERDES_POC_PCS_SGMII_MAC	0x0003
91 #define MV88E6393X_SERDES_POC_PCS_5GBASER	0x0004
92 #define MV88E6393X_SERDES_POC_PCS_10GBASER	0x0005
93 #define MV88E6393X_SERDES_POC_PCS_USXGMII_PHY	0x0006
94 #define MV88E6393X_SERDES_POC_PCS_USXGMII_MAC	0x0007
95 #define MV88E6393X_SERDES_POC_PCS_MASK		0x0007
99 #define MV88E6393X_SERDES_CTRL1			0xf003
103 #define MV88E6393X_ERRATA_4_8_REG		0xF074
216 		return 0;  in mv88e6xxx_serdes_irq_mapping()