Lines Matching +full:1 +full:- +full:lane
1 // SPDX-License-Identifier: GPL-2.0-or-later
37 int lane, int device, int reg, u16 *val) in mv88e6390_serdes_read() argument
41 return mv88e6xxx_phy_read(chip, lane, reg_c45, val); in mv88e6390_serdes_read()
45 int lane, int device, int reg, u16 val) in mv88e6390_serdes_write() argument
49 return mv88e6xxx_phy_write(chip, lane, reg_c45, val); in mv88e6390_serdes_write()
56 state->link = false; in mv88e6xxx_serdes_pcs_get_state()
64 state->link = !!(status & MV88E6390_SGMII_PHY_STATUS_LINK); in mv88e6xxx_serdes_pcs_get_state()
65 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); in mv88e6xxx_serdes_pcs_get_state()
68 /* The Spped and Duplex Resolved register is 1 if AN is enabled in mv88e6xxx_serdes_pcs_get_state()
72 state->duplex = status & in mv88e6xxx_serdes_pcs_get_state()
77 state->pause |= MLO_PAUSE_TX; in mv88e6xxx_serdes_pcs_get_state()
79 state->pause |= MLO_PAUSE_RX; in mv88e6xxx_serdes_pcs_get_state()
83 if (state->interface == PHY_INTERFACE_MODE_2500BASEX) in mv88e6xxx_serdes_pcs_get_state()
84 state->speed = SPEED_2500; in mv88e6xxx_serdes_pcs_get_state()
86 state->speed = SPEED_1000; in mv88e6xxx_serdes_pcs_get_state()
89 state->speed = SPEED_100; in mv88e6xxx_serdes_pcs_get_state()
92 state->speed = SPEED_10; in mv88e6xxx_serdes_pcs_get_state()
95 dev_err(chip->dev, "invalid PHY speed\n"); in mv88e6xxx_serdes_pcs_get_state()
96 return -EINVAL; in mv88e6xxx_serdes_pcs_get_state()
98 } else if (state->link && in mv88e6xxx_serdes_pcs_get_state()
99 state->interface != PHY_INTERFACE_MODE_SGMII) { in mv88e6xxx_serdes_pcs_get_state()
102 * and the PHY invoked the Auto-Negotiation Bypass feature and in mv88e6xxx_serdes_pcs_get_state()
105 state->duplex = DUPLEX_FULL; in mv88e6xxx_serdes_pcs_get_state()
106 if (state->interface == PHY_INTERFACE_MODE_2500BASEX) in mv88e6xxx_serdes_pcs_get_state()
107 state->speed = SPEED_2500; in mv88e6xxx_serdes_pcs_get_state()
109 state->speed = SPEED_1000; in mv88e6xxx_serdes_pcs_get_state()
111 state->link = false; in mv88e6xxx_serdes_pcs_get_state()
114 if (state->interface == PHY_INTERFACE_MODE_2500BASEX) in mv88e6xxx_serdes_pcs_get_state()
115 mii_lpa_mod_linkmode_x(state->lp_advertising, lpa, in mv88e6xxx_serdes_pcs_get_state()
117 else if (state->interface == PHY_INTERFACE_MODE_1000BASEX) in mv88e6xxx_serdes_pcs_get_state()
118 mii_lpa_mod_linkmode_x(state->lp_advertising, lpa, in mv88e6xxx_serdes_pcs_get_state()
124 int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane, in mv88e6352_serdes_power() argument
146 int lane, unsigned int mode, in mv88e6352_serdes_pcs_config() argument
195 int lane, struct phylink_link_state *state) in mv88e6352_serdes_pcs_get_state() argument
202 dev_err(chip->dev, "can't read Serdes PHY BMSR: %d\n", err); in mv88e6352_serdes_pcs_get_state()
208 dev_err(chip->dev, "can't read Serdes PHY status: %d\n", err); in mv88e6352_serdes_pcs_get_state()
214 dev_err(chip->dev, "can't read Serdes PHY LPA: %d\n", err); in mv88e6352_serdes_pcs_get_state()
222 int lane) in mv88e6352_serdes_pcs_an_restart() argument
235 int lane, int speed, int duplex) in mv88e6352_serdes_pcs_link_up() argument
267 u8 cmode = chip->ports[port].cmode; in mv88e6352_serdes_get_lane()
268 int lane = -ENODEV; in mv88e6352_serdes_get_lane() local
273 lane = 0xff; /* Unused */ in mv88e6352_serdes_get_lane()
275 return lane; in mv88e6352_serdes_get_lane()
312 memcpy(data + i * ETH_GSTRING_LEN, stat->string, in mv88e6352_serdes_get_strings()
325 err = mv88e6352_serdes_read(chip, stat->reg, ®); in mv88e6352_serdes_get_stat()
327 dev_err(chip->dev, "failed to read statistic\n"); in mv88e6352_serdes_get_stat()
333 if (stat->sizeof_stat == 32) { in mv88e6352_serdes_get_stat()
334 err = mv88e6352_serdes_read(chip, stat->reg + 1, ®); in mv88e6352_serdes_get_stat()
336 dev_err(chip->dev, "failed to read statistic\n"); in mv88e6352_serdes_get_stat()
348 struct mv88e6xxx_port *mv88e6xxx_port = &chip->ports[port]; in mv88e6352_serdes_get_stats()
358 ARRAY_SIZE(mv88e6xxx_port->serdes_stats)); in mv88e6352_serdes_get_stats()
363 mv88e6xxx_port->serdes_stats[i] += value; in mv88e6352_serdes_get_stats()
364 data[i] = mv88e6xxx_port->serdes_stats[i]; in mv88e6352_serdes_get_stats()
378 dev_err(chip->dev, "can't read Serdes BMSR: %d\n", err); in mv88e6352_serdes_irq_link()
382 dsa_port_phylink_mac_change(chip->ds, port, !!(bmsr & BMSR_LSTATUS)); in mv88e6352_serdes_irq_link()
386 int lane) in mv88e6352_serdes_irq_status() argument
404 int mv88e6352_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, int lane, in mv88e6352_serdes_irq_enable() argument
417 return irq_find_mapping(chip->g2_irq.domain, MV88E6352_SERDES_IRQ); in mv88e6352_serdes_irq_mapping()
453 u8 cmode = chip->ports[port].cmode; in mv88e6341_serdes_get_lane()
454 int lane = -ENODEV; in mv88e6341_serdes_get_lane() local
461 lane = MV88E6341_PORT5_LANE; in mv88e6341_serdes_get_lane()
465 return lane; in mv88e6341_serdes_get_lane()
468 int mv88e6185_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane, in mv88e6185_serdes_power() argument
472 * to supply this function to avoid returning -EOPNOTSUPP in in mv88e6185_serdes_power()
481 * need to return a non-negative lane number so that callers of in mv88e6185_serdes_get_lane()
484 switch (chip->ports[port].cmode) { in mv88e6185_serdes_get_lane()
489 return -ENODEV; in mv88e6185_serdes_get_lane()
494 int lane, struct phylink_link_state *state) in mv88e6185_serdes_pcs_get_state() argument
503 state->link = !!(status & MV88E6XXX_PORT_STS_LINK); in mv88e6185_serdes_pcs_get_state()
505 if (state->link) { in mv88e6185_serdes_pcs_get_state()
506 state->duplex = status & MV88E6XXX_PORT_STS_DUPLEX ? DUPLEX_FULL : DUPLEX_HALF; in mv88e6185_serdes_pcs_get_state()
510 state->speed = SPEED_1000; in mv88e6185_serdes_pcs_get_state()
513 state->speed = SPEED_100; in mv88e6185_serdes_pcs_get_state()
516 state->speed = SPEED_10; in mv88e6185_serdes_pcs_get_state()
519 dev_err(chip->dev, "invalid PHY speed\n"); in mv88e6185_serdes_pcs_get_state()
520 return -EINVAL; in mv88e6185_serdes_pcs_get_state()
523 state->duplex = DUPLEX_UNKNOWN; in mv88e6185_serdes_pcs_get_state()
524 state->speed = SPEED_UNKNOWN; in mv88e6185_serdes_pcs_get_state()
530 int mv88e6097_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, int lane, in mv88e6097_serdes_irq_enable() argument
533 u8 cmode = chip->ports[port].cmode; in mv88e6097_serdes_irq_enable()
536 * need to return 0 to avoid returning -EOPNOTSUPP in in mv88e6097_serdes_irq_enable()
545 return -EOPNOTSUPP; in mv88e6097_serdes_irq_enable()
555 dev_err(chip->dev, "can't read port status: %d\n", err); in mv88e6097_serdes_irq_link()
559 dsa_port_phylink_mac_change(chip->ds, port, !!(status & MV88E6XXX_PORT_STS_LINK)); in mv88e6097_serdes_irq_link()
563 int lane) in mv88e6097_serdes_irq_status() argument
565 u8 cmode = chip->ports[port].cmode; in mv88e6097_serdes_irq_status()
579 u8 cmode = chip->ports[port].cmode; in mv88e6390_serdes_get_lane()
580 int lane = -ENODEV; in mv88e6390_serdes_get_lane() local
587 lane = MV88E6390_PORT9_LANE0; in mv88e6390_serdes_get_lane()
593 lane = MV88E6390_PORT10_LANE0; in mv88e6390_serdes_get_lane()
597 return lane; in mv88e6390_serdes_get_lane()
602 u8 cmode_port = chip->ports[port].cmode; in mv88e6390x_serdes_get_lane()
603 u8 cmode_port10 = chip->ports[10].cmode; in mv88e6390x_serdes_get_lane()
604 u8 cmode_port9 = chip->ports[9].cmode; in mv88e6390x_serdes_get_lane()
605 int lane = -ENODEV; in mv88e6390x_serdes_get_lane() local
613 lane = MV88E6390_PORT9_LANE1; in mv88e6390x_serdes_get_lane()
621 lane = MV88E6390_PORT9_LANE2; in mv88e6390x_serdes_get_lane()
629 lane = MV88E6390_PORT9_LANE3; in mv88e6390x_serdes_get_lane()
636 lane = MV88E6390_PORT10_LANE1; in mv88e6390x_serdes_get_lane()
644 lane = MV88E6390_PORT10_LANE2; in mv88e6390x_serdes_get_lane()
652 lane = MV88E6390_PORT10_LANE3; in mv88e6390x_serdes_get_lane()
660 lane = MV88E6390_PORT9_LANE0; in mv88e6390x_serdes_get_lane()
668 lane = MV88E6390_PORT10_LANE0; in mv88e6390x_serdes_get_lane()
672 return lane; in mv88e6390x_serdes_get_lane()
675 /* Only Ports 0, 9 and 10 have SERDES lanes. Return the SERDES lane address
676 * a port is using else Returns -ENODEV.
680 u8 cmode = chip->ports[port].cmode; in mv88e6393x_serdes_get_lane()
681 int lane = -ENODEV; in mv88e6393x_serdes_get_lane() local
684 return -EOPNOTSUPP; in mv88e6393x_serdes_get_lane()
691 lane = port; in mv88e6393x_serdes_get_lane()
693 return lane; in mv88e6393x_serdes_get_lane()
696 /* Set power up/down for 10GBASE-R and 10GBASE-X4/X2 */
697 static int mv88e6390_serdes_power_10g(struct mv88e6xxx_chip *chip, int lane, in mv88e6390_serdes_power_10g() argument
703 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_power_10g()
717 err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_power_10g()
723 /* Set power up/down for SGMII and 1000Base-X */
724 static int mv88e6390_serdes_power_sgmii(struct mv88e6xxx_chip *chip, int lane, in mv88e6390_serdes_power_sgmii() argument
730 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_power_sgmii()
741 err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_power_sgmii()
777 memcpy(data + i * ETH_GSTRING_LEN, stat->string, in mv88e6390_serdes_get_strings()
783 static uint64_t mv88e6390_serdes_get_stat(struct mv88e6xxx_chip *chip, int lane, in mv88e6390_serdes_get_stat() argument
790 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_get_stat()
791 stat->reg + i, ®[i]); in mv88e6390_serdes_get_stat()
793 dev_err(chip->dev, "failed to read statistic\n"); in mv88e6390_serdes_get_stat()
798 return reg[0] | ((u64)reg[1] << 16) | ((u64)reg[2] << 32); in mv88e6390_serdes_get_stat()
805 int lane; in mv88e6390_serdes_get_stats() local
808 lane = mv88e6xxx_serdes_get_lane(chip, port); in mv88e6390_serdes_get_stats()
809 if (lane < 0) in mv88e6390_serdes_get_stats()
814 data[i] = mv88e6390_serdes_get_stat(chip, lane, stat); in mv88e6390_serdes_get_stats()
820 static int mv88e6390_serdes_enable_checker(struct mv88e6xxx_chip *chip, int lane) in mv88e6390_serdes_enable_checker() argument
825 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_enable_checker()
831 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_enable_checker()
835 int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane, in mv88e6390_serdes_power() argument
838 u8 cmode = chip->ports[port].cmode; in mv88e6390_serdes_power()
845 err = mv88e6390_serdes_power_sgmii(chip, lane, up); in mv88e6390_serdes_power()
849 err = mv88e6390_serdes_power_10g(chip, lane, up); in mv88e6390_serdes_power()
852 err = -EINVAL; in mv88e6390_serdes_power()
857 err = mv88e6390_serdes_enable_checker(chip, lane); in mv88e6390_serdes_power()
863 int lane, unsigned int mode, in mv88e6390_serdes_pcs_config() argument
890 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_config()
897 err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_config()
903 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_config()
917 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_config()
922 int port, int lane, struct phylink_link_state *state) in mv88e6390_serdes_pcs_get_state_sgmii() argument
927 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_get_state_sgmii()
930 dev_err(chip->dev, "can't read Serdes PHY BMSR: %d\n", err); in mv88e6390_serdes_pcs_get_state_sgmii()
934 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_get_state_sgmii()
937 dev_err(chip->dev, "can't read Serdes PHY status: %d\n", err); in mv88e6390_serdes_pcs_get_state_sgmii()
941 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_get_state_sgmii()
944 dev_err(chip->dev, "can't read Serdes PHY LPA: %d\n", err); in mv88e6390_serdes_pcs_get_state_sgmii()
952 int port, int lane, struct phylink_link_state *state) in mv88e6390_serdes_pcs_get_state_10g() argument
957 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_get_state_10g()
962 state->link = !!(status & MDIO_STAT1_LSTATUS); in mv88e6390_serdes_pcs_get_state_10g()
963 if (state->link) { in mv88e6390_serdes_pcs_get_state_10g()
964 state->speed = SPEED_10000; in mv88e6390_serdes_pcs_get_state_10g()
965 state->duplex = DUPLEX_FULL; in mv88e6390_serdes_pcs_get_state_10g()
972 int port, int lane, in mv88e6393x_serdes_pcs_get_state_10g() argument
978 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_pcs_get_state_10g()
983 state->link = !!(status & MDIO_STAT1_LSTATUS); in mv88e6393x_serdes_pcs_get_state_10g()
984 if (state->link) { in mv88e6393x_serdes_pcs_get_state_10g()
985 if (state->interface == PHY_INTERFACE_MODE_5GBASER) in mv88e6393x_serdes_pcs_get_state_10g()
986 state->speed = SPEED_5000; in mv88e6393x_serdes_pcs_get_state_10g()
988 state->speed = SPEED_10000; in mv88e6393x_serdes_pcs_get_state_10g()
989 state->duplex = DUPLEX_FULL; in mv88e6393x_serdes_pcs_get_state_10g()
996 int lane, struct phylink_link_state *state) in mv88e6390_serdes_pcs_get_state() argument
998 switch (state->interface) { in mv88e6390_serdes_pcs_get_state()
1002 return mv88e6390_serdes_pcs_get_state_sgmii(chip, port, lane, in mv88e6390_serdes_pcs_get_state()
1006 return mv88e6390_serdes_pcs_get_state_10g(chip, port, lane, in mv88e6390_serdes_pcs_get_state()
1010 return -EOPNOTSUPP; in mv88e6390_serdes_pcs_get_state()
1015 int lane, struct phylink_link_state *state) in mv88e6393x_serdes_pcs_get_state() argument
1017 switch (state->interface) { in mv88e6393x_serdes_pcs_get_state()
1021 return mv88e6390_serdes_pcs_get_state_sgmii(chip, port, lane, in mv88e6393x_serdes_pcs_get_state()
1025 return mv88e6393x_serdes_pcs_get_state_10g(chip, port, lane, in mv88e6393x_serdes_pcs_get_state()
1029 return -EOPNOTSUPP; in mv88e6393x_serdes_pcs_get_state()
1034 int lane) in mv88e6390_serdes_pcs_an_restart() argument
1039 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_an_restart()
1044 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_an_restart()
1050 int lane, int speed, int duplex) in mv88e6390_serdes_pcs_link_up() argument
1055 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_link_up()
1079 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_pcs_link_up()
1084 int port, int lane) in mv88e6390_serdes_irq_link_sgmii() argument
1090 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_irq_link_sgmii()
1093 dev_err(chip->dev, "can't read Serdes BMSR: %d\n", err); in mv88e6390_serdes_irq_link_sgmii()
1097 dsa_port_phylink_mac_change(chip->ds, port, !!(bmsr & BMSR_LSTATUS)); in mv88e6390_serdes_irq_link_sgmii()
1101 int port, u8 lane) in mv88e6393x_serdes_irq_link_10g() argument
1107 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_irq_link_10g()
1110 dev_err(chip->dev, "can't read Serdes STAT1: %d\n", err); in mv88e6393x_serdes_irq_link_10g()
1114 dsa_port_phylink_mac_change(chip->ds, port, !!(status & MDIO_STAT1_LSTATUS)); in mv88e6393x_serdes_irq_link_10g()
1118 int lane, bool enable) in mv88e6390_serdes_irq_enable_sgmii() argument
1126 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_irq_enable_sgmii()
1130 int mv88e6390_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, int lane, in mv88e6390_serdes_irq_enable() argument
1133 u8 cmode = chip->ports[port].cmode; in mv88e6390_serdes_irq_enable()
1139 return mv88e6390_serdes_irq_enable_sgmii(chip, lane, enable); in mv88e6390_serdes_irq_enable()
1146 int lane, u16 *status) in mv88e6390_serdes_irq_status_sgmii() argument
1150 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_irq_status_sgmii()
1157 u8 lane, bool enable) in mv88e6393x_serdes_irq_enable_10g() argument
1164 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_irq_enable_10g()
1169 int lane, bool enable) in mv88e6393x_serdes_irq_enable() argument
1171 u8 cmode = chip->ports[port].cmode; in mv88e6393x_serdes_irq_enable()
1177 return mv88e6390_serdes_irq_enable_sgmii(chip, lane, enable); in mv88e6393x_serdes_irq_enable()
1180 return mv88e6393x_serdes_irq_enable_10g(chip, lane, enable); in mv88e6393x_serdes_irq_enable()
1187 u8 lane, u16 *status) in mv88e6393x_serdes_irq_status_10g() argument
1191 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_irq_status_10g()
1198 int lane) in mv88e6393x_serdes_irq_status() argument
1200 u8 cmode = chip->ports[port].cmode; in mv88e6393x_serdes_irq_status()
1209 err = mv88e6390_serdes_irq_status_sgmii(chip, lane, &status); in mv88e6393x_serdes_irq_status()
1215 mv88e6390_serdes_irq_link_sgmii(chip, port, lane); in mv88e6393x_serdes_irq_status()
1220 err = mv88e6393x_serdes_irq_status_10g(chip, lane, &status); in mv88e6393x_serdes_irq_status()
1225 mv88e6393x_serdes_irq_link_10g(chip, port, lane); in mv88e6393x_serdes_irq_status()
1234 int lane) in mv88e6390_serdes_irq_status() argument
1236 u8 cmode = chip->ports[port].cmode; in mv88e6390_serdes_irq_status()
1245 err = mv88e6390_serdes_irq_status_sgmii(chip, lane, &status); in mv88e6390_serdes_irq_status()
1251 mv88e6390_serdes_irq_link_sgmii(chip, port, lane); in mv88e6390_serdes_irq_status()
1260 return irq_find_mapping(chip->g2_irq.domain, port); in mv88e6390_serdes_irq_mapping()
1278 /* 10Gbase-X */
1286 /* 10Gbase-R */
1302 int lane; in mv88e6390_serdes_get_regs() local
1307 lane = mv88e6xxx_serdes_get_lane(chip, port); in mv88e6390_serdes_get_regs()
1308 if (lane < 0) in mv88e6390_serdes_get_regs()
1312 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6390_serdes_get_regs()
1345 return -EINVAL; in mv88e6352_serdes_set_tx_amplitude()
1357 static int mv88e6393x_serdes_power_lane(struct mv88e6xxx_chip *chip, int lane, in mv88e6393x_serdes_power_lane() argument
1363 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_power_lane()
1375 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_power_lane()
1379 static int mv88e6393x_serdes_erratum_4_6(struct mv88e6xxx_chip *chip, int lane) in mv88e6393x_serdes_erratum_4_6() argument
1387 * Workaround: Set SERDES register 4.F002 bit 5=0 and bit 15=1. in mv88e6393x_serdes_erratum_4_6()
1392 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_erratum_4_6()
1400 err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_erratum_4_6()
1405 err = mv88e6390_serdes_power_sgmii(chip, lane, false); in mv88e6393x_serdes_erratum_4_6()
1409 return mv88e6393x_serdes_power_lane(chip, lane, false); in mv88e6393x_serdes_erratum_4_6()
1427 static int mv88e6393x_serdes_erratum_4_8(struct mv88e6xxx_chip *chip, int lane) in mv88e6393x_serdes_erratum_4_8() argument
1433 * When a SERDES port is operating in 1000BASE-X or SGMII mode link may in mv88e6393x_serdes_erratum_4_8()
1435 * Workaround is to write SERDES register 4.F074.14=1 for only those in mv88e6393x_serdes_erratum_4_8()
1438 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_erratum_4_8()
1445 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_erratum_4_8()
1457 return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_erratum_4_8()
1461 static int mv88e6393x_serdes_erratum_5_2(struct mv88e6xxx_chip *chip, int lane, in mv88e6393x_serdes_erratum_5_2() argument
1488 err = mv88e6390_serdes_read(chip, lane, fixes[i].dev, in mv88e6393x_serdes_erratum_5_2()
1496 err = mv88e6390_serdes_write(chip, lane, fixes[i].dev, in mv88e6393x_serdes_erratum_5_2()
1506 int lane, u8 cmode, bool on) in mv88e6393x_serdes_fix_2500basex_an() argument
1514 /* Inband AN is broken on Amethyst in 2500base-x mode when set by in mv88e6393x_serdes_fix_2500basex_an()
1516 * We can get around this by configuring the PCS mode to 1000base-x in mv88e6393x_serdes_fix_2500basex_an()
1517 * and then writing value 0x58 to register 1e.8000. (This must be done in mv88e6393x_serdes_fix_2500basex_an()
1520 * It seem that when we do this configuration to 2500base-x mode (by in mv88e6393x_serdes_fix_2500basex_an()
1521 * changing PCS mode to 1000base-x and frequency to 3.125 GHz from in mv88e6393x_serdes_fix_2500basex_an()
1522 * 1.25 GHz) and then configure to sgmii or 1000base-x, the device in mv88e6393x_serdes_fix_2500basex_an()
1524 * the 1e.8000 register, leaving SerDes at 3.125 GHz. in mv88e6393x_serdes_fix_2500basex_an()
1525 * To avoid this, change PCS mode back to 2500base-x when disabling in mv88e6393x_serdes_fix_2500basex_an()
1526 * SerDes from 2500base-x mode. in mv88e6393x_serdes_fix_2500basex_an()
1528 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_fix_2500basex_an()
1541 err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, in mv88e6393x_serdes_fix_2500basex_an()
1546 err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_VEND1, 0x8000, 0x58); in mv88e6393x_serdes_fix_2500basex_an()
1553 int mv88e6393x_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane, in mv88e6393x_serdes_power() argument
1556 u8 cmode = chip->ports[port].cmode; in mv88e6393x_serdes_power()
1560 return -EOPNOTSUPP; in mv88e6393x_serdes_power()
1563 err = mv88e6393x_serdes_erratum_4_8(chip, lane); in mv88e6393x_serdes_power()
1567 err = mv88e6393x_serdes_erratum_5_2(chip, lane, cmode); in mv88e6393x_serdes_power()
1571 err = mv88e6393x_serdes_fix_2500basex_an(chip, lane, cmode, in mv88e6393x_serdes_power()
1576 err = mv88e6393x_serdes_power_lane(chip, lane, true); in mv88e6393x_serdes_power()
1585 err = mv88e6390_serdes_power_sgmii(chip, lane, on); in mv88e6393x_serdes_power()
1589 err = mv88e6390_serdes_power_10g(chip, lane, on); in mv88e6393x_serdes_power()
1592 err = -EINVAL; in mv88e6393x_serdes_power()
1600 err = mv88e6393x_serdes_power_lane(chip, lane, false); in mv88e6393x_serdes_power()
1604 err = mv88e6393x_serdes_fix_2500basex_an(chip, lane, cmode, in mv88e6393x_serdes_power()