37 int mv88e6xxx_port_write(struct mv88e6xxx_chip *chip, int port, int reg,  in mv88e6xxx_port_write()  function
65 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_STS, reg);  in mv88e6185_port_set_pause()
107 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_MAC_CTL, reg);  in mv88e6xxx_port_set_rgmii_delay()
163 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_MAC_CTL, reg);  in mv88e6xxx_port_set_link()
282 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_MAC_CTL, reg);  in mv88e6xxx_port_set_speed_duplex()
479 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_MAC_CTL, reg);  in mv88e6393x_port_set_speed_duplex()
579 		err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_STS, reg);  in mv88e6xxx_port_set_cmode()
663 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_MAC_CTL, reg);  in mv88e6393x_port_set_cmode()
758 	return mv88e6xxx_port_write(chip, port, MV88E6097_PORT_JAM_CTL,  in mv88e6097_port_pause_limit()
767 	err = mv88e6xxx_port_write(chip, port, MV88E6390_PORT_FLOW_CTL,  in mv88e6390_port_pause_limit()
773 	return mv88e6xxx_port_write(chip, port, MV88E6390_PORT_FLOW_CTL,  in mv88e6390_port_pause_limit()
818 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);  in mv88e6xxx_port_set_state()
857 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);  in mv88e6xxx_port_set_egress_mode()
883 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);  in mv88e6085_port_set_frame_mode()
915 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);  in mv88e6351_port_set_frame_mode()
933 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);  in mv88e6185_port_set_forward_unknown()
951 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);  in mv88e6352_port_set_ucast_flood()
969 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);  in mv88e6352_port_set_mcast_flood()
989 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL1, val);  in mv88e6xxx_port_set_message_port()
1010 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL1, val);  in mv88e6xxx_port_set_trunk()
1028 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_BASE_VLAN, reg);  in mv88e6xxx_port_set_vlan_map()
1080 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_BASE_VLAN, reg);  in mv88e6xxx_port_set_fid()
1094 		err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL1,  in mv88e6xxx_port_set_fid()
1135 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_DEFAULT_VLAN,  in mv88e6xxx_port_set_pvid()
1169 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);  in mv88e6185_port_set_default_forward()
1185 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);  in mv88e6095_port_set_upstream_port()
1218 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);  in mv88e6xxx_port_set_mirror()
1239 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);  in mv88e6xxx_port_set_lock()
1251 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_ASSOC_VECTOR, reg);  in mv88e6xxx_port_set_lock()
1267 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);  in mv88e6xxx_port_set_8021q_mode()
1295 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, new);  in mv88e6xxx_port_drop_untagged()
1312 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);  in mv88e6xxx_port_set_map_da()
1338 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);  in mv88e6165_port_set_jumbo_size()
1345 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_EGRESS_RATE_CTL1,  in mv88e6095_port_egress_rate_limiting()
1351 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_EGRESS_RATE_CTL1,  in mv88e6097_port_egress_rate_limiting()
1372 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_ASSOC_VECTOR,  in mv88e6xxx_port_set_assoc_vector()
1380 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_ATU_CTL, 0);  in mv88e6xxx_port_disable_learn_limit()
1387 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_PRI_OVERRIDE, 0);  in mv88e6xxx_port_disable_pri_override()
1398 	err = mv88e6xxx_port_write(chip, port, MV88E6393X_PORT_POLICY_MGMT_CTL,  in mv88e6393x_port_policy_read()
1420 	return mv88e6xxx_port_write(chip, port, MV88E6393X_PORT_POLICY_MGMT_CTL,  in mv88e6393x_port_policy_write()
1529 	err = mv88e6xxx_port_write(chip, port, MV88E6393X_PORT_EPC_DATA, etype);  in mv88e6393x_port_set_ether_type()
1537 	return mv88e6xxx_port_write(chip, port, MV88E6393X_PORT_EPC_CMD, val);  in mv88e6393x_port_set_ether_type()
1545 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_ETH_TYPE, etype);  in mv88e6351_port_set_ether_type()
1557 	err = mv88e6xxx_port_write(chip, port,  in mv88e6095_port_tag_remap()
1563 	return mv88e6xxx_port_write(chip, port,  in mv88e6095_port_tag_remap()
1577 	return mv88e6xxx_port_write(chip, port,  in mv88e6xxx_port_ieeepmt_write()
1696 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_POLICY_CTL, reg);  in mv88e6352_port_set_policy()