271 mt7530_read(struct mt7530_priv *priv, u32 reg)  in mt7530_read()  function
330 	val = mt7530_read(priv, MT7530_ATC);  in mt7530_fdb_cmd()
348 		reg[i] = mt7530_read(priv, MT7530_TSRA1 + (i * 4));  in mt7530_fdb_read()
403 	xtal = mt7530_read(priv, MT7530_MHWTRAP) & HWTRAP_XTAL_MASK;  in mt7530_pad_clk_setup()
501 	val = mt7530_read(priv, MT7531_TOP_SIG_SR);  in mt7531_dual_sgmii_supported()
523 	val = mt7530_read(priv, MT7531_CREV);  in mt7531_pll_setup()
524 	top_sig = mt7530_read(priv, MT7531_TOP_SIG_SR);  in mt7531_pll_setup()
525 	hwstrap = mt7530_read(priv, MT7531_HWTRAP);  in mt7531_pll_setup()
533 	val = mt7530_read(priv, MT7531_PLLGP_EN);  in mt7531_pll_setup()
538 	val = mt7530_read(priv, MT7531_PLLGP_EN);  in mt7531_pll_setup()
542 	val = mt7530_read(priv, MT7531_PLLGP_CR0);  in mt7531_pll_setup()
547 	val = mt7530_read(priv, MT7531_PLLGP_EN);  in mt7531_pll_setup()
552 	val = mt7530_read(priv, MT7531_PLLGP_CR0);  in mt7531_pll_setup()
560 		val = mt7530_read(priv, MT7531_PLLGP_CR0);  in mt7531_pll_setup()
566 		val = mt7530_read(priv, MT7531_PLLGP_CR0);  in mt7531_pll_setup()
574 	val = mt7530_read(priv, MT7531_PLLGP_CR0);  in mt7531_pll_setup()
581 	val = mt7530_read(priv, MT7531_PLLGP_CR0);  in mt7531_pll_setup()
592 	val = mt7530_read(priv, MT7531_PLLGP_CR0);  in mt7531_pll_setup()
596 	val = mt7530_read(priv, MT7531_PLLGP_EN);  in mt7531_pll_setup()
874 		data[i] = mt7530_read(priv, reg);  in mt7530_get_ethtool_stats()
876 			hi = mt7530_read(priv, reg + 4);  in mt7530_get_ethtool_stats()
939 	val = mt7530_read(priv, MT7530_MHWTRAP);  in mt7530_setup_port5()
1453 		port_mask = (mt7530_read(priv, MT7530_ATRD) >> PORT_MAP)  in mt7530_port_mdb_add()
1480 		port_mask = (mt7530_read(priv, MT7530_ATRD) >> PORT_MAP)  in mt7530_port_mdb_del()
1511 	val = mt7530_read(priv, MT7530_VTCR);  in mt7530_vlan_cmd()
1586 	val = mt7530_read(priv, MT7530_VAWD1);  in mt7530_hw_vlan_del()
1613 	val = mt7530_read(priv, MT7530_VAWD1);  in mt7530_hw_vlan_update()
1742 	val = mt7530_read(priv, MT753X_MIRROR_REG(priv->id));  in mt753x_port_mirror_add()
1755 	val = mt7530_read(priv, MT7530_PCR_P(port));  in mt753x_port_mirror_add()
1774 	val = mt7530_read(priv, MT7530_PCR_P(port));  in mt753x_port_mirror_del()
1785 		val = mt7530_read(priv, MT753X_MIRROR_REG(priv->id));  in mt753x_port_mirror_del()
1818 	return !!(mt7530_read(priv, MT7530_LED_GPIO_DATA) & bit);  in mt7530_gpio_get()
1839 	return (mt7530_read(priv, MT7530_LED_GPIO_DIR) & bit) ?  in mt7530_gpio_get_direction()
2180 	id = mt7530_read(priv, MT7530_CREV);  in mt7530_setup()
2193 	val = mt7530_read(priv, MT7530_MHWTRAP);  in mt7530_setup()
2324 	id = mt7530_read(priv, MT7531_CREV);  in mt7531_setup()
2528 	val = mt7530_read(priv, MT7531_CLKGEN_CTRL);  in mt7531_rgmii_setup()
2576 	val = mt7530_read(priv, MT7531_SGMII_MODE(port));  in mt7531_pcs_link_up()
2620 	val = mt7530_read(priv, MT7531_PHYA_CTRL_SIGNAL3(port));  in mt7531_sgmii_setup_mode_force()
2678 	val = mt7530_read(priv, MT7531_PCS_CONTROL_1(port));  in mt7531_pcs_an_restart()
2786 	mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port));  in mt753x_phylink_mac_config()
2953 	pmsr = mt7530_read(priv, MT7530_PMSR_P(port));  in mt7530_pcs_get_state()
2988 	status = mt7530_read(priv, MT7531_PCS_CONTROL_1(port));  in mt7531_sgmii_pcs_get_state_an()
2993 		val = mt7530_read(priv, MT7531_PCS_SPEED_ABILITY(port));  in mt7531_sgmii_pcs_get_state_an()
3027 	val = mt7530_read(priv, MT7531_PCS_CONTROL_1(port));  in mt7531_sgmii_pcs_get_state_inband()
3122 	u32 eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));  in mt753x_get_mac_eee()