Lines Matching full:mailboxes

37 #define HECC_MAX_MAILBOXES	32	/* hardware mailboxes - do not change */
41  * TX mailboxes should be restricted to the number of SKB buffers to avoid
42  * maintaining SKB buffers separately. TX mailboxes should be a power of 2
44  * and lower mailboxes for TX.
61  * The remaining mailboxes are used for reception and are delivered
367 	/* Prepare configured mailboxes to receive messages */  in ti_hecc_start()
410 	/* Disable interrupts and disable mailboxes */  in ti_hecc_stop()
447  * The transmit mailboxes start from 0 to HECC_MAX_TX_MBOX. In HECC the
450  * is transmitted first. Only when two mailboxes have the same value in
456  * transmit mailboxes we choose the next priority level (lower) and so on
458  * when we stop transmission until all mailboxes are transmitted and then
463  * is stopped when all the mailboxes are busy or when there is a priority
764 		/* offload RX mailboxes and let NAPI deliver them */  in ti_hecc_interrupt()