Lines Matching refs:reg_base

260 	void __iomem *reg_base;  member
273 void __iomem *reg_base; member
333 return readl_poll_timeout(pcie->reg_base + KVASER_PCIEFD_SPI_STATUS_REG, in kvaser_pciefd_spi_wait_loop()
342 iowrite32(BIT(0), pcie->reg_base + KVASER_PCIEFD_SPI_SSEL_REG); in kvaser_pciefd_spi_cmd()
343 iowrite32(BIT(10), pcie->reg_base + KVASER_PCIEFD_SPI_CTRL_REG); in kvaser_pciefd_spi_cmd()
344 ioread32(pcie->reg_base + KVASER_PCIEFD_SPI_RX_REG); in kvaser_pciefd_spi_cmd()
351 iowrite32(*tx++, pcie->reg_base + KVASER_PCIEFD_SPI_TX_REG); in kvaser_pciefd_spi_cmd()
356 ioread32(pcie->reg_base + KVASER_PCIEFD_SPI_RX_REG); in kvaser_pciefd_spi_cmd()
364 iowrite32(0, pcie->reg_base + KVASER_PCIEFD_SPI_TX_REG); in kvaser_pciefd_spi_cmd()
369 *rx++ = ioread32(pcie->reg_base + KVASER_PCIEFD_SPI_RX_REG); in kvaser_pciefd_spi_cmd()
375 iowrite32(0, pcie->reg_base + KVASER_PCIEFD_SPI_CTRL_REG); in kvaser_pciefd_spi_cmd()
492 iowrite32(cmd, can->reg_base + KVASER_PCIEFD_KCAN_CMD_REG); in kvaser_pciefd_request_status()
501 mode = ioread32(can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG); in kvaser_pciefd_enable_err_gen()
504 iowrite32(mode, can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG); in kvaser_pciefd_enable_err_gen()
515 mode = ioread32(can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG); in kvaser_pciefd_disable_err_gen()
517 iowrite32(mode, can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG); in kvaser_pciefd_disable_err_gen()
531 iowrite32(msk, can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG); in kvaser_pciefd_set_tx_irq()
543 mode = ioread32(can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG); in kvaser_pciefd_setup_controller()
563 iowrite32(mode, can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG); in kvaser_pciefd_setup_controller()
574 iowrite32(-1, can->reg_base + KVASER_PCIEFD_KCAN_IRQ_REG); in kvaser_pciefd_start_controller_flush()
576 can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG); in kvaser_pciefd_start_controller_flush()
578 status = ioread32(can->reg_base + KVASER_PCIEFD_KCAN_STAT_REG); in kvaser_pciefd_start_controller_flush()
585 iowrite32(cmd, can->reg_base + KVASER_PCIEFD_KCAN_CMD_REG); in kvaser_pciefd_start_controller_flush()
590 mode = ioread32(can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG); in kvaser_pciefd_start_controller_flush()
592 iowrite32(mode, can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG); in kvaser_pciefd_start_controller_flush()
615 iowrite32(0, can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG); in kvaser_pciefd_bus_on()
616 iowrite32(-1, can->reg_base + KVASER_PCIEFD_KCAN_IRQ_REG); in kvaser_pciefd_bus_on()
619 can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG); in kvaser_pciefd_bus_on()
621 mode = ioread32(can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG); in kvaser_pciefd_bus_on()
623 iowrite32(mode, can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG); in kvaser_pciefd_bus_on()
632 iowrite32(0, can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG); in kvaser_pciefd_bus_on()
633 iowrite32(-1, can->reg_base + KVASER_PCIEFD_KCAN_IRQ_REG); in kvaser_pciefd_bus_on()
654 pwm_ctrl = ioread32(can->reg_base + KVASER_PCIEFD_KCAN_PWM_REG); in kvaser_pciefd_pwm_stop()
659 iowrite32(pwm_ctrl, can->reg_base + KVASER_PCIEFD_KCAN_PWM_REG); in kvaser_pciefd_pwm_stop()
677 iowrite32(pwm_ctrl, can->reg_base + KVASER_PCIEFD_KCAN_PWM_REG); in kvaser_pciefd_pwm_start()
683 iowrite32(pwm_ctrl, can->reg_base + KVASER_PCIEFD_KCAN_PWM_REG); in kvaser_pciefd_pwm_start()
719 iowrite32(0, can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG); in kvaser_pciefd_stop()
790 can->reg_base + KVASER_PCIEFD_KCAN_FIFO_REG); in kvaser_pciefd_start_xmit()
792 can->reg_base + KVASER_PCIEFD_KCAN_FIFO_REG); in kvaser_pciefd_start_xmit()
798 iowrite32_rep(can->reg_base + in kvaser_pciefd_start_xmit()
802 __raw_writel(data_last, can->reg_base + in kvaser_pciefd_start_xmit()
806 __raw_writel(0, can->reg_base + in kvaser_pciefd_start_xmit()
810 count = ioread32(can->reg_base + KVASER_PCIEFD_KCAN_TX_NPACKETS_REG); in kvaser_pciefd_start_xmit()
843 mode = ioread32(can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG); in kvaser_pciefd_set_bittiming()
847 can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG); in kvaser_pciefd_set_bittiming()
850 ret = readl_poll_timeout(can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG, in kvaser_pciefd_set_bittiming()
860 iowrite32(btrn, can->reg_base + KVASER_PCIEFD_KCAN_BTRD_REG); in kvaser_pciefd_set_bittiming()
862 iowrite32(btrn, can->reg_base + KVASER_PCIEFD_KCAN_BTRN_REG); in kvaser_pciefd_set_bittiming()
865 iowrite32(mode, can->reg_base + KVASER_PCIEFD_KCAN_MODE_REG); in kvaser_pciefd_set_bittiming()
946 can->reg_base = pcie->reg_base + KVASER_PCIEFD_KCAN0_BASE + in kvaser_pciefd_setup_can_ctrls()
961 iowrite32(0, can->reg_base + KVASER_PCIEFD_KCAN_BUS_LOAD_REG); in kvaser_pciefd_setup_can_ctrls()
963 tx_npackets = ioread32(can->reg_base + in kvaser_pciefd_setup_can_ctrls()
993 status = ioread32(can->reg_base + KVASER_PCIEFD_KCAN_STAT_REG); in kvaser_pciefd_setup_can_ctrls()
1009 iowrite32(-1, can->reg_base + KVASER_PCIEFD_KCAN_IRQ_REG); in kvaser_pciefd_setup_can_ctrls()
1012 can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG); in kvaser_pciefd_setup_can_ctrls()
1053 iowrite32(word1, pcie->reg_base + offset); in kvaser_pciefd_write_dma_map()
1054 iowrite32(word2, pcie->reg_base + offset + 4); in kvaser_pciefd_write_dma_map()
1064 iowrite32(0, pcie->reg_base + KVASER_PCIEFD_SRB_CTRL_REG); in kvaser_pciefd_setup_dma()
1086 pcie->reg_base + KVASER_PCIEFD_SRB_CMD_REG); in kvaser_pciefd_setup_dma()
1088 srb_status = ioread32(pcie->reg_base + KVASER_PCIEFD_SRB_STAT_REG); in kvaser_pciefd_setup_dma()
1096 pcie->reg_base + KVASER_PCIEFD_SRB_CTRL_REG); in kvaser_pciefd_setup_dma()
1111 sysid = ioread32(pcie->reg_base + KVASER_PCIEFD_SYSID_VERSION_REG); in kvaser_pciefd_setup_board()
1124 build = ioread32(pcie->reg_base + KVASER_PCIEFD_SYSID_BUILD_REG); in kvaser_pciefd_setup_board()
1130 srb_status = ioread32(pcie->reg_base + KVASER_PCIEFD_SRB_STAT_REG); in kvaser_pciefd_setup_board()
1137 pcie->bus_freq = ioread32(pcie->reg_base + in kvaser_pciefd_setup_board()
1139 pcie->freq = ioread32(pcie->reg_base + KVASER_PCIEFD_SYSID_CANFREQ_REG); in kvaser_pciefd_setup_board()
1145 iowrite32(0, pcie->reg_base + KVASER_PCIEFD_LOOP_REG); in kvaser_pciefd_setup_board()
1412 status = ioread32(can->reg_base + KVASER_PCIEFD_KCAN_STAT_REG); in kvaser_pciefd_handle_status_packet()
1424 can->reg_base + KVASER_PCIEFD_KCAN_IRQ_REG); in kvaser_pciefd_handle_status_packet()
1427 iowrite32(cmd, can->reg_base + KVASER_PCIEFD_KCAN_CMD_REG); in kvaser_pciefd_handle_status_packet()
1430 can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG); in kvaser_pciefd_handle_status_packet()
1436 u8 count = ioread32(can->reg_base + in kvaser_pciefd_handle_status_packet()
1441 can->reg_base + KVASER_PCIEFD_KCAN_CTRL_REG); in kvaser_pciefd_handle_status_packet()
1474 u8 count = ioread32(can->reg_base + in kvaser_pciefd_handle_eack_packet()
1479 can->reg_base + KVASER_PCIEFD_KCAN_CTRL_REG); in kvaser_pciefd_handle_eack_packet()
1547 u8 count = ioread32(can->reg_base + in kvaser_pciefd_handle_ack_packet()
1685 irq = ioread32(pcie->reg_base + KVASER_PCIEFD_SRB_IRQ_REG); in kvaser_pciefd_receive_irq()
1690 pcie->reg_base + KVASER_PCIEFD_SRB_CMD_REG); in kvaser_pciefd_receive_irq()
1697 pcie->reg_base + KVASER_PCIEFD_SRB_CMD_REG); in kvaser_pciefd_receive_irq()
1706 iowrite32(irq, pcie->reg_base + KVASER_PCIEFD_SRB_IRQ_REG); in kvaser_pciefd_receive_irq()
1712 u32 irq = ioread32(can->reg_base + KVASER_PCIEFD_KCAN_IRQ_REG); in kvaser_pciefd_transmit_irq()
1718 u8 count = ioread32(can->reg_base + in kvaser_pciefd_transmit_irq()
1723 can->reg_base + KVASER_PCIEFD_KCAN_CTRL_REG); in kvaser_pciefd_transmit_irq()
1736 iowrite32(irq, can->reg_base + KVASER_PCIEFD_KCAN_IRQ_REG); in kvaser_pciefd_transmit_irq()
1746 board_irq = ioread32(pcie->reg_base + KVASER_PCIEFD_IRQ_REG); in kvaser_pciefd_irq_handler()
1766 iowrite32(board_irq, pcie->reg_base + KVASER_PCIEFD_IRQ_REG); in kvaser_pciefd_irq_handler()
1779 can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG); in kvaser_pciefd_teardown_can_ctrls()
1807 pcie->reg_base = pci_iomap(pdev, 0, 0); in kvaser_pciefd_probe()
1808 if (!pcie->reg_base) { in kvaser_pciefd_probe()
1828 pcie->reg_base + KVASER_PCIEFD_SRB_IRQ_REG); in kvaser_pciefd_probe()
1833 pcie->reg_base + KVASER_PCIEFD_SRB_IEN_REG); in kvaser_pciefd_probe()
1837 pcie->reg_base + KVASER_PCIEFD_IRQ_REG); in kvaser_pciefd_probe()
1839 pcie->reg_base + KVASER_PCIEFD_IEN_REG); in kvaser_pciefd_probe()
1843 pcie->reg_base + KVASER_PCIEFD_SRB_CMD_REG); in kvaser_pciefd_probe()
1845 pcie->reg_base + KVASER_PCIEFD_SRB_CMD_REG); in kvaser_pciefd_probe()
1863 iowrite32(0, pcie->reg_base + KVASER_PCIEFD_SRB_CTRL_REG); in kvaser_pciefd_probe()
1867 pci_iounmap(pdev, pcie->reg_base); in kvaser_pciefd_probe()
1887 can->reg_base + KVASER_PCIEFD_KCAN_IEN_REG); in kvaser_pciefd_remove_all_ctrls()
1903 iowrite32(0, pcie->reg_base + KVASER_PCIEFD_SRB_CTRL_REG); in kvaser_pciefd_remove()
1905 pcie->reg_base + KVASER_PCIEFD_IRQ_REG); in kvaser_pciefd_remove()
1906 iowrite32(0, pcie->reg_base + KVASER_PCIEFD_IEN_REG); in kvaser_pciefd_remove()
1911 pci_iounmap(pdev, pcie->reg_base); in kvaser_pciefd_remove()