Lines Matching +full:spare +full:- +full:regs
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
5 * Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
10 #include <linux/dma-mapping.h>
30 * First byte of oob(spare).
31 * nand_chip->oob_poi data layout:
63 #define DMA_INC_NUM (9) /* 1 - 16 */
173 void __iomem *regs; member
198 return (u8 *)p + i * chip->ecc.size; in rk_nfc_buf_to_data_ptr()
205 poi = chip->oob_poi + i * NFC_SYS_DATA_SIZE; in rk_nfc_buf_to_oob_ptr()
215 poi = chip->oob_poi + rknand->metadata_size + chip->ecc.bytes * i; in rk_nfc_buf_to_oob_ecc_ptr()
222 return chip->ecc.size + chip->ecc.bytes + NFC_SYS_DATA_SIZE; in rk_nfc_data_len()
229 return nfc->page_buf + i * rk_nfc_data_len(chip); in rk_nfc_data_ptr()
236 return nfc->page_buf + i * rk_nfc_data_len(chip) + chip->ecc.size; in rk_nfc_oob_ptr()
245 if (strength == nfc->cfg->ecc_strengths[i]) { in rk_nfc_hw_ecc_setup()
246 reg = nfc->cfg->ecc_cfgs[i]; in rk_nfc_hw_ecc_setup()
252 return -EINVAL; in rk_nfc_hw_ecc_setup()
254 writel(reg, nfc->regs + nfc->cfg->bchctl_off); in rk_nfc_hw_ecc_setup()
257 nfc->cur_ecc = strength; in rk_nfc_hw_ecc_setup()
266 struct nand_ecc_ctrl *ecc = &chip->ecc; in rk_nfc_select_chip()
270 nfc->selected_bank = -1; in rk_nfc_select_chip()
272 val = readl_relaxed(nfc->regs + NFC_FMCTL); in rk_nfc_select_chip()
274 writel(val, nfc->regs + NFC_FMCTL); in rk_nfc_select_chip()
278 nfc->selected_bank = rknand->sels[cs]; in rk_nfc_select_chip()
279 nfc->band_offset = NFC_BANK + nfc->selected_bank * NFC_BANK_STEP; in rk_nfc_select_chip()
281 val = readl_relaxed(nfc->regs + NFC_FMCTL); in rk_nfc_select_chip()
283 val |= FMCTL_CE_SEL(nfc->selected_bank); in rk_nfc_select_chip()
285 writel(val, nfc->regs + NFC_FMCTL); in rk_nfc_select_chip()
291 if (nfc->cur_timing != rknand->timing) { in rk_nfc_select_chip()
292 writel(rknand->timing, nfc->regs + NFC_FMWAIT); in rk_nfc_select_chip()
293 nfc->cur_timing = rknand->timing; in rk_nfc_select_chip()
300 if (nfc->cur_ecc != ecc->strength) in rk_nfc_select_chip()
301 rk_nfc_hw_ecc_setup(chip, ecc->strength); in rk_nfc_select_chip()
309 rc = readl_relaxed_poll_timeout(nfc->regs + NFC_FMCTL, val, in rk_nfc_wait_ioready()
320 buf[i] = readb_relaxed(nfc->regs + nfc->band_offset + in rk_nfc_read_buf()
329 writeb(buf[i], nfc->regs + nfc->band_offset + BANK_DATA); in rk_nfc_write_buf()
337 int reg_offset = nfc->band_offset; in rk_nfc_cmd()
343 for (i = 0; i < subop->ninstrs; i++) { in rk_nfc_cmd()
344 const struct nand_op_instr *instr = &subop->instrs[i]; in rk_nfc_cmd()
346 switch (instr->type) { in rk_nfc_cmd()
348 writeb(instr->ctx.cmd.opcode, in rk_nfc_cmd()
349 nfc->regs + reg_offset + BANK_CMD); in rk_nfc_cmd()
357 writeb(instr->ctx.addr.addrs[j + start], in rk_nfc_cmd()
358 nfc->regs + reg_offset + BANK_ADDR); in rk_nfc_cmd()
366 if (instr->type == NAND_OP_DATA_OUT_INSTR) { in rk_nfc_cmd()
367 outbuf = instr->ctx.data.buf.out + start; in rk_nfc_cmd()
370 inbuf = instr->ctx.data.buf.in + start; in rk_nfc_cmd()
377 ret = -ETIMEDOUT; in rk_nfc_cmd()
378 dev_err(nfc->dev, "IO not ready\n"); in rk_nfc_cmd()
409 rk_nfc_select_chip(chip, op->cs); in rk_nfc_exec_op()
429 return -EOPNOTSUPP; in rk_nfc_setup_interface()
431 if (IS_ERR(nfc->nfc_clk)) in rk_nfc_setup_interface()
432 rate = clk_get_rate(nfc->ahb_clk); in rk_nfc_setup_interface()
434 rate = clk_get_rate(nfc->nfc_clk); in rk_nfc_setup_interface()
442 trwpw = max(timings->tWC_min, timings->tRC_min) / 1000; in rk_nfc_setup_interface()
445 temp = timings->tREA_max / 1000; in rk_nfc_setup_interface()
453 * ------------------------------------- in rk_nfc_setup_interface()
464 rknand->timing = ACCTIMING(tc2rw, trwpw, trw2c); in rk_nfc_setup_interface()
480 if (nfc->cfg->type == NFC_V6 || nfc->cfg->type == NFC_V8) { in rk_nfc_xfer_start()
481 bch_reg = readl_relaxed(nfc->regs + nfc->cfg->bchctl_off); in rk_nfc_xfer_start()
483 (nfc->selected_bank << BCHCTL_BANK); in rk_nfc_xfer_start()
484 writel(bch_reg, nfc->regs + nfc->cfg->bchctl_off); in rk_nfc_xfer_start()
487 writel(dma_reg, nfc->regs + nfc->cfg->dma_cfg_off); in rk_nfc_xfer_start()
488 writel((u32)dma_data, nfc->regs + nfc->cfg->dma_data_buf_off); in rk_nfc_xfer_start()
489 writel((u32)dma_oob, nfc->regs + nfc->cfg->dma_oob_buf_off); in rk_nfc_xfer_start()
490 writel(fl_reg, nfc->regs + nfc->cfg->flctl_off); in rk_nfc_xfer_start()
492 writel(fl_reg, nfc->regs + nfc->cfg->flctl_off); in rk_nfc_xfer_start()
500 ptr = nfc->regs + nfc->cfg->flctl_off; in rk_nfc_wait_for_xfer_done()
513 struct nand_ecc_ctrl *ecc = &chip->ecc; in rk_nfc_write_page_raw()
516 pages_per_blk = mtd->erasesize / mtd->writesize; in rk_nfc_write_page_raw()
517 if ((chip->options & NAND_IS_BOOT_MEDIUM) && in rk_nfc_write_page_raw()
518 (page < (pages_per_blk * rknand->boot_blks)) && in rk_nfc_write_page_raw()
519 rknand->boot_ecc != ecc->strength) { in rk_nfc_write_page_raw()
524 return -EIO; in rk_nfc_write_page_raw()
528 memset(nfc->page_buf, 0xff, mtd->writesize + mtd->oobsize); in rk_nfc_write_page_raw()
530 for (i = 0; i < ecc->steps; i++) { in rk_nfc_write_page_raw()
535 ecc->size); in rk_nfc_write_page_raw()
544 * bad = chip->oob_poi[chip->badblockpos]; in rk_nfc_write_page_raw()
546 * chip->badblockpos == 0 for a large page NAND Flash, in rk_nfc_write_page_raw()
547 * so chip->oob_poi[0] is the bad block mask (BBM). in rk_nfc_write_page_raw()
560 * The chip->oob_poi data layout: in rk_nfc_write_page_raw()
567 * oob_region->offset = NFC_SYS_DATA_SIZE + 2; in rk_nfc_write_page_raw()
571 rk_nfc_buf_to_oob_ptr(chip, ecc->steps - 1), in rk_nfc_write_page_raw()
575 rk_nfc_buf_to_oob_ptr(chip, i - 1), in rk_nfc_write_page_raw()
580 ecc->bytes); in rk_nfc_write_page_raw()
584 rk_nfc_write_buf(nfc, buf, mtd->writesize + mtd->oobsize); in rk_nfc_write_page_raw()
594 struct nand_ecc_ctrl *ecc = &chip->ecc; in rk_nfc_write_page_hwecc()
595 int oob_step = (ecc->bytes > 60) ? NFC_MAX_OOB_PER_STEP : in rk_nfc_write_page_hwecc()
597 int pages_per_blk = mtd->erasesize / mtd->writesize; in rk_nfc_write_page_hwecc()
606 memcpy(nfc->page_buf, buf, mtd->writesize); in rk_nfc_write_page_hwecc()
608 memset(nfc->page_buf, 0xFF, mtd->writesize); in rk_nfc_write_page_hwecc()
629 if ((page < (pages_per_blk * rknand->boot_blks)) && in rk_nfc_write_page_hwecc()
630 (chip->options & NAND_IS_BOOT_MEDIUM)) { in rk_nfc_write_page_hwecc()
632 if (rknand->boot_ecc != ecc->strength) in rk_nfc_write_page_hwecc()
633 rk_nfc_hw_ecc_setup(chip, rknand->boot_ecc); in rk_nfc_write_page_hwecc()
636 for (i = 0; i < ecc->steps; i++) { in rk_nfc_write_page_hwecc()
640 oob = chip->oob_poi + (i - 1) * NFC_SYS_DATA_SIZE; in rk_nfc_write_page_hwecc()
646 reg = (page & (pages_per_blk - 1)) * 4; in rk_nfc_write_page_hwecc()
648 if (nfc->cfg->type == NFC_V9) in rk_nfc_write_page_hwecc()
649 nfc->oob_buf[i] = reg; in rk_nfc_write_page_hwecc()
651 nfc->oob_buf[i * (oob_step / 4)] = reg; in rk_nfc_write_page_hwecc()
654 dma_data = dma_map_single(nfc->dev, (void *)nfc->page_buf, in rk_nfc_write_page_hwecc()
655 mtd->writesize, DMA_TO_DEVICE); in rk_nfc_write_page_hwecc()
656 dma_oob = dma_map_single(nfc->dev, nfc->oob_buf, in rk_nfc_write_page_hwecc()
657 ecc->steps * oob_step, in rk_nfc_write_page_hwecc()
660 reinit_completion(&nfc->done); in rk_nfc_write_page_hwecc()
661 writel(INT_DMA, nfc->regs + nfc->cfg->int_en_off); in rk_nfc_write_page_hwecc()
663 rk_nfc_xfer_start(nfc, NFC_WRITE, ecc->steps, dma_data, in rk_nfc_write_page_hwecc()
665 ret = wait_for_completion_timeout(&nfc->done, in rk_nfc_write_page_hwecc()
668 dev_warn(nfc->dev, "write: wait dma done timeout.\n"); in rk_nfc_write_page_hwecc()
676 dma_unmap_single(nfc->dev, dma_data, mtd->writesize, in rk_nfc_write_page_hwecc()
678 dma_unmap_single(nfc->dev, dma_oob, ecc->steps * oob_step, in rk_nfc_write_page_hwecc()
681 if (boot_rom_mode && rknand->boot_ecc != ecc->strength) in rk_nfc_write_page_hwecc()
682 rk_nfc_hw_ecc_setup(chip, ecc->strength); in rk_nfc_write_page_hwecc()
685 dev_err(nfc->dev, "write: wait transfer done timeout.\n"); in rk_nfc_write_page_hwecc()
686 return -ETIMEDOUT; in rk_nfc_write_page_hwecc()
703 struct nand_ecc_ctrl *ecc = &chip->ecc; in rk_nfc_read_page_raw()
706 pages_per_blk = mtd->erasesize / mtd->writesize; in rk_nfc_read_page_raw()
707 if ((chip->options & NAND_IS_BOOT_MEDIUM) && in rk_nfc_read_page_raw()
708 (page < (pages_per_blk * rknand->boot_blks)) && in rk_nfc_read_page_raw()
709 rknand->boot_ecc != ecc->strength) { in rk_nfc_read_page_raw()
714 return -EIO; in rk_nfc_read_page_raw()
718 rk_nfc_read_buf(nfc, nfc->page_buf, mtd->writesize + mtd->oobsize); in rk_nfc_read_page_raw()
719 for (i = 0; i < ecc->steps; i++) { in rk_nfc_read_page_raw()
728 memcpy(rk_nfc_buf_to_oob_ptr(chip, ecc->steps - 1), in rk_nfc_read_page_raw()
732 memcpy(rk_nfc_buf_to_oob_ptr(chip, i - 1), in rk_nfc_read_page_raw()
739 ecc->bytes); in rk_nfc_read_page_raw()
745 ecc->size); in rk_nfc_read_page_raw()
757 struct nand_ecc_ctrl *ecc = &chip->ecc; in rk_nfc_read_page_hwecc()
758 int oob_step = (ecc->bytes > 60) ? NFC_MAX_OOB_PER_STEP : in rk_nfc_read_page_hwecc()
760 int pages_per_blk = mtd->erasesize / mtd->writesize; in rk_nfc_read_page_hwecc()
769 dma_data = dma_map_single(nfc->dev, nfc->page_buf, in rk_nfc_read_page_hwecc()
770 mtd->writesize, in rk_nfc_read_page_hwecc()
772 dma_oob = dma_map_single(nfc->dev, nfc->oob_buf, in rk_nfc_read_page_hwecc()
773 ecc->steps * oob_step, in rk_nfc_read_page_hwecc()
781 if ((page < (pages_per_blk * rknand->boot_blks)) && in rk_nfc_read_page_hwecc()
782 (chip->options & NAND_IS_BOOT_MEDIUM)) { in rk_nfc_read_page_hwecc()
784 if (rknand->boot_ecc != ecc->strength) in rk_nfc_read_page_hwecc()
785 rk_nfc_hw_ecc_setup(chip, rknand->boot_ecc); in rk_nfc_read_page_hwecc()
788 reinit_completion(&nfc->done); in rk_nfc_read_page_hwecc()
789 writel(INT_DMA, nfc->regs + nfc->cfg->int_en_off); in rk_nfc_read_page_hwecc()
790 rk_nfc_xfer_start(nfc, NFC_READ, ecc->steps, dma_data, in rk_nfc_read_page_hwecc()
792 ret = wait_for_completion_timeout(&nfc->done, in rk_nfc_read_page_hwecc()
795 dev_warn(nfc->dev, "read: wait dma done timeout.\n"); in rk_nfc_read_page_hwecc()
803 dma_unmap_single(nfc->dev, dma_data, mtd->writesize, in rk_nfc_read_page_hwecc()
805 dma_unmap_single(nfc->dev, dma_oob, ecc->steps * oob_step, in rk_nfc_read_page_hwecc()
809 ret = -ETIMEDOUT; in rk_nfc_read_page_hwecc()
810 dev_err(nfc->dev, "read: wait transfer done timeout.\n"); in rk_nfc_read_page_hwecc()
814 for (i = 1; i < ecc->steps; i++) { in rk_nfc_read_page_hwecc()
815 oob = chip->oob_poi + (i - 1) * NFC_SYS_DATA_SIZE; in rk_nfc_read_page_hwecc()
816 if (nfc->cfg->type == NFC_V9) in rk_nfc_read_page_hwecc()
817 tmp = nfc->oob_buf[i]; in rk_nfc_read_page_hwecc()
819 tmp = nfc->oob_buf[i * (oob_step / 4)]; in rk_nfc_read_page_hwecc()
826 for (i = 0; i < (ecc->steps / 2); i++) { in rk_nfc_read_page_hwecc()
827 bch_st = readl_relaxed(nfc->regs + in rk_nfc_read_page_hwecc()
828 nfc->cfg->bch_st_off + i * 4); in rk_nfc_read_page_hwecc()
829 if (bch_st & BIT(nfc->cfg->ecc0.err_flag_bit) || in rk_nfc_read_page_hwecc()
830 bch_st & BIT(nfc->cfg->ecc1.err_flag_bit)) { in rk_nfc_read_page_hwecc()
831 mtd->ecc_stats.failed++; in rk_nfc_read_page_hwecc()
834 cnt = ECC_ERR_CNT(bch_st, nfc->cfg->ecc0); in rk_nfc_read_page_hwecc()
835 mtd->ecc_stats.corrected += cnt; in rk_nfc_read_page_hwecc()
838 cnt = ECC_ERR_CNT(bch_st, nfc->cfg->ecc1); in rk_nfc_read_page_hwecc()
839 mtd->ecc_stats.corrected += cnt; in rk_nfc_read_page_hwecc()
845 memcpy(buf, nfc->page_buf, mtd->writesize); in rk_nfc_read_page_hwecc()
848 if (boot_rom_mode && rknand->boot_ecc != ecc->strength) in rk_nfc_read_page_hwecc()
849 rk_nfc_hw_ecc_setup(chip, ecc->strength); in rk_nfc_read_page_hwecc()
855 dev_err(nfc->dev, "read page: %x ecc error!\n", page); in rk_nfc_read_page_hwecc()
870 writel(FMCTL_WP, nfc->regs + NFC_FMCTL); in rk_nfc_hw_init()
872 writel(0x1081, nfc->regs + NFC_FMWAIT); in rk_nfc_hw_init()
873 nfc->cur_timing = 0x1081; in rk_nfc_hw_init()
875 writel(0, nfc->regs + nfc->cfg->randmz_off); in rk_nfc_hw_init()
876 writel(0, nfc->regs + nfc->cfg->dma_cfg_off); in rk_nfc_hw_init()
877 writel(FLCTL_RST, nfc->regs + nfc->cfg->flctl_off); in rk_nfc_hw_init()
885 sta = readl_relaxed(nfc->regs + nfc->cfg->int_st_off); in rk_nfc_irq()
886 ien = readl_relaxed(nfc->regs + nfc->cfg->int_en_off); in rk_nfc_irq()
891 writel(sta, nfc->regs + nfc->cfg->int_clr_off); in rk_nfc_irq()
892 writel(~sta & ien, nfc->regs + nfc->cfg->int_en_off); in rk_nfc_irq()
894 complete(&nfc->done); in rk_nfc_irq()
903 if (!IS_ERR(nfc->nfc_clk)) { in rk_nfc_enable_clks()
904 ret = clk_prepare_enable(nfc->nfc_clk); in rk_nfc_enable_clks()
911 ret = clk_prepare_enable(nfc->ahb_clk); in rk_nfc_enable_clks()
914 clk_disable_unprepare(nfc->nfc_clk); in rk_nfc_enable_clks()
923 clk_disable_unprepare(nfc->nfc_clk); in rk_nfc_disable_clks()
924 clk_disable_unprepare(nfc->ahb_clk); in rk_nfc_disable_clks()
934 return -ERANGE; in rk_nfc_ooblayout_free()
940 oob_region->length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2; in rk_nfc_ooblayout_free()
941 oob_region->offset = NFC_SYS_DATA_SIZE + 2; in rk_nfc_ooblayout_free()
953 return -ERANGE; in rk_nfc_ooblayout_ecc()
955 oob_region->length = mtd->oobsize - rknand->metadata_size; in rk_nfc_ooblayout_ecc()
956 oob_region->offset = rknand->metadata_size; in rk_nfc_ooblayout_ecc()
970 struct nand_ecc_ctrl *ecc = &chip->ecc; in rk_nfc_ecc_init()
971 const u8 *strengths = nfc->cfg->ecc_strengths; in rk_nfc_ecc_init()
975 nfc_max_strength = nfc->cfg->ecc_strengths[0]; in rk_nfc_ecc_init()
977 if (!ecc->size || !ecc->strength || in rk_nfc_ecc_init()
978 ecc->strength > nfc_max_strength) { in rk_nfc_ecc_init()
979 chip->ecc.size = 1024; in rk_nfc_ecc_init()
980 ecc->steps = mtd->writesize / ecc->size; in rk_nfc_ecc_init()
986 max_strength = ((mtd->oobsize / ecc->steps) - 4) * 8 / in rk_nfc_ecc_init()
997 dev_err(nfc->dev, "unsupported ECC strength\n"); in rk_nfc_ecc_init()
998 return -EOPNOTSUPP; in rk_nfc_ecc_init()
1001 ecc->strength = strengths[i]; in rk_nfc_ecc_init()
1003 ecc->steps = mtd->writesize / ecc->size; in rk_nfc_ecc_init()
1004 ecc->bytes = DIV_ROUND_UP(ecc->strength * fls(8 * chip->ecc.size), 8); in rk_nfc_ecc_init()
1012 struct device *dev = mtd->dev.parent; in rk_nfc_attach_chip()
1015 struct nand_ecc_ctrl *ecc = &chip->ecc; in rk_nfc_attach_chip()
1020 if (chip->options & NAND_BUSWIDTH_16) { in rk_nfc_attach_chip()
1022 return -EINVAL; in rk_nfc_attach_chip()
1025 if (ecc->engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST) in rk_nfc_attach_chip()
1032 rknand->metadata_size = NFC_SYS_DATA_SIZE * ecc->steps; in rk_nfc_attach_chip()
1034 if (rknand->metadata_size < NFC_SYS_DATA_SIZE + 2) { in rk_nfc_attach_chip()
1038 return -EIO; in rk_nfc_attach_chip()
1042 new_page_len = mtd->writesize + mtd->oobsize; in rk_nfc_attach_chip()
1043 if (nfc->page_buf && new_page_len > nfc->page_buf_size) { in rk_nfc_attach_chip()
1044 buf = krealloc(nfc->page_buf, new_page_len, in rk_nfc_attach_chip()
1047 return -ENOMEM; in rk_nfc_attach_chip()
1048 nfc->page_buf = buf; in rk_nfc_attach_chip()
1049 nfc->page_buf_size = new_page_len; in rk_nfc_attach_chip()
1052 new_oob_len = ecc->steps * NFC_MAX_OOB_PER_STEP; in rk_nfc_attach_chip()
1053 if (nfc->oob_buf && new_oob_len > nfc->oob_buf_size) { in rk_nfc_attach_chip()
1054 buf = krealloc(nfc->oob_buf, new_oob_len, in rk_nfc_attach_chip()
1057 kfree(nfc->page_buf); in rk_nfc_attach_chip()
1058 nfc->page_buf = NULL; in rk_nfc_attach_chip()
1059 return -ENOMEM; in rk_nfc_attach_chip()
1061 nfc->oob_buf = buf; in rk_nfc_attach_chip()
1062 nfc->oob_buf_size = new_oob_len; in rk_nfc_attach_chip()
1065 if (!nfc->page_buf) { in rk_nfc_attach_chip()
1066 nfc->page_buf = kzalloc(new_page_len, GFP_KERNEL | GFP_DMA); in rk_nfc_attach_chip()
1067 if (!nfc->page_buf) in rk_nfc_attach_chip()
1068 return -ENOMEM; in rk_nfc_attach_chip()
1069 nfc->page_buf_size = new_page_len; in rk_nfc_attach_chip()
1072 if (!nfc->oob_buf) { in rk_nfc_attach_chip()
1073 nfc->oob_buf = kzalloc(new_oob_len, GFP_KERNEL | GFP_DMA); in rk_nfc_attach_chip()
1074 if (!nfc->oob_buf) { in rk_nfc_attach_chip()
1075 kfree(nfc->page_buf); in rk_nfc_attach_chip()
1076 nfc->page_buf = NULL; in rk_nfc_attach_chip()
1077 return -ENOMEM; in rk_nfc_attach_chip()
1079 nfc->oob_buf_size = new_oob_len; in rk_nfc_attach_chip()
1082 chip->ecc.write_page_raw = rk_nfc_write_page_raw; in rk_nfc_attach_chip()
1083 chip->ecc.write_page = rk_nfc_write_page_hwecc; in rk_nfc_attach_chip()
1084 chip->ecc.write_oob = rk_nfc_write_oob; in rk_nfc_attach_chip()
1086 chip->ecc.read_page_raw = rk_nfc_read_page_raw; in rk_nfc_attach_chip()
1087 chip->ecc.read_page = rk_nfc_read_page_hwecc; in rk_nfc_attach_chip()
1088 chip->ecc.read_oob = rk_nfc_read_oob; in rk_nfc_attach_chip()
1111 return -ENODEV; in rk_nfc_nand_chip_init()
1115 return -EINVAL; in rk_nfc_nand_chip_init()
1121 return -ENOMEM; in rk_nfc_nand_chip_init()
1123 rknand->nsels = nsels; in rk_nfc_nand_chip_init()
1133 return -EINVAL; in rk_nfc_nand_chip_init()
1136 if (test_and_set_bit(tmp, &nfc->assigned_cs)) { in rk_nfc_nand_chip_init()
1138 return -EINVAL; in rk_nfc_nand_chip_init()
1141 rknand->sels[i] = tmp; in rk_nfc_nand_chip_init()
1144 chip = &rknand->chip; in rk_nfc_nand_chip_init()
1145 chip->controller = &nfc->controller; in rk_nfc_nand_chip_init()
1151 chip->options |= NAND_USES_DMA | NAND_NO_SUBPAGE_WRITE; in rk_nfc_nand_chip_init()
1152 chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB; in rk_nfc_nand_chip_init()
1155 chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST; in rk_nfc_nand_chip_init()
1158 mtd->owner = THIS_MODULE; in rk_nfc_nand_chip_init()
1159 mtd->dev.parent = dev; in rk_nfc_nand_chip_init()
1161 if (!mtd->name) { in rk_nfc_nand_chip_init()
1162 dev_err(nfc->dev, "NAND label property is mandatory\n"); in rk_nfc_nand_chip_init()
1163 return -EINVAL; in rk_nfc_nand_chip_init()
1172 if (chip->options & NAND_IS_BOOT_MEDIUM) { in rk_nfc_nand_chip_init()
1173 ret = of_property_read_u32(np, "rockchip,boot-blks", &tmp); in rk_nfc_nand_chip_init()
1174 rknand->boot_blks = ret ? 0 : tmp; in rk_nfc_nand_chip_init()
1176 ret = of_property_read_u32(np, "rockchip,boot-ecc-strength", in rk_nfc_nand_chip_init()
1178 rknand->boot_ecc = ret ? chip->ecc.strength : tmp; in rk_nfc_nand_chip_init()
1188 list_add_tail(&rknand->node, &nfc->chips); in rk_nfc_nand_chip_init()
1199 list_for_each_entry_safe(rknand, tmp, &nfc->chips, node) { in rk_nfc_chips_cleanup()
1200 chip = &rknand->chip; in rk_nfc_chips_cleanup()
1204 list_del(&rknand->node); in rk_nfc_chips_cleanup()
1210 struct device_node *np = dev->of_node, *nand_np; in rk_nfc_nand_chips_init()
1215 dev_err(nfc->dev, "incorrect number of NAND chips (%d)\n", in rk_nfc_nand_chips_init()
1217 return -EINVAL; in rk_nfc_nand_chips_init()
1345 .compatible = "rockchip,px30-nfc",
1349 .compatible = "rockchip,rk2928-nfc",
1353 .compatible = "rockchip,rv1108-nfc",
1362 struct device *dev = &pdev->dev; in rk_nfc_probe()
1368 return -ENOMEM; in rk_nfc_probe()
1370 nand_controller_init(&nfc->controller); in rk_nfc_probe()
1371 INIT_LIST_HEAD(&nfc->chips); in rk_nfc_probe()
1372 nfc->controller.ops = &rk_nfc_controller_ops; in rk_nfc_probe()
1374 nfc->cfg = of_device_get_match_data(dev); in rk_nfc_probe()
1375 nfc->dev = dev; in rk_nfc_probe()
1377 init_completion(&nfc->done); in rk_nfc_probe()
1379 nfc->regs = devm_platform_ioremap_resource(pdev, 0); in rk_nfc_probe()
1380 if (IS_ERR(nfc->regs)) { in rk_nfc_probe()
1381 ret = PTR_ERR(nfc->regs); in rk_nfc_probe()
1385 nfc->nfc_clk = devm_clk_get(dev, "nfc"); in rk_nfc_probe()
1386 if (IS_ERR(nfc->nfc_clk)) { in rk_nfc_probe()
1391 nfc->ahb_clk = devm_clk_get(dev, "ahb"); in rk_nfc_probe()
1392 if (IS_ERR(nfc->ahb_clk)) { in rk_nfc_probe()
1394 ret = PTR_ERR(nfc->ahb_clk); in rk_nfc_probe()
1404 ret = -EINVAL; in rk_nfc_probe()
1408 writel(0, nfc->regs + nfc->cfg->int_en_off); in rk_nfc_probe()
1409 ret = devm_request_irq(dev, irq, rk_nfc_irq, 0x0, "rk-nand", nfc); in rk_nfc_probe()
1434 kfree(nfc->page_buf); in rk_nfc_remove()
1435 kfree(nfc->oob_buf); in rk_nfc_remove()
1464 list_for_each_entry(rknand, &nfc->chips, node) { in rk_nfc_resume()
1465 chip = &rknand->chip; in rk_nfc_resume()
1466 for (i = 0; i < rknand->nsels; i++) in rk_nfc_resume()
1481 .name = "rockchip-nfc",
1490 MODULE_AUTHOR("Yifeng Zhao <yifeng.zhao@rock-chips.com>");
1492 MODULE_ALIAS("platform:rockchip-nand-controller");