Lines Matching full:ecc
22 * if we have HW ECC support.
38 #include <linux/mtd/nand-ecc-sw-hamming.h>
39 #include <linux/mtd/nand-ecc-sw-bch.h>
263 res = chip->ecc.read_oob(chip, first_page + page_offset); in nand_block_bad()
476 status = chip->ecc.write_oob_raw(chip, page & chip->pagemask); in nand_do_write_oob()
478 status = chip->ecc.write_oob(chip, page & chip->pagemask); in nand_do_write_oob()
2711 * nand_check_erased_ecc_chunk - check if an ECC chunk contains (almost) only
2715 * @ecc: ECC buffer
2716 * @ecclen: ECC length
2721 * Check if a data buffer and its associated ECC and OOB data contains only
2728 * 1/ ECC algorithms are working on pre-defined block sizes which are usually
2729 * different from the NAND page size. When fixing bitflips, ECC engines will
2736 * the payload data but also their associated ECC data, because a user might
2738 * shouldn't consider the chunk as erased, and checking ECC bytes prevent
2741 * data are protected by the ECC engine.
2743 * extra OOB data to an ECC chunk.
2750 void *ecc, int ecclen, in nand_check_erased_ecc_chunk() argument
2763 ecc_bitflips = nand_check_erased_buf(ecc, ecclen, bitflips_threshold); in nand_check_erased_ecc_chunk()
2778 memset(ecc, 0xff, ecclen); in nand_check_erased_ecc_chunk()
2803 * nand_read_page_raw - [INTERN] read raw page data without ecc
2809 * Not for syndrome calculating ECC controllers, which use a special oob layout.
2874 * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
2886 int eccsize = chip->ecc.size; in nand_read_page_raw_syndrome()
2887 int eccbytes = chip->ecc.bytes; in nand_read_page_raw_syndrome()
2895 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_read_page_raw_syndrome()
2902 if (chip->ecc.prepad) { in nand_read_page_raw_syndrome()
2903 ret = nand_read_data_op(chip, oob, chip->ecc.prepad, in nand_read_page_raw_syndrome()
2908 oob += chip->ecc.prepad; in nand_read_page_raw_syndrome()
2917 if (chip->ecc.postpad) { in nand_read_page_raw_syndrome()
2918 ret = nand_read_data_op(chip, oob, chip->ecc.postpad, in nand_read_page_raw_syndrome()
2923 oob += chip->ecc.postpad; in nand_read_page_raw_syndrome()
2938 * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
2948 int i, eccsize = chip->ecc.size, ret; in nand_read_page_swecc()
2949 int eccbytes = chip->ecc.bytes; in nand_read_page_swecc()
2950 int eccsteps = chip->ecc.steps; in nand_read_page_swecc()
2952 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_read_page_swecc()
2953 uint8_t *ecc_code = chip->ecc.code_buf; in nand_read_page_swecc()
2956 chip->ecc.read_page_raw(chip, buf, 1, page); in nand_read_page_swecc()
2959 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_read_page_swecc()
2962 chip->ecc.total); in nand_read_page_swecc()
2966 eccsteps = chip->ecc.steps; in nand_read_page_swecc()
2972 stat = chip->ecc.correct(chip, p, &ecc_code[i], &ecc_calc[i]); in nand_read_page_swecc()
2984 * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function
3004 /* Column address within the page aligned to ECC size (256bytes) */ in nand_read_subpage()
3005 start_step = data_offs / chip->ecc.size; in nand_read_subpage()
3006 end_step = (data_offs + readlen - 1) / chip->ecc.size; in nand_read_subpage()
3008 index = start_step * chip->ecc.bytes; in nand_read_subpage()
3010 /* Data size aligned to ECC ecc.size */ in nand_read_subpage()
3011 datafrag_len = num_steps * chip->ecc.size; in nand_read_subpage()
3012 eccfrag_len = num_steps * chip->ecc.bytes; in nand_read_subpage()
3014 data_col_addr = start_step * chip->ecc.size; in nand_read_subpage()
3021 /* Calculate ECC */ in nand_read_subpage()
3022 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) in nand_read_subpage()
3023 chip->ecc.calculate(chip, p, &chip->ecc.calc_buf[i]); in nand_read_subpage()
3027 * ecc.pos. Let's make sure that there are no gaps in ECC positions. in nand_read_subpage()
3044 * Send the command to read the particular ECC bytes take care in nand_read_subpage()
3051 if ((oobregion.offset + (num_steps * chip->ecc.bytes)) & in nand_read_subpage()
3063 ret = mtd_ooblayout_get_eccbytes(mtd, chip->ecc.code_buf, in nand_read_subpage()
3069 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) { in nand_read_subpage()
3072 stat = chip->ecc.correct(chip, p, &chip->ecc.code_buf[i], in nand_read_subpage()
3073 &chip->ecc.calc_buf[i]); in nand_read_subpage()
3075 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_subpage()
3077 stat = nand_check_erased_ecc_chunk(p, chip->ecc.size, in nand_read_subpage()
3078 &chip->ecc.code_buf[i], in nand_read_subpage()
3079 chip->ecc.bytes, in nand_read_subpage()
3081 chip->ecc.strength); in nand_read_subpage()
3095 * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
3101 * Not for syndrome calculating ECC controllers which need a special oob layout.
3107 int i, eccsize = chip->ecc.size, ret; in nand_read_page_hwecc()
3108 int eccbytes = chip->ecc.bytes; in nand_read_page_hwecc()
3109 int eccsteps = chip->ecc.steps; in nand_read_page_hwecc()
3111 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_read_page_hwecc()
3112 uint8_t *ecc_code = chip->ecc.code_buf; in nand_read_page_hwecc()
3120 chip->ecc.hwctl(chip, NAND_ECC_READ); in nand_read_page_hwecc()
3126 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_read_page_hwecc()
3135 chip->ecc.total); in nand_read_page_hwecc()
3139 eccsteps = chip->ecc.steps; in nand_read_page_hwecc()
3145 stat = chip->ecc.correct(chip, p, &ecc_code[i], &ecc_calc[i]); in nand_read_page_hwecc()
3147 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_page_hwecc()
3152 chip->ecc.strength); in nand_read_page_hwecc()
3166 * nand_read_page_hwecc_oob_first - Hardware ECC page read with ECC
3173 * Hardware ECC for large page chips, which requires the ECC data to be
3180 int i, eccsize = chip->ecc.size, ret; in nand_read_page_hwecc_oob_first()
3181 int eccbytes = chip->ecc.bytes; in nand_read_page_hwecc_oob_first()
3182 int eccsteps = chip->ecc.steps; in nand_read_page_hwecc_oob_first()
3184 uint8_t *ecc_code = chip->ecc.code_buf; in nand_read_page_hwecc_oob_first()
3198 chip->ecc.total); in nand_read_page_hwecc_oob_first()
3205 chip->ecc.hwctl(chip, NAND_ECC_READ); in nand_read_page_hwecc_oob_first()
3211 stat = chip->ecc.correct(chip, p, &ecc_code[i], NULL); in nand_read_page_hwecc_oob_first()
3213 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_page_hwecc_oob_first()
3218 chip->ecc.strength); in nand_read_page_hwecc_oob_first()
3233 * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
3246 int ret, i, eccsize = chip->ecc.size; in nand_read_page_syndrome()
3247 int eccbytes = chip->ecc.bytes; in nand_read_page_syndrome()
3248 int eccsteps = chip->ecc.steps; in nand_read_page_syndrome()
3249 int eccpadbytes = eccbytes + chip->ecc.prepad + chip->ecc.postpad; in nand_read_page_syndrome()
3261 chip->ecc.hwctl(chip, NAND_ECC_READ); in nand_read_page_syndrome()
3267 if (chip->ecc.prepad) { in nand_read_page_syndrome()
3268 ret = nand_read_data_op(chip, oob, chip->ecc.prepad, in nand_read_page_syndrome()
3273 oob += chip->ecc.prepad; in nand_read_page_syndrome()
3276 chip->ecc.hwctl(chip, NAND_ECC_READSYN); in nand_read_page_syndrome()
3282 stat = chip->ecc.correct(chip, p, oob, NULL); in nand_read_page_syndrome()
3286 if (chip->ecc.postpad) { in nand_read_page_syndrome()
3287 ret = nand_read_data_op(chip, oob, chip->ecc.postpad, in nand_read_page_syndrome()
3292 oob += chip->ecc.postpad; in nand_read_page_syndrome()
3296 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_page_syndrome()
3298 stat = nand_check_erased_ecc_chunk(p, chip->ecc.size, in nand_read_page_syndrome()
3302 chip->ecc.strength); in nand_read_page_syndrome()
3362 * when there are too many bitflips in a page (i.e., ECC error). After setting
3390 * nand_do_read_ops - [INTERN] Read data with ECC
3455 * the read methods return max bitflips per ecc step. in nand_do_read_ops()
3458 ret = chip->ecc.read_page_raw(chip, bufpoi, in nand_do_read_ops()
3463 ret = chip->ecc.read_subpage(chip, col, bytes, in nand_do_read_ops()
3466 ret = chip->ecc.read_page(chip, bufpoi, in nand_do_read_ops()
3585 * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC
3594 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; in nand_read_oob_syndrome()
3595 int eccsize = chip->ecc.size; in nand_read_oob_syndrome()
3599 ret = nand_read_page_op(chip, page, chip->ecc.size, NULL, 0); in nand_read_oob_syndrome()
3603 for (i = 0; i < chip->ecc.steps; i++) { in nand_read_oob_syndrome()
3653 * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC
3661 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; in nand_write_oob_syndrome()
3662 int eccsize = chip->ecc.size, length = mtd->oobsize; in nand_write_oob_syndrome()
3663 int ret, i, len, pos, sndcmd = 0, steps = chip->ecc.steps; in nand_write_oob_syndrome()
3667 * data-ecc-data-ecc ... ecc-oob in nand_write_oob_syndrome()
3669 * data-pad-ecc-pad-data-pad .... ecc-pad-oob in nand_write_oob_syndrome()
3671 if (!chip->ecc.prepad && !chip->ecc.postpad) { in nand_write_oob_syndrome()
3765 ret = chip->ecc.read_oob_raw(chip, page); in nand_do_read_oob()
3767 ret = chip->ecc.read_oob(chip, page); in nand_do_read_oob()
3871 * Not for syndrome calculating ECC controllers, which use a special oob layout.
3937 * We need a special oob layout and handling even when ECC isn't checked.
3944 int eccsize = chip->ecc.size; in nand_write_page_raw_syndrome()
3945 int eccbytes = chip->ecc.bytes; in nand_write_page_raw_syndrome()
3953 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_write_page_raw_syndrome()
3960 if (chip->ecc.prepad) { in nand_write_page_raw_syndrome()
3961 ret = nand_write_data_op(chip, oob, chip->ecc.prepad, in nand_write_page_raw_syndrome()
3966 oob += chip->ecc.prepad; in nand_write_page_raw_syndrome()
3975 if (chip->ecc.postpad) { in nand_write_page_raw_syndrome()
3976 ret = nand_write_data_op(chip, oob, chip->ecc.postpad, in nand_write_page_raw_syndrome()
3981 oob += chip->ecc.postpad; in nand_write_page_raw_syndrome()
3995 * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
4005 int i, eccsize = chip->ecc.size, ret; in nand_write_page_swecc()
4006 int eccbytes = chip->ecc.bytes; in nand_write_page_swecc()
4007 int eccsteps = chip->ecc.steps; in nand_write_page_swecc()
4008 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_write_page_swecc()
4011 /* Software ECC calculation */ in nand_write_page_swecc()
4013 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_write_page_swecc()
4016 chip->ecc.total); in nand_write_page_swecc()
4020 return chip->ecc.write_page_raw(chip, buf, 1, page); in nand_write_page_swecc()
4024 * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
4034 int i, eccsize = chip->ecc.size, ret; in nand_write_page_hwecc()
4035 int eccbytes = chip->ecc.bytes; in nand_write_page_hwecc()
4036 int eccsteps = chip->ecc.steps; in nand_write_page_hwecc()
4037 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_write_page_hwecc()
4045 chip->ecc.hwctl(chip, NAND_ECC_WRITE); in nand_write_page_hwecc()
4051 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_write_page_hwecc()
4055 chip->ecc.total); in nand_write_page_hwecc()
4068 * nand_write_subpage_hwecc - [REPLACEABLE] hardware ECC based subpage write
4082 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_write_subpage_hwecc()
4083 int ecc_size = chip->ecc.size; in nand_write_subpage_hwecc()
4084 int ecc_bytes = chip->ecc.bytes; in nand_write_subpage_hwecc()
4085 int ecc_steps = chip->ecc.steps; in nand_write_subpage_hwecc()
4097 chip->ecc.hwctl(chip, NAND_ECC_WRITE); in nand_write_subpage_hwecc()
4104 /* mask ECC of un-touched subpages by padding 0xFF */ in nand_write_subpage_hwecc()
4108 chip->ecc.calculate(chip, buf, ecc_calc); in nand_write_subpage_hwecc()
4120 /* copy calculated ECC for whole page to chip->buffer->oob */ in nand_write_subpage_hwecc()
4122 ecc_calc = chip->ecc.calc_buf; in nand_write_subpage_hwecc()
4124 chip->ecc.total); in nand_write_subpage_hwecc()
4138 * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
4151 int i, eccsize = chip->ecc.size; in nand_write_page_syndrome()
4152 int eccbytes = chip->ecc.bytes; in nand_write_page_syndrome()
4153 int eccsteps = chip->ecc.steps; in nand_write_page_syndrome()
4163 chip->ecc.hwctl(chip, NAND_ECC_WRITE); in nand_write_page_syndrome()
4169 if (chip->ecc.prepad) { in nand_write_page_syndrome()
4170 ret = nand_write_data_op(chip, oob, chip->ecc.prepad, in nand_write_page_syndrome()
4175 oob += chip->ecc.prepad; in nand_write_page_syndrome()
4178 chip->ecc.calculate(chip, p, oob); in nand_write_page_syndrome()
4186 if (chip->ecc.postpad) { in nand_write_page_syndrome()
4187 ret = nand_write_data_op(chip, oob, chip->ecc.postpad, in nand_write_page_syndrome()
4192 oob += chip->ecc.postpad; in nand_write_page_syndrome()
4225 chip->ecc.write_subpage) in nand_write_page()
4231 status = chip->ecc.write_page_raw(chip, buf, oob_required, in nand_write_page()
4234 status = chip->ecc.write_subpage(chip, offset, data_len, buf, in nand_write_page()
4237 status = chip->ecc.write_page(chip, buf, oob_required, page); in nand_write_page()
4248 * nand_do_write_ops - [INTERN] NAND write with ECC
4253 * NAND write with ECC.
4381 * panic_nand_write - [MTD Interface] NAND write with ECC
4388 * NAND write with ECC. Used when performing writes in interrupt context, this
5208 err = of_property_read_string(np, "nand-ecc-mode", &pm); in of_get_rawnand_ecc_engine_type_legacy()
5241 err = of_property_read_string(np, "nand-ecc-mode", &pm); in of_get_rawnand_ecc_placement_legacy()
5255 err = of_property_read_string(np, "nand-ecc-mode", &pm); in of_get_rawnand_ecc_algo_legacy()
5269 struct nand_ecc_props *user_conf = &chip->base.ecc.user_conf; in of_get_nand_ecc_legacy_user_config()
5393 * ECC engine type, we will default to NAND_ECC_ENGINE_TYPE_ON_HOST. in rawnand_dt_init()
5395 nand->ecc.defaults.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST; in rawnand_dt_init()
5402 if (nand->ecc.user_conf.engine_type != NAND_ECC_ENGINE_TYPE_INVALID) in rawnand_dt_init()
5403 chip->ecc.engine_type = nand->ecc.user_conf.engine_type; in rawnand_dt_init()
5404 if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_INVALID) in rawnand_dt_init()
5405 chip->ecc.engine_type = nand->ecc.defaults.engine_type; in rawnand_dt_init()
5407 chip->ecc.placement = nand->ecc.user_conf.placement; in rawnand_dt_init()
5408 chip->ecc.algo = nand->ecc.user_conf.algo; in rawnand_dt_init()
5409 chip->ecc.strength = nand->ecc.user_conf.strength; in rawnand_dt_init()
5410 chip->ecc.size = nand->ecc.user_conf.step_size; in rawnand_dt_init()
5425 * to tweak some ECC-related parameters before nand_scan_tail(). This separation
5522 base->ecc.user_conf.engine_type = NAND_ECC_ENGINE_TYPE_SOFT; in rawnand_sw_hamming_init()
5523 base->ecc.user_conf.algo = NAND_ECC_ALGO_HAMMING; in rawnand_sw_hamming_init()
5524 base->ecc.user_conf.strength = chip->ecc.strength; in rawnand_sw_hamming_init()
5525 base->ecc.user_conf.step_size = chip->ecc.size; in rawnand_sw_hamming_init()
5531 engine_conf = base->ecc.ctx.priv; in rawnand_sw_hamming_init()
5533 if (chip->ecc.options & NAND_ECC_SOFT_HAMMING_SM_ORDER) in rawnand_sw_hamming_init()
5536 chip->ecc.size = base->ecc.ctx.conf.step_size; in rawnand_sw_hamming_init()
5537 chip->ecc.strength = base->ecc.ctx.conf.strength; in rawnand_sw_hamming_init()
5538 chip->ecc.total = base->ecc.ctx.total; in rawnand_sw_hamming_init()
5539 chip->ecc.steps = nanddev_get_ecc_nsteps(base); in rawnand_sw_hamming_init()
5540 chip->ecc.bytes = base->ecc.ctx.total / nanddev_get_ecc_nsteps(base); in rawnand_sw_hamming_init()
5581 base->ecc.user_conf.engine_type = NAND_ECC_ENGINE_TYPE_SOFT; in rawnand_sw_bch_init()
5582 base->ecc.user_conf.algo = NAND_ECC_ALGO_BCH; in rawnand_sw_bch_init()
5583 base->ecc.user_conf.step_size = chip->ecc.size; in rawnand_sw_bch_init()
5584 base->ecc.user_conf.strength = chip->ecc.strength; in rawnand_sw_bch_init()
5590 chip->ecc.size = ecc_conf->step_size; in rawnand_sw_bch_init()
5591 chip->ecc.strength = ecc_conf->strength; in rawnand_sw_bch_init()
5592 chip->ecc.total = base->ecc.ctx.total; in rawnand_sw_bch_init()
5593 chip->ecc.steps = nanddev_get_ecc_nsteps(base); in rawnand_sw_bch_init()
5594 chip->ecc.bytes = base->ecc.ctx.total / nanddev_get_ecc_nsteps(base); in rawnand_sw_bch_init()
5628 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_set_ecc_on_host_ops() local
5630 switch (ecc->placement) { in nand_set_ecc_on_host_ops()
5634 if (!ecc->read_page) in nand_set_ecc_on_host_ops()
5635 ecc->read_page = nand_read_page_hwecc; in nand_set_ecc_on_host_ops()
5636 if (!ecc->write_page) in nand_set_ecc_on_host_ops()
5637 ecc->write_page = nand_write_page_hwecc; in nand_set_ecc_on_host_ops()
5638 if (!ecc->read_page_raw) in nand_set_ecc_on_host_ops()
5639 ecc->read_page_raw = nand_read_page_raw; in nand_set_ecc_on_host_ops()
5640 if (!ecc->write_page_raw) in nand_set_ecc_on_host_ops()
5641 ecc->write_page_raw = nand_write_page_raw; in nand_set_ecc_on_host_ops()
5642 if (!ecc->read_oob) in nand_set_ecc_on_host_ops()
5643 ecc->read_oob = nand_read_oob_std; in nand_set_ecc_on_host_ops()
5644 if (!ecc->write_oob) in nand_set_ecc_on_host_ops()
5645 ecc->write_oob = nand_write_oob_std; in nand_set_ecc_on_host_ops()
5646 if (!ecc->read_subpage) in nand_set_ecc_on_host_ops()
5647 ecc->read_subpage = nand_read_subpage; in nand_set_ecc_on_host_ops()
5648 if (!ecc->write_subpage && ecc->hwctl && ecc->calculate) in nand_set_ecc_on_host_ops()
5649 ecc->write_subpage = nand_write_subpage_hwecc; in nand_set_ecc_on_host_ops()
5653 if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) && in nand_set_ecc_on_host_ops()
5654 (!ecc->read_page || in nand_set_ecc_on_host_ops()
5655 ecc->read_page == nand_read_page_hwecc || in nand_set_ecc_on_host_ops()
5656 !ecc->write_page || in nand_set_ecc_on_host_ops()
5657 ecc->write_page == nand_write_page_hwecc)) { in nand_set_ecc_on_host_ops()
5658 WARN(1, "No ECC functions supplied; hardware ECC not possible\n"); in nand_set_ecc_on_host_ops()
5662 if (!ecc->read_page) in nand_set_ecc_on_host_ops()
5663 ecc->read_page = nand_read_page_syndrome; in nand_set_ecc_on_host_ops()
5664 if (!ecc->write_page) in nand_set_ecc_on_host_ops()
5665 ecc->write_page = nand_write_page_syndrome; in nand_set_ecc_on_host_ops()
5666 if (!ecc->read_page_raw) in nand_set_ecc_on_host_ops()
5667 ecc->read_page_raw = nand_read_page_raw_syndrome; in nand_set_ecc_on_host_ops()
5668 if (!ecc->write_page_raw) in nand_set_ecc_on_host_ops()
5669 ecc->write_page_raw = nand_write_page_raw_syndrome; in nand_set_ecc_on_host_ops()
5670 if (!ecc->read_oob) in nand_set_ecc_on_host_ops()
5671 ecc->read_oob = nand_read_oob_syndrome; in nand_set_ecc_on_host_ops()
5672 if (!ecc->write_oob) in nand_set_ecc_on_host_ops()
5673 ecc->write_oob = nand_write_oob_syndrome; in nand_set_ecc_on_host_ops()
5678 ecc->placement); in nand_set_ecc_on_host_ops()
5689 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_set_ecc_soft_ops() local
5692 if (WARN_ON(ecc->engine_type != NAND_ECC_ENGINE_TYPE_SOFT)) in nand_set_ecc_soft_ops()
5695 switch (ecc->algo) { in nand_set_ecc_soft_ops()
5697 ecc->calculate = rawnand_sw_hamming_calculate; in nand_set_ecc_soft_ops()
5698 ecc->correct = rawnand_sw_hamming_correct; in nand_set_ecc_soft_ops()
5699 ecc->read_page = nand_read_page_swecc; in nand_set_ecc_soft_ops()
5700 ecc->read_subpage = nand_read_subpage; in nand_set_ecc_soft_ops()
5701 ecc->write_page = nand_write_page_swecc; in nand_set_ecc_soft_ops()
5702 if (!ecc->read_page_raw) in nand_set_ecc_soft_ops()
5703 ecc->read_page_raw = nand_read_page_raw; in nand_set_ecc_soft_ops()
5704 if (!ecc->write_page_raw) in nand_set_ecc_soft_ops()
5705 ecc->write_page_raw = nand_write_page_raw; in nand_set_ecc_soft_ops()
5706 ecc->read_oob = nand_read_oob_std; in nand_set_ecc_soft_ops()
5707 ecc->write_oob = nand_write_oob_std; in nand_set_ecc_soft_ops()
5708 if (!ecc->size) in nand_set_ecc_soft_ops()
5709 ecc->size = 256; in nand_set_ecc_soft_ops()
5710 ecc->bytes = 3; in nand_set_ecc_soft_ops()
5711 ecc->strength = 1; in nand_set_ecc_soft_ops()
5714 ecc->options |= NAND_ECC_SOFT_HAMMING_SM_ORDER; in nand_set_ecc_soft_ops()
5718 WARN(1, "Hamming ECC initialization failed!\n"); in nand_set_ecc_soft_ops()
5728 ecc->calculate = rawnand_sw_bch_calculate; in nand_set_ecc_soft_ops()
5729 ecc->correct = rawnand_sw_bch_correct; in nand_set_ecc_soft_ops()
5730 ecc->read_page = nand_read_page_swecc; in nand_set_ecc_soft_ops()
5731 ecc->read_subpage = nand_read_subpage; in nand_set_ecc_soft_ops()
5732 ecc->write_page = nand_write_page_swecc; in nand_set_ecc_soft_ops()
5733 if (!ecc->read_page_raw) in nand_set_ecc_soft_ops()
5734 ecc->read_page_raw = nand_read_page_raw; in nand_set_ecc_soft_ops()
5735 if (!ecc->write_page_raw) in nand_set_ecc_soft_ops()
5736 ecc->write_page_raw = nand_write_page_raw; in nand_set_ecc_soft_ops()
5737 ecc->read_oob = nand_read_oob_std; in nand_set_ecc_soft_ops()
5738 ecc->write_oob = nand_write_oob_std; in nand_set_ecc_soft_ops()
5741 * We can only maximize ECC config when the default layout is in nand_set_ecc_soft_ops()
5745 if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH && in nand_set_ecc_soft_ops()
5747 nanddev->ecc.user_conf.flags &= ~NAND_ECC_MAXIMIZE_STRENGTH; in nand_set_ecc_soft_ops()
5751 WARN(1, "BCH ECC initialization failed!\n"); in nand_set_ecc_soft_ops()
5757 WARN(1, "Unsupported ECC algorithm!\n"); in nand_set_ecc_soft_ops()
5763 * nand_check_ecc_caps - check the sanity of preset ECC settings
5765 * @caps: ECC caps info structure
5766 * @oobavail: OOB size that the ECC engine can use
5768 * When ECC step size and strength are already set, check if they are supported
5769 * by the controller and the calculated ECC bytes fit within the chip's OOB.
5770 * On success, the calculated ECC bytes is set.
5778 int preset_step = chip->ecc.size; in nand_check_ecc_caps()
5779 int preset_strength = chip->ecc.strength; in nand_check_ecc_caps()
5799 pr_err("ECC (step, strength) = (%d, %d) does not fit in OOB", in nand_check_ecc_caps()
5804 chip->ecc.bytes = ecc_bytes; in nand_check_ecc_caps()
5810 pr_err("ECC (step, strength) = (%d, %d) not supported on this controller", in nand_check_ecc_caps()
5817 * nand_match_ecc_req - meet the chip's requirement with least ECC bytes
5819 * @caps: ECC engine caps info structure
5820 * @oobavail: OOB size that the ECC engine can use
5822 * If a chip's ECC requirement is provided, try to meet it with the least
5823 * number of ECC bytes (i.e. with the largest number of OOB-free bytes).
5824 * On success, the chosen ECC settings are set.
5879 * with the least number of ECC bytes. in nand_match_ecc_req()
5893 chip->ecc.size = best_step; in nand_match_ecc_req()
5894 chip->ecc.strength = best_strength; in nand_match_ecc_req()
5895 chip->ecc.bytes = best_ecc_bytes; in nand_match_ecc_req()
5901 * nand_maximize_ecc - choose the max ECC strength available
5903 * @caps: ECC engine caps info structure
5904 * @oobavail: OOB size that the ECC engine can use
5906 * Choose the max ECC strength that is supported on the controller, and can fit
5907 * within the chip's OOB. On success, the chosen ECC settings are set.
5925 /* If chip->ecc.size is already set, respect it */ in nand_maximize_ecc()
5926 if (chip->ecc.size && step_size != chip->ecc.size) in nand_maximize_ecc()
5963 chip->ecc.size = best_step; in nand_maximize_ecc()
5964 chip->ecc.strength = best_strength; in nand_maximize_ecc()
5965 chip->ecc.bytes = best_ecc_bytes; in nand_maximize_ecc()
5971 * nand_ecc_choose_conf - Set the ECC strength and ECC step size
5973 * @caps: ECC engine caps info structure
5974 * @oobavail: OOB size that the ECC engine can use
5976 * Choose the ECC configuration according to following logic.
5978 * 1. If both ECC step size and ECC strength are already set (usually by DT)
5980 * 2. If the user provided the nand-ecc-maximize property, then select maximum
5981 * ECC strength.
5982 * 3. Otherwise, try to match the ECC step size and ECC strength closest
5984 * requirement then fallback to the maximum ECC step size and ECC strength.
5986 * On success, the chosen ECC settings are set.
5997 if (chip->ecc.size && chip->ecc.strength) in nand_ecc_choose_conf()
6000 if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH) in nand_ecc_choose_conf()
6065 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_scan_tail() local
6097 !(ecc->engine_type == NAND_ECC_ENGINE_TYPE_SOFT && in nand_scan_tail()
6098 ecc->algo == NAND_ECC_ALGO_BCH) && in nand_scan_tail()
6099 !(ecc->engine_type == NAND_ECC_ENGINE_TYPE_SOFT && in nand_scan_tail()
6100 ecc->algo == NAND_ECC_ALGO_HAMMING)) { in nand_scan_tail()
6116 * page with ECC layout when ->oobsize <= 128 for in nand_scan_tail()
6119 if (ecc->engine_type == NAND_ECC_ENGINE_TYPE_NONE) { in nand_scan_tail()
6133 * Check ECC mode, default to software if 3byte/512byte hardware ECC is in nand_scan_tail()
6134 * selected and we have 256 byte pagesize fallback to software ECC in nand_scan_tail()
6137 switch (ecc->engine_type) { in nand_scan_tail()
6143 if (mtd->writesize >= ecc->size) { in nand_scan_tail()
6144 if (!ecc->strength) { in nand_scan_tail()
6145 WARN(1, "Driver must set ecc.strength when using hardware ECC\n"); in nand_scan_tail()
6151 pr_warn("%d byte HW ECC not possible on %d byte page size, fallback to SW ECC\n", in nand_scan_tail()
6152 ecc->size, mtd->writesize); in nand_scan_tail()
6153 ecc->engine_type = NAND_ECC_ENGINE_TYPE_SOFT; in nand_scan_tail()
6154 ecc->algo = NAND_ECC_ALGO_HAMMING; in nand_scan_tail()
6164 if (!ecc->read_page || !ecc->write_page) { in nand_scan_tail()
6165 WARN(1, "No ECC functions supplied; on-die ECC not possible\n"); in nand_scan_tail()
6169 if (!ecc->read_oob) in nand_scan_tail()
6170 ecc->read_oob = nand_read_oob_std; in nand_scan_tail()
6171 if (!ecc->write_oob) in nand_scan_tail()
6172 ecc->write_oob = nand_write_oob_std; in nand_scan_tail()
6177 ecc->read_page = nand_read_page_raw; in nand_scan_tail()
6178 ecc->write_page = nand_write_page_raw; in nand_scan_tail()
6179 ecc->read_oob = nand_read_oob_std; in nand_scan_tail()
6180 ecc->read_page_raw = nand_read_page_raw; in nand_scan_tail()
6181 ecc->write_page_raw = nand_write_page_raw; in nand_scan_tail()
6182 ecc->write_oob = nand_write_oob_std; in nand_scan_tail()
6183 ecc->size = mtd->writesize; in nand_scan_tail()
6184 ecc->bytes = 0; in nand_scan_tail()
6185 ecc->strength = 0; in nand_scan_tail()
6189 WARN(1, "Invalid NAND_ECC_MODE %d\n", ecc->engine_type); in nand_scan_tail()
6194 if (ecc->correct || ecc->calculate) { in nand_scan_tail()
6195 ecc->calc_buf = kmalloc(mtd->oobsize, GFP_KERNEL); in nand_scan_tail()
6196 ecc->code_buf = kmalloc(mtd->oobsize, GFP_KERNEL); in nand_scan_tail()
6197 if (!ecc->calc_buf || !ecc->code_buf) { in nand_scan_tail()
6204 if (!ecc->read_oob_raw) in nand_scan_tail()
6205 ecc->read_oob_raw = ecc->read_oob; in nand_scan_tail()
6206 if (!ecc->write_oob_raw) in nand_scan_tail()
6207 ecc->write_oob_raw = ecc->write_oob; in nand_scan_tail()
6209 /* propagate ecc info to mtd_info */ in nand_scan_tail()
6210 mtd->ecc_strength = ecc->strength; in nand_scan_tail()
6211 mtd->ecc_step_size = ecc->size; in nand_scan_tail()
6214 * Set the number of read / write steps for one page depending on ECC in nand_scan_tail()
6217 if (!ecc->steps) in nand_scan_tail()
6218 ecc->steps = mtd->writesize / ecc->size; in nand_scan_tail()
6219 if (ecc->steps * ecc->size != mtd->writesize) { in nand_scan_tail()
6220 WARN(1, "Invalid ECC parameters\n"); in nand_scan_tail()
6225 if (!ecc->total) { in nand_scan_tail()
6226 ecc->total = ecc->steps * ecc->bytes; in nand_scan_tail()
6227 chip->base.ecc.ctx.total = ecc->total; in nand_scan_tail()
6230 if (ecc->total > mtd->oobsize) { in nand_scan_tail()
6231 WARN(1, "Total number of ECC bytes exceeded oobsize\n"); in nand_scan_tail()
6246 /* ECC sanity check: warn if it's too weak */ in nand_scan_tail()
6248 …pr_warn("WARNING: %s: the ECC used on your system (%db/%dB) is too weak compared to the one requir… in nand_scan_tail()
6249 mtd->name, chip->ecc.strength, chip->ecc.size, in nand_scan_tail()
6253 /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */ in nand_scan_tail()
6255 switch (ecc->steps) { in nand_scan_tail()
6272 switch (ecc->engine_type) { in nand_scan_tail()
6363 kfree(ecc->code_buf); in nand_scan_tail()
6364 kfree(ecc->calc_buf); in nand_scan_tail()
6430 if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_SOFT) { in nand_cleanup()
6431 if (chip->ecc.algo == NAND_ECC_ALGO_HAMMING) in nand_cleanup()
6433 else if (chip->ecc.algo == NAND_ECC_ALGO_BCH) in nand_cleanup()
6445 kfree(chip->ecc.code_buf); in nand_cleanup()
6446 kfree(chip->ecc.calc_buf); in nand_cleanup()