1 // SPDX-License-Identifier: GPL-2.0+
3  * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
28 #define NFC_V1_V2_BUF_SIZE		(host->regs + 0x00)
29 #define NFC_V1_V2_BUF_ADDR		(host->regs + 0x04)
30 #define NFC_V1_V2_FLASH_ADDR		(host->regs + 0x06)
31 #define NFC_V1_V2_FLASH_CMD		(host->regs + 0x08)
32 #define NFC_V1_V2_CONFIG		(host->regs + 0x0a)
33 #define NFC_V1_V2_ECC_STATUS_RESULT	(host->regs + 0x0c)
34 #define NFC_V1_V2_RSLTMAIN_AREA		(host->regs + 0x0e)
35 #define NFC_V21_RSLTSPARE_AREA		(host->regs + 0x10)
36 #define NFC_V1_V2_WRPROT		(host->regs + 0x12)
37 #define NFC_V1_UNLOCKSTART_BLKADDR	(host->regs + 0x14)
38 #define NFC_V1_UNLOCKEND_BLKADDR	(host->regs + 0x16)
39 #define NFC_V21_UNLOCKSTART_BLKADDR0	(host->regs + 0x20)
40 #define NFC_V21_UNLOCKSTART_BLKADDR1	(host->regs + 0x24)
41 #define NFC_V21_UNLOCKSTART_BLKADDR2	(host->regs + 0x28)
42 #define NFC_V21_UNLOCKSTART_BLKADDR3	(host->regs + 0x2c)
43 #define NFC_V21_UNLOCKEND_BLKADDR0	(host->regs + 0x22)
44 #define NFC_V21_UNLOCKEND_BLKADDR1	(host->regs + 0x26)
45 #define NFC_V21_UNLOCKEND_BLKADDR2	(host->regs + 0x2a)
46 #define NFC_V21_UNLOCKEND_BLKADDR3	(host->regs + 0x2e)
47 #define NFC_V1_V2_NF_WRPRST		(host->regs + 0x18)
48 #define NFC_V1_V2_CONFIG1		(host->regs + 0x1a)
49 #define NFC_V1_V2_CONFIG2		(host->regs + 0x1c)
75 #define NFC_V3_FLASH_CMD		(host->regs_axi + 0x00)
76 #define NFC_V3_FLASH_ADDR0		(host->regs_axi + 0x04)
78 #define NFC_V3_CONFIG1			(host->regs_axi + 0x34)
82 #define NFC_V3_ECC_STATUS_RESULT	(host->regs_axi + 0x38)
84 #define NFC_V3_LAUNCH			(host->regs_axi + 0x40)
86 #define NFC_V3_WRPROT			(host->regs_ip + 0x0)
92 #define NFC_V3_WRPROT_UNLOCK_BLK_ADD0   (host->regs_ip + 0x04)
94 #define NFC_V3_CONFIG2			(host->regs_ip + 0x24)
109 #define NFC_V3_CONFIG3				(host->regs_ip + 0x28)
117 #define NFC_V3_IPC			(host->regs_ip + 0x2C)
121 #define NFC_V3_DELAY_LINE		(host->regs_ip + 0x34)
169 	void __iomem		*regs;  member
244  * This function handles the needed shuffling between host->data_buf (which
246  * spare) and the NFC buffer.
253 	u16 num_chunks = mtd->writesize / 512;  in copy_spare()
256 	u8 __iomem *s = host->spare0;  in copy_spare()
257 	u16 sparebuf_size = host->devtype_data->spare_len;  in copy_spare()
260 	oob_chunk_size = (host->used_oobsize / num_chunks) & ~1;  in copy_spare()
263 		for (i = 0; i < num_chunks - 1; i++)  in copy_spare()
271 				host->used_oobsize - i * oob_chunk_size);  in copy_spare()
273 		for (i = 0; i < num_chunks - 1; i++)  in copy_spare()
281 			      host->used_oobsize - i * oob_chunk_size);  in copy_spare()
286  * MXC NANDFC can only perform full page+spare or spare-only read/write.  When
289  * column == 0 (unless no column cycle is needed indicated by column == -1)
297 	if (column != -1) {  in mxc_do_addr_cycle()
298 		host->devtype_data->send_addr(host, column & 0xff,  in mxc_do_addr_cycle()
299 					      page_addr == -1);  in mxc_do_addr_cycle()
300 		if (mtd->writesize > 512)  in mxc_do_addr_cycle()
302 			host->devtype_data->send_addr(host,  in mxc_do_addr_cycle()
308 	if (page_addr != -1) {  in mxc_do_addr_cycle()
309 		/* paddr_0 - p_addr_7 */  in mxc_do_addr_cycle()
310 		host->devtype_data->send_addr(host, (page_addr & 0xff), false);  in mxc_do_addr_cycle()
312 		if (mtd->writesize > 512) {  in mxc_do_addr_cycle()
313 			if (mtd->size >= 0x10000000) {  in mxc_do_addr_cycle()
314 				/* paddr_8 - paddr_15 */  in mxc_do_addr_cycle()
315 				host->devtype_data->send_addr(host,  in mxc_do_addr_cycle()
318 				host->devtype_data->send_addr(host,  in mxc_do_addr_cycle()
322 				/* paddr_8 - paddr_15 */  in mxc_do_addr_cycle()
323 				host->devtype_data->send_addr(host,  in mxc_do_addr_cycle()
326 			if (nand_chip->options & NAND_ROW_ADDR_3) {  in mxc_do_addr_cycle()
327 				/* paddr_8 - paddr_15 */  in mxc_do_addr_cycle()
328 				host->devtype_data->send_addr(host,  in mxc_do_addr_cycle()
331 				host->devtype_data->send_addr(host,  in mxc_do_addr_cycle()
335 				/* paddr_8 - paddr_15 */  in mxc_do_addr_cycle()
336 				host->devtype_data->send_addr(host,  in mxc_do_addr_cycle()
364 	if (!host->devtype_data->irqpending_quirk)  in check_int_v1_v2()
400 	if (host->devtype_data->irqpending_quirk) {  in irq_control()
402 			enable_irq(host->irq);  in irq_control()
404 			disable_irq_nosync(host->irq);  in irq_control()
406 		host->devtype_data->irq_control(host, activate);  in irq_control()
429 	if (!host->devtype_data->check_int(host))  in mxc_nfc_irq()
434 	complete(&host->op_completion);  in mxc_nfc_irq()
450 	if (host->devtype_data->check_int(host))  in wait_op_done()
456 		reinit_completion(&host->op_completion);  in wait_op_done()
460 		timeout = wait_for_completion_timeout(&host->op_completion, HZ);  in wait_op_done()
461 		if (!timeout && !host->devtype_data->check_int(host)) {  in wait_op_done()
462 			dev_dbg(host->dev, "timeout waiting for irq\n");  in wait_op_done()
463 			ret = -ETIMEDOUT;  in wait_op_done()
472 			done = host->devtype_data->check_int(host);  in wait_op_done()
476 		} while (--max_retries);  in wait_op_done()
479 			dev_dbg(host->dev, "timeout polling for completion\n");  in wait_op_done()
480 			ret = -ETIMEDOUT;  in wait_op_done()
505 	dev_dbg(host->dev, "send_cmd(host, 0x%x, %d)\n", cmd, useirq);  in send_cmd_v1_v2()
510 	if (host->devtype_data->irqpending_quirk && (cmd == NAND_CMD_RESET)) {  in send_cmd_v1_v2()
514 		while (max_retries-- > 0) {  in send_cmd_v1_v2()
521 			dev_dbg(host->dev, "%s: RESET failed\n", __func__);  in send_cmd_v1_v2()
544 	dev_dbg(host->dev, "send_addr(host, 0x%x %d)\n", addr, islast);  in send_addr_v1_v2()
575 	writew(host->active_cs << 4, NFC_V1_V2_BUF_ADDR);  in send_page_v2()
589 	if (mtd->writesize > 512)  in send_page_v1()
597 		writew((host->active_cs << 4) | i, NFC_V1_V2_BUF_ADDR);  in send_page_v1()
613 	memcpy32_fromio(host->data_buf, host->main_area0, 16);  in send_read_id_v3()
620 	writew(host->active_cs << 4, NFC_V1_V2_BUF_ADDR);  in send_read_id_v1_v2()
627 	memcpy32_fromio(host->data_buf, host->main_area0, 16);  in send_read_id_v1_v2()
642 	void __iomem *main_buf = host->main_area0;  in get_dev_status_v1_v2()
646 	writew(host->active_cs << 4, NFC_V1_V2_BUF_ADDR);  in get_dev_status_v1_v2()
670 	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)  in mxc_nand_enable_hwecc_v1_v2()
688 	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)  in mxc_nand_enable_hwecc_v3()
720 	host->devtype_data->enable_hwecc(chip, ecc);  in mxc_nand_read_page_v1()
722 	host->devtype_data->send_cmd(host, NAND_CMD_READ0, false);  in mxc_nand_read_page_v1()
725 	if (mtd->writesize > 512)  in mxc_nand_read_page_v1()
726 		host->devtype_data->send_cmd(host, NAND_CMD_READSTART, true);  in mxc_nand_read_page_v1()
728 	no_subpages = mtd->writesize >> 9;  in mxc_nand_read_page_v1()
734 		writew((host->active_cs << 4) | i, NFC_V1_V2_BUF_ADDR);  in mxc_nand_read_page_v1()
751 				mtd->ecc_stats.corrected++;  in mxc_nand_read_page_v1()
755 				mtd->ecc_stats.failed++;  in mxc_nand_read_page_v1()
762 		memcpy32_fromio(buf, host->main_area0, mtd->writesize);  in mxc_nand_read_page_v1()
779 	host->devtype_data->enable_hwecc(chip, ecc);  in mxc_nand_read_page_v2_v3()
781 	host->devtype_data->send_cmd(host, NAND_CMD_READ0, false);  in mxc_nand_read_page_v2_v3()
784 	if (mtd->writesize > 512)  in mxc_nand_read_page_v2_v3()
785 		host->devtype_data->send_cmd(host,  in mxc_nand_read_page_v2_v3()
788 	host->devtype_data->send_page(mtd, NFC_OUTPUT);  in mxc_nand_read_page_v2_v3()
791 		memcpy32_fromio(buf, host->main_area0, mtd->writesize);  in mxc_nand_read_page_v2_v3()
795 	ecc_bit_mask = (host->eccsize == 4) ? 0x7 : 0xf;  in mxc_nand_read_page_v2_v3()
796 	err_limit = (host->eccsize == 4) ? 0x4 : 0x8;  in mxc_nand_read_page_v2_v3()
798 	no_subpages = mtd->writesize >> 9;  in mxc_nand_read_page_v2_v3()
800 	ecc_stat = host->devtype_data->get_ecc_status(host);  in mxc_nand_read_page_v2_v3()
805 			mtd->ecc_stats.failed++;  in mxc_nand_read_page_v2_v3()
807 			mtd->ecc_stats.corrected += err;  in mxc_nand_read_page_v2_v3()
812 	} while (--no_subpages);  in mxc_nand_read_page_v2_v3()
824 		oob_buf = chip->oob_poi;  in mxc_nand_read_page()
828 	return host->devtype_data->read_page(chip, buf, oob_buf, 1, page);  in mxc_nand_read_page()
838 		oob_buf = chip->oob_poi;  in mxc_nand_read_page_raw()
842 	return host->devtype_data->read_page(chip, buf, oob_buf, 0, page);  in mxc_nand_read_page_raw()
849 	return host->devtype_data->read_page(chip, NULL, chip->oob_poi, 0,  in mxc_nand_read_oob()
859 	host->devtype_data->enable_hwecc(chip, ecc);  in mxc_nand_write_page()
861 	host->devtype_data->send_cmd(host, NAND_CMD_SEQIN, false);  in mxc_nand_write_page()
864 	memcpy32_toio(host->main_area0, buf, mtd->writesize);  in mxc_nand_write_page()
865 	copy_spare(mtd, false, chip->oob_poi);  in mxc_nand_write_page()
867 	host->devtype_data->send_page(mtd, NFC_INPUT);  in mxc_nand_write_page()
868 	host->devtype_data->send_cmd(host, NAND_CMD_PAGEPROG, true);  in mxc_nand_write_page()
891 	memset(host->data_buf, 0xff, mtd->writesize);  in mxc_nand_write_oob()
893 	return mxc_nand_write_page(chip, host->data_buf, false, page);  in mxc_nand_write_oob()
902 	if (host->status_request)  in mxc_nand_read_byte()
903 		return host->devtype_data->get_dev_status(host) & 0xFF;  in mxc_nand_read_byte()
905 	if (nand_chip->options & NAND_BUSWIDTH_16) {  in mxc_nand_read_byte()
907 		ret = *(uint16_t *)(host->data_buf + host->buf_start);  in mxc_nand_read_byte()
909 		host->buf_start += 2;  in mxc_nand_read_byte()
911 		ret = *(uint8_t *)(host->data_buf + host->buf_start);  in mxc_nand_read_byte()
912 		host->buf_start++;  in mxc_nand_read_byte()
915 	dev_dbg(host->dev, "%s: ret=0x%hhx (start=%u)\n", __func__, ret, host->buf_start);  in mxc_nand_read_byte()
927 	u16 col = host->buf_start;  in mxc_nand_write_buf()
928 	int n = mtd->oobsize + mtd->writesize - col;  in mxc_nand_write_buf()
932 	memcpy(host->data_buf + col, buf, n);  in mxc_nand_write_buf()
934 	host->buf_start += n;  in mxc_nand_write_buf()
946 	u16 col = host->buf_start;  in mxc_nand_read_buf()
947 	int n = mtd->oobsize + mtd->writesize - col;  in mxc_nand_read_buf()
951 	memcpy(buf, host->data_buf + col, n);  in mxc_nand_read_buf()
953 	host->buf_start += n;  in mxc_nand_read_buf()
962 	if (chip == -1) {  in mxc_nand_select_chip_v1_v3()
964 		if (host->clk_act) {  in mxc_nand_select_chip_v1_v3()
965 			clk_disable_unprepare(host->clk);  in mxc_nand_select_chip_v1_v3()
966 			host->clk_act = 0;  in mxc_nand_select_chip_v1_v3()
971 	if (!host->clk_act) {  in mxc_nand_select_chip_v1_v3()
973 		clk_prepare_enable(host->clk);  in mxc_nand_select_chip_v1_v3()
974 		host->clk_act = 1;  in mxc_nand_select_chip_v1_v3()
982 	if (chip == -1) {  in mxc_nand_select_chip_v2()
984 		if (host->clk_act) {  in mxc_nand_select_chip_v2()
985 			clk_disable_unprepare(host->clk);  in mxc_nand_select_chip_v2()
986 			host->clk_act = 0;  in mxc_nand_select_chip_v2()
991 	if (!host->clk_act) {  in mxc_nand_select_chip_v2()
993 		clk_prepare_enable(host->clk);  in mxc_nand_select_chip_v2()
994 		host->clk_act = 1;  in mxc_nand_select_chip_v2()
997 	host->active_cs = chip;  in mxc_nand_select_chip_v2()
998 	writew(host->active_cs << 4, NFC_V1_V2_BUF_ADDR);  in mxc_nand_select_chip_v2()
1008 	if (section >= nand_chip->ecc.steps)  in mxc_v1_ooblayout_ecc()
1009 		return -ERANGE;  in mxc_v1_ooblayout_ecc()
1011 	oobregion->offset = (section * 16) + 6;  in mxc_v1_ooblayout_ecc()
1012 	oobregion->length = MXC_V1_ECCBYTES;  in mxc_v1_ooblayout_ecc()
1022 	if (section > nand_chip->ecc.steps)  in mxc_v1_ooblayout_free()
1023 		return -ERANGE;  in mxc_v1_ooblayout_free()
1026 		if (mtd->writesize <= 512) {  in mxc_v1_ooblayout_free()
1027 			oobregion->offset = 0;  in mxc_v1_ooblayout_free()
1028 			oobregion->length = 5;  in mxc_v1_ooblayout_free()
1030 			oobregion->offset = 2;  in mxc_v1_ooblayout_free()
1031 			oobregion->length = 4;  in mxc_v1_ooblayout_free()
1034 		oobregion->offset = ((section - 1) * 16) + MXC_V1_ECCBYTES + 6;  in mxc_v1_ooblayout_free()
1035 		if (section < nand_chip->ecc.steps)  in mxc_v1_ooblayout_free()
1036 			oobregion->length = (section * 16) + 6 -  in mxc_v1_ooblayout_free()
1037 					    oobregion->offset;  in mxc_v1_ooblayout_free()
1039 			oobregion->length = mtd->oobsize - oobregion->offset;  in mxc_v1_ooblayout_free()
1054 	int stepsize = nand_chip->ecc.bytes == 9 ? 16 : 26;  in mxc_v2_ooblayout_ecc()
1056 	if (section >= nand_chip->ecc.steps)  in mxc_v2_ooblayout_ecc()
1057 		return -ERANGE;  in mxc_v2_ooblayout_ecc()
1059 	oobregion->offset = (section * stepsize) + 7;  in mxc_v2_ooblayout_ecc()
1060 	oobregion->length = nand_chip->ecc.bytes;  in mxc_v2_ooblayout_ecc()
1069 	int stepsize = nand_chip->ecc.bytes == 9 ? 16 : 26;  in mxc_v2_ooblayout_free()
1071 	if (section >= nand_chip->ecc.steps)  in mxc_v2_ooblayout_free()
1072 		return -ERANGE;  in mxc_v2_ooblayout_free()
1075 		if (mtd->writesize <= 512) {  in mxc_v2_ooblayout_free()
1076 			oobregion->offset = 0;  in mxc_v2_ooblayout_free()
1077 			oobregion->length = 5;  in mxc_v2_ooblayout_free()
1079 			oobregion->offset = 2;  in mxc_v2_ooblayout_free()
1080 			oobregion->length = 4;  in mxc_v2_ooblayout_free()
1083 		oobregion->offset = section * stepsize;  in mxc_v2_ooblayout_free()
1084 		oobregion->length = 7;  in mxc_v2_ooblayout_free()
1104 	oobbytes_per_512 = mtd->oobsize * 512 / mtd->writesize;  in get_eccsize()
1118 	if (nand_chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST &&  in preset_v1()
1119 	    mtd->writesize)  in preset_v1()
1122 	if (!host->devtype_data->irqpending_quirk)  in preset_v1()
1125 	host->eccsize = 1;  in preset_v1()
1152 		return -ENOTSUPP;  in mxc_nand_v2_setup_interface()
1156 	tRC_min_ns = timings->tRC_min / 1000;  in mxc_nand_v2_setup_interface()
1166 		rate_round = clk_round_rate(host->clk, rate);  in mxc_nand_v2_setup_interface()
1171 		rate_round = clk_round_rate(host->clk, rate);  in mxc_nand_v2_setup_interface()
1180 	if (timings->tCLS_min > tRC_ps - 1000 ||  in mxc_nand_v2_setup_interface()
1181 	    timings->tCLH_min > tRC_ps - 2000 ||  in mxc_nand_v2_setup_interface()
1182 	    timings->tCS_min > tRC_ps - 1000 ||  in mxc_nand_v2_setup_interface()
1183 	    timings->tCH_min > tRC_ps - 2000 ||  in mxc_nand_v2_setup_interface()
1184 	    timings->tWP_min > tRC_ps - 1500 ||  in mxc_nand_v2_setup_interface()
1185 	    timings->tALS_min > tRC_ps ||  in mxc_nand_v2_setup_interface()
1186 	    timings->tALH_min > tRC_ps - 3000 ||  in mxc_nand_v2_setup_interface()
1187 	    timings->tDS_min > tRC_ps ||  in mxc_nand_v2_setup_interface()
1188 	    timings->tDH_min > tRC_ps - 5000 ||  in mxc_nand_v2_setup_interface()
1189 	    timings->tWC_min > 2 * tRC_ps ||  in mxc_nand_v2_setup_interface()
1190 	    timings->tWH_min > tRC_ps - 2500 ||  in mxc_nand_v2_setup_interface()
1191 	    timings->tRR_min > 6 * tRC_ps ||  in mxc_nand_v2_setup_interface()
1192 	    timings->tRP_min > 3 * tRC_ps / 2 ||  in mxc_nand_v2_setup_interface()
1193 	    timings->tRC_min > 2 * tRC_ps ||  in mxc_nand_v2_setup_interface()
1194 	    timings->tREH_min > (tRC_ps / 2) - 2500) {  in mxc_nand_v2_setup_interface()
1195 		dev_dbg(host->dev, "Timing out of bounds\n");  in mxc_nand_v2_setup_interface()
1196 		return -EINVAL;  in mxc_nand_v2_setup_interface()
1202 	ret = clk_set_rate(host->clk, rate);  in mxc_nand_v2_setup_interface()
1208 	dev_dbg(host->dev, "Setting rate to %ldHz, %s mode\n", rate_round,  in mxc_nand_v2_setup_interface()
1223 	if (!host->devtype_data->irqpending_quirk)  in preset_v2()
1226 	if (mtd->writesize) {  in preset_v2()
1227 		uint16_t pages_per_block = mtd->erasesize / mtd->writesize;  in preset_v2()
1229 		if (nand_chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST)  in preset_v2()
1232 		host->eccsize = get_eccsize(mtd);  in preset_v2()
1233 		if (host->eccsize == 4)  in preset_v2()
1236 		config1 |= NFC_V2_CONFIG1_PPB(ffs(pages_per_block) - 6);  in preset_v2()
1238 		host->eccsize = 1;  in preset_v2()
1244 	/* spare area size in 16-bit half-words */  in preset_v2()
1245 	writew(mtd->oobsize / 2, NFC_V21_RSLTSPARE_AREA);  in preset_v2()
1286 		NFC_V3_CONFIG2_SPAS(mtd->oobsize >> 1) |  in preset_v3()
1291 	addr_phases = fls(chip->pagemask) >> 3;  in preset_v3()
1293 	if (mtd->writesize == 2048) {  in preset_v3()
1296 	} else if (mtd->writesize == 4096) {  in preset_v3()
1301 		config2 |= NFC_V3_CONFIG2_NUM_ADDR_PHASE1(addr_phases - 1);  in preset_v3()
1304 	if (mtd->writesize) {  in preset_v3()
1305 		if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST)  in preset_v3()
1309 				ffs(mtd->erasesize / mtd->writesize) - 6,  in preset_v3()
1310 				host->devtype_data->ppb_shift);  in preset_v3()
1311 		host->eccsize = get_eccsize(mtd);  in preset_v3()
1312 		if (host->eccsize == 8)  in preset_v3()
1324 	if (!(chip->options & NAND_BUSWIDTH_16))  in preset_v3()
1340 	dev_dbg(host->dev, "mxc_nand_command (cmd = 0x%x, col = 0x%x, page = 0x%x)\n",  in mxc_nand_command()
1344 	host->status_request = false;  in mxc_nand_command()
1346 	/* Command pre-processing step */  in mxc_nand_command()
1349 		host->devtype_data->preset(mtd);  in mxc_nand_command()
1350 		host->devtype_data->send_cmd(host, command, false);  in mxc_nand_command()
1354 		host->buf_start = 0;  in mxc_nand_command()
1355 		host->status_request = true;  in mxc_nand_command()
1357 		host->devtype_data->send_cmd(host, command, true);  in mxc_nand_command()
1358 		WARN_ONCE(column != -1 || page_addr != -1,  in mxc_nand_command()
1365 		host->devtype_data->send_cmd(host, command, true);  in mxc_nand_command()
1367 		host->devtype_data->send_read_id(host);  in mxc_nand_command()
1368 		host->buf_start = 0;  in mxc_nand_command()
1373 		host->devtype_data->send_cmd(host, command, false);  in mxc_nand_command()
1374 		WARN_ONCE(column != -1,  in mxc_nand_command()
1381 		host->devtype_data->send_cmd(host, command, false);  in mxc_nand_command()
1383 		host->devtype_data->send_page(mtd, NFC_OUTPUT);  in mxc_nand_command()
1384 		memcpy32_fromio(host->data_buf, host->main_area0, 512);  in mxc_nand_command()
1385 		host->buf_start = 0;  in mxc_nand_command()
1401 	host->buf_start = 0;  in mxc_nand_set_features()
1404 		chip->legacy.write_byte(chip, subfeature_param[i]);  in mxc_nand_set_features()
1406 	memcpy32_toio(host->main_area0, host->data_buf, mtd->writesize);  in mxc_nand_set_features()
1407 	host->devtype_data->send_cmd(host, NAND_CMD_SET_FEATURES, false);  in mxc_nand_set_features()
1408 	mxc_do_addr_cycle(mtd, addr, -1);  in mxc_nand_set_features()
1409 	host->devtype_data->send_page(mtd, NFC_INPUT);  in mxc_nand_set_features()
1421 	host->devtype_data->send_cmd(host, NAND_CMD_GET_FEATURES, false);  in mxc_nand_get_features()
1422 	mxc_do_addr_cycle(mtd, addr, -1);  in mxc_nand_get_features()
1423 	host->devtype_data->send_page(mtd, NFC_OUTPUT);  in mxc_nand_get_features()
1424 	memcpy32_fromio(host->data_buf, host->main_area0, 512);  in mxc_nand_get_features()
1425 	host->buf_start = 0;  in mxc_nand_get_features()
1428 		*subfeature_param++ = chip->legacy.read_byte(chip);  in mxc_nand_get_features()
1589 	return host->devtype_data == &imx21_nand_devtype_data;  in is_imx21_nfc()
1594 	return host->devtype_data == &imx27_nand_devtype_data;  in is_imx27_nfc()
1599 	return host->devtype_data == &imx25_nand_devtype_data;  in is_imx25_nfc()
1604 	return host->devtype_data == &imx51_nand_devtype_data;  in is_imx51_nfc()
1609 	return host->devtype_data == &imx53_nand_devtype_data;  in is_imx53_nfc()
1613 	{ .compatible = "fsl,imx21-nand", .data = &imx21_nand_devtype_data, },
1614 	{ .compatible = "fsl,imx27-nand", .data = &imx27_nand_devtype_data, },
1615 	{ .compatible = "fsl,imx25-nand", .data = &imx25_nand_devtype_data, },
1616 	{ .compatible = "fsl,imx51-nand", .data = &imx51_nand_devtype_data, },
1617 	{ .compatible = "fsl,imx53-nand", .data = &imx53_nand_devtype_data, },
1626 	struct device *dev = mtd->dev.parent;  in mxcnd_attach_chip()
1628 	chip->ecc.bytes = host->devtype_data->eccbytes;  in mxcnd_attach_chip()
1629 	host->eccsize = host->devtype_data->eccsize;  in mxcnd_attach_chip()
1630 	chip->ecc.size = 512;  in mxcnd_attach_chip()
1631 	mtd_set_ooblayout(mtd, host->devtype_data->ooblayout);  in mxcnd_attach_chip()
1633 	switch (chip->ecc.engine_type) {  in mxcnd_attach_chip()
1635 		chip->ecc.read_page = mxc_nand_read_page;  in mxcnd_attach_chip()
1636 		chip->ecc.read_page_raw = mxc_nand_read_page_raw;  in mxcnd_attach_chip()
1637 		chip->ecc.read_oob = mxc_nand_read_oob;  in mxcnd_attach_chip()
1638 		chip->ecc.write_page = mxc_nand_write_page_ecc;  in mxcnd_attach_chip()
1639 		chip->ecc.write_page_raw = mxc_nand_write_page_raw;  in mxcnd_attach_chip()
1640 		chip->ecc.write_oob = mxc_nand_write_oob;  in mxcnd_attach_chip()
1647 		return -EINVAL;  in mxcnd_attach_chip()
1650 	if (chip->bbt_options & NAND_BBT_USE_FLASH) {  in mxcnd_attach_chip()
1651 		chip->bbt_td = &bbt_main_descr;  in mxcnd_attach_chip()
1652 		chip->bbt_md = &bbt_mirror_descr;  in mxcnd_attach_chip()
1656 	devm_kfree(dev, (void *)host->data_buf);  in mxcnd_attach_chip()
1657 	host->data_buf = devm_kzalloc(dev, mtd->writesize + mtd->oobsize,  in mxcnd_attach_chip()
1659 	if (!host->data_buf)  in mxcnd_attach_chip()
1660 		return -ENOMEM;  in mxcnd_attach_chip()
1663 	host->devtype_data->preset(mtd);  in mxcnd_attach_chip()
1665 	if (!chip->ecc.bytes) {  in mxcnd_attach_chip()
1666 		if (host->eccsize == 8)  in mxcnd_attach_chip()
1667 			chip->ecc.bytes = 18;  in mxcnd_attach_chip()
1668 		else if (host->eccsize == 4)  in mxcnd_attach_chip()
1669 			chip->ecc.bytes = 9;  in mxcnd_attach_chip()
1675 	 * into copying invalid data to/from the spare IO buffer, as this  in mxcnd_attach_chip()
1676 	 * might cause ECC data corruption when doing sub-page write to a  in mxcnd_attach_chip()
1679 	host->used_oobsize = min(mtd->oobsize, 218U);  in mxcnd_attach_chip()
1681 	if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST) {  in mxcnd_attach_chip()
1683 			chip->ecc.strength = 1;  in mxcnd_attach_chip()
1685 			chip->ecc.strength = (host->eccsize == 4) ? 4 : 8;  in mxcnd_attach_chip()
1696 	return host->devtype_data->setup_interface(chip, chipnr, conf);  in mxcnd_setup_interface()
1713 	host = devm_kzalloc(&pdev->dev, sizeof(struct mxc_nand_host),  in mxcnd_probe()
1716 		return -ENOMEM;  in mxcnd_probe()
1719 	host->data_buf = devm_kzalloc(&pdev->dev, PAGE_SIZE, GFP_KERNEL);  in mxcnd_probe()
1720 	if (!host->data_buf)  in mxcnd_probe()
1721 		return -ENOMEM;  in mxcnd_probe()
1723 	host->dev = &pdev->dev;  in mxcnd_probe()
1725 	this = &host->nand;  in mxcnd_probe()
1727 	mtd->dev.parent = &pdev->dev;  in mxcnd_probe()
1728 	mtd->name = DRIVER_NAME;  in mxcnd_probe()
1731 	this->legacy.chip_delay = 5;  in mxcnd_probe()
1734 	nand_set_flash_node(this, pdev->dev.of_node);  in mxcnd_probe()
1735 	this->legacy.dev_ready = mxc_nand_dev_ready;  in mxcnd_probe()
1736 	this->legacy.cmdfunc = mxc_nand_command;  in mxcnd_probe()
1737 	this->legacy.read_byte = mxc_nand_read_byte;  in mxcnd_probe()
1738 	this->legacy.write_buf = mxc_nand_write_buf;  in mxcnd_probe()
1739 	this->legacy.read_buf = mxc_nand_read_buf;  in mxcnd_probe()
1740 	this->legacy.set_features = mxc_nand_set_features;  in mxcnd_probe()
1741 	this->legacy.get_features = mxc_nand_get_features;  in mxcnd_probe()
1743 	host->clk = devm_clk_get(&pdev->dev, NULL);  in mxcnd_probe()
1744 	if (IS_ERR(host->clk))  in mxcnd_probe()
1745 		return PTR_ERR(host->clk);  in mxcnd_probe()
1747 	host->devtype_data = device_get_match_data(&pdev->dev);  in mxcnd_probe()
1749 	if (!host->devtype_data->setup_interface)  in mxcnd_probe()
1750 		this->options |= NAND_KEEP_TIMINGS;  in mxcnd_probe()
1752 	if (host->devtype_data->needs_ip) {  in mxcnd_probe()
1754 		host->regs_ip = devm_ioremap_resource(&pdev->dev, res);  in mxcnd_probe()
1755 		if (IS_ERR(host->regs_ip))  in mxcnd_probe()
1756 			return PTR_ERR(host->regs_ip);  in mxcnd_probe()
1763 	host->base = devm_ioremap_resource(&pdev->dev, res);  in mxcnd_probe()
1764 	if (IS_ERR(host->base))  in mxcnd_probe()
1765 		return PTR_ERR(host->base);  in mxcnd_probe()
1767 	host->main_area0 = host->base;  in mxcnd_probe()
1769 	if (host->devtype_data->regs_offset)  in mxcnd_probe()
1770 		host->regs = host->base + host->devtype_data->regs_offset;  in mxcnd_probe()
1771 	host->spare0 = host->base + host->devtype_data->spare0_offset;  in mxcnd_probe()
1772 	if (host->devtype_data->axi_offset)  in mxcnd_probe()
1773 		host->regs_axi = host->base + host->devtype_data->axi_offset;  in mxcnd_probe()
1775 	this->legacy.select_chip = host->devtype_data->select_chip;  in mxcnd_probe()
1777 	init_completion(&host->op_completion);  in mxcnd_probe()
1779 	host->irq = platform_get_irq(pdev, 0);  in mxcnd_probe()
1780 	if (host->irq < 0)  in mxcnd_probe()
1781 		return host->irq;  in mxcnd_probe()
1784 	 * Use host->devtype_data->irq_control() here instead of irq_control()  in mxcnd_probe()
1788 	host->devtype_data->irq_control(host, 0);  in mxcnd_probe()
1790 	err = devm_request_irq(&pdev->dev, host->irq, mxc_nfc_irq,  in mxcnd_probe()
1795 	err = clk_prepare_enable(host->clk);  in mxcnd_probe()
1798 	host->clk_act = 1;  in mxcnd_probe()
1805 	if (host->devtype_data->irqpending_quirk) {  in mxcnd_probe()
1806 		disable_irq_nosync(host->irq);  in mxcnd_probe()
1807 		host->devtype_data->irq_control(host, 1);  in mxcnd_probe()
1811 	this->legacy.dummy_controller.ops = &mxcnd_controller_ops;  in mxcnd_probe()
1828 	if (host->clk_act)  in mxcnd_probe()
1829 		clk_disable_unprepare(host->clk);  in mxcnd_probe()
1837 	struct nand_chip *chip = &host->nand;  in mxcnd_remove()
1843 	if (host->clk_act)  in mxcnd_remove()
1844 		clk_disable_unprepare(host->clk);  in mxcnd_remove()