Lines Matching +full:nand +full:- +full:ecc +full:- +full:strength
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * MTK NAND Flash controller driver.
6 * Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
10 #include <linux/dma-mapping.h>
20 #include <linux/mtd/nand-ecc-mtk.h>
22 /* NAND controller register definition */
90 #define MTK_NAME "mtk-nand"
127 struct nand_chip nand; member
147 struct mtk_ecc *ecc; member
179 static inline struct mtk_nfc_nand_chip *to_mtk_nand(struct nand_chip *nand) in to_mtk_nand() argument
181 return container_of(nand, struct mtk_nfc_nand_chip, nand); in to_mtk_nand()
186 return (u8 *)p + i * chip->ecc.size; in data_ptr()
198 if (i < mtk_nand->bad_mark.sec) in oob_ptr()
199 poi = chip->oob_poi + (i + 1) * mtk_nand->fdm.reg_size; in oob_ptr()
200 else if (i == mtk_nand->bad_mark.sec) in oob_ptr()
201 poi = chip->oob_poi; in oob_ptr()
203 poi = chip->oob_poi + i * mtk_nand->fdm.reg_size; in oob_ptr()
212 return chip->ecc.size + mtk_nand->spare_per_sector; in mtk_data_len()
219 return nfc->buffer + i * mtk_data_len(chip); in mtk_data_ptr()
226 return nfc->buffer + i * mtk_data_len(chip) + chip->ecc.size; in mtk_oob_ptr()
231 writel(val, nfc->regs + reg); in nfi_writel()
236 writew(val, nfc->regs + reg); in nfi_writew()
241 writeb(val, nfc->regs + reg); in nfi_writeb()
246 return readl_relaxed(nfc->regs + reg); in nfi_readl()
251 return readw_relaxed(nfc->regs + reg); in nfi_readw()
256 return readb_relaxed(nfc->regs + reg); in nfi_readb()
261 struct device *dev = nfc->dev; in mtk_nfc_hw_reset()
269 ret = readl_poll_timeout(nfc->regs + NFI_MASTER_STA, val, in mtk_nfc_hw_reset()
283 struct device *dev = nfc->dev; in mtk_nfc_send_command()
289 ret = readl_poll_timeout_atomic(nfc->regs + NFI_STA, val, in mtk_nfc_send_command()
293 return -EIO; in mtk_nfc_send_command()
301 struct device *dev = nfc->dev; in mtk_nfc_send_address()
309 ret = readl_poll_timeout_atomic(nfc->regs + NFI_STA, val, in mtk_nfc_send_address()
313 return -EIO; in mtk_nfc_send_address()
326 if (!mtd->writesize) in mtk_nfc_hw_runtime_config()
329 spare = mtk_nand->spare_per_sector; in mtk_nfc_hw_runtime_config()
331 switch (mtd->writesize) { in mtk_nfc_hw_runtime_config()
336 if (chip->ecc.size == 512) in mtk_nfc_hw_runtime_config()
342 if (chip->ecc.size == 512) in mtk_nfc_hw_runtime_config()
348 if (chip->ecc.size == 512) in mtk_nfc_hw_runtime_config()
357 dev_err(nfc->dev, "invalid page len: %d\n", mtd->writesize); in mtk_nfc_hw_runtime_config()
358 return -EINVAL; in mtk_nfc_hw_runtime_config()
365 if (chip->ecc.size == 1024) in mtk_nfc_hw_runtime_config()
368 for (i = 0; i < nfc->caps->num_spare_size; i++) { in mtk_nfc_hw_runtime_config()
369 if (nfc->caps->spare_size[i] == spare) in mtk_nfc_hw_runtime_config()
373 if (i == nfc->caps->num_spare_size) { in mtk_nfc_hw_runtime_config()
374 dev_err(nfc->dev, "invalid spare size %d\n", spare); in mtk_nfc_hw_runtime_config()
375 return -EINVAL; in mtk_nfc_hw_runtime_config()
378 fmt |= i << nfc->caps->pageformat_spare_shift; in mtk_nfc_hw_runtime_config()
380 fmt |= mtk_nand->fdm.reg_size << PAGEFMT_FDM_SHIFT; in mtk_nfc_hw_runtime_config()
381 fmt |= mtk_nand->fdm.ecc_size << PAGEFMT_FDM_ECC_SHIFT; in mtk_nfc_hw_runtime_config()
384 nfc->ecc_cfg.strength = chip->ecc.strength; in mtk_nfc_hw_runtime_config()
385 nfc->ecc_cfg.len = chip->ecc.size + mtk_nand->fdm.ecc_size; in mtk_nfc_hw_runtime_config()
395 rc = readb_poll_timeout_atomic(nfc->regs + NFI_PIO_DIRDY, val, in mtk_nfc_wait_ioready()
398 dev_err(nfc->dev, "data not ready\n"); in mtk_nfc_wait_ioready()
417 reg = (nfc->caps->max_sector << CON_SEC_SHIFT) | CON_BRD; in mtk_nfc_read_byte()
448 reg = nfc->caps->max_sector << CON_SEC_SHIFT | CON_BWR; in mtk_nfc_write_byte()
473 switch (instr->type) { in mtk_nfc_exec_instr()
475 mtk_nfc_send_command(nfc, instr->ctx.cmd.opcode); in mtk_nfc_exec_instr()
478 for (i = 0; i < instr->ctx.addr.naddrs; i++) in mtk_nfc_exec_instr()
479 mtk_nfc_send_address(nfc, instr->ctx.addr.addrs[i]); in mtk_nfc_exec_instr()
482 mtk_nfc_read_buf(chip, instr->ctx.data.buf.in, in mtk_nfc_exec_instr()
483 instr->ctx.data.len); in mtk_nfc_exec_instr()
486 mtk_nfc_write_buf(chip, instr->ctx.data.buf.out, in mtk_nfc_exec_instr()
487 instr->ctx.data.len); in mtk_nfc_exec_instr()
490 return readl_poll_timeout(nfc->regs + NFI_STA, status, in mtk_nfc_exec_instr()
492 instr->ctx.waitrdy.timeout_ms * 1000); in mtk_nfc_exec_instr()
497 return -EINVAL; in mtk_nfc_exec_instr()
500 static void mtk_nfc_select_target(struct nand_chip *nand, unsigned int cs) in mtk_nfc_select_target() argument
502 struct mtk_nfc *nfc = nand_get_controller_data(nand); in mtk_nfc_select_target()
503 struct mtk_nfc_nand_chip *mtk_nand = to_mtk_nand(nand); in mtk_nfc_select_target()
505 mtk_nfc_hw_runtime_config(nand_to_mtd(nand)); in mtk_nfc_select_target()
507 nfi_writel(nfc, mtk_nand->sels[cs], NFI_CSEL); in mtk_nfc_select_target()
523 mtk_nfc_select_target(chip, op->cs); in mtk_nfc_exec_op()
525 for (i = 0; i < op->ninstrs; i++) { in mtk_nfc_exec_op()
526 ret = mtk_nfc_exec_instr(chip, &op->instrs[i]); in mtk_nfc_exec_op()
544 return -ENOTSUPP; in mtk_nfc_setup_interface()
549 rate = clk_get_rate(nfc->clk.nfi_clk); in mtk_nfc_setup_interface()
551 rate /= nfc->caps->nfi_clk_div; in mtk_nfc_setup_interface()
556 tpoecs = max(timings->tALH_min, timings->tCLH_min) / 1000; in mtk_nfc_setup_interface()
560 tprecs = max(timings->tCLS_min, timings->tALS_min) / 1000; in mtk_nfc_setup_interface()
567 tw2r = timings->tWHR_min / 1000; in mtk_nfc_setup_interface()
569 tw2r = DIV_ROUND_UP(tw2r - 1, 2); in mtk_nfc_setup_interface()
572 twh = max(timings->tREH_min, timings->tWH_min) / 1000; in mtk_nfc_setup_interface()
573 twh = DIV_ROUND_UP(twh * rate, 1000000) - 1; in mtk_nfc_setup_interface()
585 if (temp < timings->tWC_min) in mtk_nfc_setup_interface()
586 twst = timings->tWC_min - temp; in mtk_nfc_setup_interface()
587 twst = max(timings->tWP_min, twst) / 1000; in mtk_nfc_setup_interface()
588 twst = DIV_ROUND_UP(twst * rate, 1000000) - 1; in mtk_nfc_setup_interface()
595 if (temp < timings->tRC_min) in mtk_nfc_setup_interface()
596 trlt = timings->tRC_min - temp; in mtk_nfc_setup_interface()
597 trlt = max(trlt, timings->tRP_min) / 1000; in mtk_nfc_setup_interface()
598 trlt = DIV_ROUND_UP(trlt * rate, 1000000) - 1; in mtk_nfc_setup_interface()
609 if (temp < timings->tREA_max) { in mtk_nfc_setup_interface()
610 tsel = timings->tREA_max / 1000; in mtk_nfc_setup_interface()
612 tsel -= (trlt + 1); in mtk_nfc_setup_interface()
614 trlt += tsel - MAX_STROBE_DLY; in mtk_nfc_setup_interface()
625 * ------------------------------------- in mtk_nfc_setup_interface()
646 int size = chip->ecc.size + mtk_nand->fdm.reg_size; in mtk_nfc_sector_encode()
648 nfc->ecc_cfg.mode = ECC_DMA_MODE; in mtk_nfc_sector_encode()
649 nfc->ecc_cfg.op = ECC_ENCODE; in mtk_nfc_sector_encode()
651 return mtk_ecc_encode(nfc->ecc, &nfc->ecc_cfg, data, size); in mtk_nfc_sector_encode()
662 struct mtk_nfc_nand_chip *nand = to_mtk_nand(chip); in mtk_nfc_bad_mark_swap() local
663 u32 bad_pos = nand->bad_mark.pos; in mtk_nfc_bad_mark_swap()
666 bad_pos += nand->bad_mark.sec * mtk_data_len(chip); in mtk_nfc_bad_mark_swap()
668 bad_pos += nand->bad_mark.sec * chip->ecc.size; in mtk_nfc_bad_mark_swap()
670 swap(chip->oob_poi[0], buf[bad_pos]); in mtk_nfc_bad_mark_swap()
679 struct mtk_nfc_fdm *fdm = &mtk_nand->fdm; in mtk_nfc_format_subpage()
683 start = offset / chip->ecc.size; in mtk_nfc_format_subpage()
684 end = DIV_ROUND_UP(offset + len, chip->ecc.size); in mtk_nfc_format_subpage()
686 memset(nfc->buffer, 0xff, mtd->writesize + mtd->oobsize); in mtk_nfc_format_subpage()
687 for (i = 0; i < chip->ecc.steps; i++) { in mtk_nfc_format_subpage()
689 chip->ecc.size); in mtk_nfc_format_subpage()
694 if (i == mtk_nand->bad_mark.sec) in mtk_nfc_format_subpage()
695 mtk_nand->bad_mark.bm_swap(mtd, nfc->buffer, 1); in mtk_nfc_format_subpage()
697 memcpy(mtk_oob_ptr(chip, i), oob_ptr(chip, i), fdm->reg_size); in mtk_nfc_format_subpage()
713 struct mtk_nfc_fdm *fdm = &mtk_nand->fdm; in mtk_nfc_format_page()
716 memset(nfc->buffer, 0xff, mtd->writesize + mtd->oobsize); in mtk_nfc_format_page()
717 for (i = 0; i < chip->ecc.steps; i++) { in mtk_nfc_format_page()
720 chip->ecc.size); in mtk_nfc_format_page()
722 if (i == mtk_nand->bad_mark.sec) in mtk_nfc_format_page()
723 mtk_nand->bad_mark.bm_swap(mtd, nfc->buffer, 1); in mtk_nfc_format_page()
725 memcpy(mtk_oob_ptr(chip, i), oob_ptr(chip, i), fdm->reg_size); in mtk_nfc_format_page()
734 struct mtk_nfc_fdm *fdm = &mtk_nand->fdm; in mtk_nfc_read_fdm()
744 for (j = 0; j < fdm->reg_size; j++) in mtk_nfc_read_fdm()
753 struct mtk_nfc_fdm *fdm = &mtk_nand->fdm; in mtk_nfc_write_fdm()
758 for (i = 0; i < chip->ecc.steps; i++) { in mtk_nfc_write_fdm()
764 vall |= (j < fdm->reg_size ? oobptr[j] : 0xff) in mtk_nfc_write_fdm()
767 valm |= (j < fdm->reg_size ? oobptr[j] : 0xff) in mtk_nfc_write_fdm()
768 << ((j - 4) * 8); in mtk_nfc_write_fdm()
779 struct device *dev = nfc->dev; in mtk_nfc_do_write_page()
785 ret = dma_mapping_error(nfc->dev, addr); in mtk_nfc_do_write_page()
787 dev_err(nfc->dev, "dma mapping error\n"); in mtk_nfc_do_write_page()
788 return -EINVAL; in mtk_nfc_do_write_page()
794 nfi_writel(nfc, chip->ecc.steps << CON_SEC_SHIFT, NFI_CON); in mtk_nfc_do_write_page()
798 init_completion(&nfc->done); in mtk_nfc_do_write_page()
804 ret = wait_for_completion_timeout(&nfc->done, msecs_to_jiffies(500)); in mtk_nfc_do_write_page()
808 ret = -ETIMEDOUT; in mtk_nfc_do_write_page()
812 ret = readl_poll_timeout_atomic(nfc->regs + NFI_ADDRCNTR, reg, in mtk_nfc_do_write_page()
813 ADDRCNTR_SEC(reg) >= chip->ecc.steps, in mtk_nfc_do_write_page()
820 dma_unmap_single(nfc->dev, addr, len, DMA_TO_DEVICE); in mtk_nfc_do_write_page()
836 mtk_nfc_select_target(chip, chip->cur_cs); in mtk_nfc_write_page()
840 /* OOB => FDM: from register, ECC: from HW */ in mtk_nfc_write_page()
844 nfc->ecc_cfg.op = ECC_ENCODE; in mtk_nfc_write_page()
845 nfc->ecc_cfg.mode = ECC_NFI_MODE; in mtk_nfc_write_page()
846 ret = mtk_ecc_enable(nfc->ecc, &nfc->ecc_cfg); in mtk_nfc_write_page()
856 memcpy(nfc->buffer, buf, mtd->writesize); in mtk_nfc_write_page()
857 mtk_nand->bad_mark.bm_swap(mtd, nfc->buffer, raw); in mtk_nfc_write_page()
858 bufpoi = nfc->buffer; in mtk_nfc_write_page()
860 /* write OOB into the FDM registers (OOB area in MTK NAND) */ in mtk_nfc_write_page()
866 len = mtd->writesize + (raw ? mtd->oobsize : 0); in mtk_nfc_write_page()
870 mtk_ecc_disable(nfc->ecc); in mtk_nfc_write_page()
891 return mtk_nfc_write_page(mtd, chip, nfc->buffer, pg, 1); in mtk_nfc_write_page_raw()
907 return mtk_nfc_write_page(mtd, chip, nfc->buffer, page, 1); in mtk_nfc_write_subpage_hwecc()
922 u32 reg_size = mtk_nand->fdm.reg_size; in mtk_nfc_update_ecc_stats()
927 memset(buf, 0xff, sectors * chip->ecc.size); in mtk_nfc_update_ecc_stats()
933 mtk_ecc_get_stats(nfc->ecc, &stats, sectors); in mtk_nfc_update_ecc_stats()
934 mtd->ecc_stats.corrected += stats.corrected; in mtk_nfc_update_ecc_stats()
935 mtd->ecc_stats.failed += stats.failed; in mtk_nfc_update_ecc_stats()
946 u32 spare = mtk_nand->spare_per_sector; in mtk_nfc_read_subpage()
954 mtk_nfc_select_target(chip, chip->cur_cs); in mtk_nfc_read_subpage()
955 start = data_offs / chip->ecc.size; in mtk_nfc_read_subpage()
956 end = DIV_ROUND_UP(data_offs + readlen, chip->ecc.size); in mtk_nfc_read_subpage()
958 sectors = end - start; in mtk_nfc_read_subpage()
959 column = start * (chip->ecc.size + spare); in mtk_nfc_read_subpage()
961 len = sectors * chip->ecc.size + (raw ? sectors * spare : 0); in mtk_nfc_read_subpage()
962 buf = bufpoi + start * chip->ecc.size; in mtk_nfc_read_subpage()
966 addr = dma_map_single(nfc->dev, buf, len, DMA_FROM_DEVICE); in mtk_nfc_read_subpage()
967 rc = dma_mapping_error(nfc->dev, addr); in mtk_nfc_read_subpage()
969 dev_err(nfc->dev, "dma mapping error\n"); in mtk_nfc_read_subpage()
971 return -EINVAL; in mtk_nfc_read_subpage()
980 nfc->ecc_cfg.mode = ECC_NFI_MODE; in mtk_nfc_read_subpage()
981 nfc->ecc_cfg.sectors = sectors; in mtk_nfc_read_subpage()
982 nfc->ecc_cfg.op = ECC_DECODE; in mtk_nfc_read_subpage()
983 rc = mtk_ecc_enable(nfc->ecc, &nfc->ecc_cfg); in mtk_nfc_read_subpage()
985 dev_err(nfc->dev, "ecc enable\n"); in mtk_nfc_read_subpage()
990 dma_unmap_single(nfc->dev, addr, len, DMA_FROM_DEVICE); in mtk_nfc_read_subpage()
1002 init_completion(&nfc->done); in mtk_nfc_read_subpage()
1007 rc = wait_for_completion_timeout(&nfc->done, msecs_to_jiffies(500)); in mtk_nfc_read_subpage()
1009 dev_warn(nfc->dev, "read ahb/dma done timeout\n"); in mtk_nfc_read_subpage()
1011 rc = readl_poll_timeout_atomic(nfc->regs + NFI_BYTELEN, reg, in mtk_nfc_read_subpage()
1015 dev_err(nfc->dev, "subpage done timeout\n"); in mtk_nfc_read_subpage()
1016 bitflips = -EIO; in mtk_nfc_read_subpage()
1018 rc = mtk_ecc_wait_done(nfc->ecc, ECC_DECODE); in mtk_nfc_read_subpage()
1019 bitflips = rc < 0 ? -ETIMEDOUT : in mtk_nfc_read_subpage()
1024 dma_unmap_single(nfc->dev, addr, len, DMA_FROM_DEVICE); in mtk_nfc_read_subpage()
1029 mtk_ecc_disable(nfc->ecc); in mtk_nfc_read_subpage()
1031 if (clamp(mtk_nand->bad_mark.sec, start, end) == mtk_nand->bad_mark.sec) in mtk_nfc_read_subpage()
1032 mtk_nand->bad_mark.bm_swap(mtd, bufpoi, raw); in mtk_nfc_read_subpage()
1051 return mtk_nfc_read_subpage(mtd, chip, 0, mtd->writesize, p, pg, 0); in mtk_nfc_read_page_hwecc()
1060 struct mtk_nfc_fdm *fdm = &mtk_nand->fdm; in mtk_nfc_read_page_raw()
1063 memset(nfc->buffer, 0xff, mtd->writesize + mtd->oobsize); in mtk_nfc_read_page_raw()
1064 ret = mtk_nfc_read_subpage(mtd, chip, 0, mtd->writesize, nfc->buffer, in mtk_nfc_read_page_raw()
1069 for (i = 0; i < chip->ecc.steps; i++) { in mtk_nfc_read_page_raw()
1070 memcpy(oob_ptr(chip, i), mtk_oob_ptr(chip, i), fdm->reg_size); in mtk_nfc_read_page_raw()
1072 if (i == mtk_nand->bad_mark.sec) in mtk_nfc_read_page_raw()
1073 mtk_nand->bad_mark.bm_swap(mtd, nfc->buffer, 1); in mtk_nfc_read_page_raw()
1077 chip->ecc.size); in mtk_nfc_read_page_raw()
1091 * CNRNB: nand ready/busy register in mtk_nfc_hw_init()
1092 * ------------------------------- in mtk_nfc_hw_init()
1093 * 7:4: timeout register for polling the NAND busy/ready signal in mtk_nfc_hw_init()
1117 complete(&nfc->done); in mtk_nfc_irq()
1126 ret = clk_prepare_enable(clk->nfi_clk); in mtk_nfc_enable_clk()
1132 ret = clk_prepare_enable(clk->pad_clk); in mtk_nfc_enable_clk()
1135 clk_disable_unprepare(clk->nfi_clk); in mtk_nfc_enable_clk()
1144 clk_disable_unprepare(clk->nfi_clk); in mtk_nfc_disable_clk()
1145 clk_disable_unprepare(clk->pad_clk); in mtk_nfc_disable_clk()
1153 struct mtk_nfc_fdm *fdm = &mtk_nand->fdm; in mtk_nfc_ooblayout_free()
1156 eccsteps = mtd->writesize / chip->ecc.size; in mtk_nfc_ooblayout_free()
1159 return -ERANGE; in mtk_nfc_ooblayout_free()
1161 oob_region->length = fdm->reg_size - fdm->ecc_size; in mtk_nfc_ooblayout_free()
1162 oob_region->offset = section * fdm->reg_size + fdm->ecc_size; in mtk_nfc_ooblayout_free()
1175 return -ERANGE; in mtk_nfc_ooblayout_ecc()
1177 eccsteps = mtd->writesize / chip->ecc.size; in mtk_nfc_ooblayout_ecc()
1178 oob_region->offset = mtk_nand->fdm.reg_size * eccsteps; in mtk_nfc_ooblayout_ecc()
1179 oob_region->length = mtd->oobsize - oob_region->offset; in mtk_nfc_ooblayout_ecc()
1186 .ecc = mtk_nfc_ooblayout_ecc,
1191 struct nand_chip *nand = mtd_to_nand(mtd); in mtk_nfc_set_fdm() local
1192 struct mtk_nfc_nand_chip *chip = to_mtk_nand(nand); in mtk_nfc_set_fdm()
1193 struct mtk_nfc *nfc = nand_get_controller_data(nand); in mtk_nfc_set_fdm()
1196 ecc_bytes = DIV_ROUND_UP(nand->ecc.strength * in mtk_nfc_set_fdm()
1197 mtk_ecc_get_parity_bits(nfc->ecc), 8); in mtk_nfc_set_fdm()
1199 fdm->reg_size = chip->spare_per_sector - ecc_bytes; in mtk_nfc_set_fdm()
1200 if (fdm->reg_size > NFI_FDM_MAX_SIZE) in mtk_nfc_set_fdm()
1201 fdm->reg_size = NFI_FDM_MAX_SIZE; in mtk_nfc_set_fdm()
1204 fdm->ecc_size = 1; in mtk_nfc_set_fdm()
1210 struct nand_chip *nand = mtd_to_nand(mtd); in mtk_nfc_set_bad_mark_ctl() local
1212 if (mtd->writesize == 512) { in mtk_nfc_set_bad_mark_ctl()
1213 bm_ctl->bm_swap = mtk_nfc_no_bad_mark_swap; in mtk_nfc_set_bad_mark_ctl()
1215 bm_ctl->bm_swap = mtk_nfc_bad_mark_swap; in mtk_nfc_set_bad_mark_ctl()
1216 bm_ctl->sec = mtd->writesize / mtk_data_len(nand); in mtk_nfc_set_bad_mark_ctl()
1217 bm_ctl->pos = mtd->writesize % mtk_data_len(nand); in mtk_nfc_set_bad_mark_ctl()
1223 struct nand_chip *nand = mtd_to_nand(mtd); in mtk_nfc_set_spare_per_sector() local
1224 struct mtk_nfc *nfc = nand_get_controller_data(nand); in mtk_nfc_set_spare_per_sector()
1225 const u8 *spare = nfc->caps->spare_size; in mtk_nfc_set_spare_per_sector()
1228 eccsteps = mtd->writesize / nand->ecc.size; in mtk_nfc_set_spare_per_sector()
1229 *sps = mtd->oobsize / eccsteps; in mtk_nfc_set_spare_per_sector()
1231 if (nand->ecc.size == 1024) in mtk_nfc_set_spare_per_sector()
1235 return -EINVAL; in mtk_nfc_set_spare_per_sector()
1237 for (i = 0; i < nfc->caps->num_spare_size; i++) { in mtk_nfc_set_spare_per_sector()
1247 if (nand->ecc.size == 1024) in mtk_nfc_set_spare_per_sector()
1255 struct nand_chip *nand = mtd_to_nand(mtd); in mtk_nfc_ecc_init() local
1257 nanddev_get_ecc_requirements(&nand->base); in mtk_nfc_ecc_init()
1258 struct mtk_nfc *nfc = nand_get_controller_data(nand); in mtk_nfc_ecc_init()
1262 /* support only ecc hw mode */ in mtk_nfc_ecc_init()
1263 if (nand->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST) { in mtk_nfc_ecc_init()
1264 dev_err(dev, "ecc.engine_type not supported\n"); in mtk_nfc_ecc_init()
1265 return -EINVAL; in mtk_nfc_ecc_init()
1269 if (!nand->ecc.size || !nand->ecc.strength) { in mtk_nfc_ecc_init()
1271 nand->ecc.strength = requirements->strength; in mtk_nfc_ecc_init()
1272 nand->ecc.size = requirements->step_size; in mtk_nfc_ecc_init()
1278 if (nand->ecc.size < 1024) { in mtk_nfc_ecc_init()
1279 if (mtd->writesize > 512 && in mtk_nfc_ecc_init()
1280 nfc->caps->max_sector_size > 512) { in mtk_nfc_ecc_init()
1281 nand->ecc.size = 1024; in mtk_nfc_ecc_init()
1282 nand->ecc.strength <<= 1; in mtk_nfc_ecc_init()
1284 nand->ecc.size = 512; in mtk_nfc_ecc_init()
1287 nand->ecc.size = 1024; in mtk_nfc_ecc_init()
1294 /* calculate oob bytes except ecc parity data */ in mtk_nfc_ecc_init()
1295 free = (nand->ecc.strength * mtk_ecc_get_parity_bits(nfc->ecc) in mtk_nfc_ecc_init()
1297 free = spare - free; in mtk_nfc_ecc_init()
1300 * enhance ecc strength if oob left is bigger than max FDM size in mtk_nfc_ecc_init()
1301 * or reduce ecc strength if oob size is not enough for ecc in mtk_nfc_ecc_init()
1305 spare -= NFI_FDM_MAX_SIZE; in mtk_nfc_ecc_init()
1306 nand->ecc.strength = (spare << 3) / in mtk_nfc_ecc_init()
1307 mtk_ecc_get_parity_bits(nfc->ecc); in mtk_nfc_ecc_init()
1309 spare -= NFI_FDM_MIN_SIZE; in mtk_nfc_ecc_init()
1310 nand->ecc.strength = (spare << 3) / in mtk_nfc_ecc_init()
1311 mtk_ecc_get_parity_bits(nfc->ecc); in mtk_nfc_ecc_init()
1315 mtk_ecc_adjust_strength(nfc->ecc, &nand->ecc.strength); in mtk_nfc_ecc_init()
1318 nand->ecc.size, nand->ecc.strength); in mtk_nfc_ecc_init()
1326 struct device *dev = mtd->dev.parent; in mtk_nfc_attach_chip()
1332 if (chip->options & NAND_BUSWIDTH_16) { in mtk_nfc_attach_chip()
1334 return -EINVAL; in mtk_nfc_attach_chip()
1338 if (chip->bbt_options & NAND_BBT_USE_FLASH) in mtk_nfc_attach_chip()
1339 chip->bbt_options |= NAND_BBT_NO_OOB; in mtk_nfc_attach_chip()
1345 ret = mtk_nfc_set_spare_per_sector(&mtk_nand->spare_per_sector, mtd); in mtk_nfc_attach_chip()
1349 mtk_nfc_set_fdm(&mtk_nand->fdm, mtd); in mtk_nfc_attach_chip()
1350 mtk_nfc_set_bad_mark_ctl(&mtk_nand->bad_mark, mtd); in mtk_nfc_attach_chip()
1352 len = mtd->writesize + mtd->oobsize; in mtk_nfc_attach_chip()
1353 nfc->buffer = devm_kzalloc(dev, len, GFP_KERNEL); in mtk_nfc_attach_chip()
1354 if (!nfc->buffer) in mtk_nfc_attach_chip()
1355 return -ENOMEM; in mtk_nfc_attach_chip()
1370 struct nand_chip *nand; in mtk_nfc_nand_chip_init() local
1378 return -ENODEV; in mtk_nfc_nand_chip_init()
1383 return -EINVAL; in mtk_nfc_nand_chip_init()
1389 return -ENOMEM; in mtk_nfc_nand_chip_init()
1391 chip->nsels = nsels; in mtk_nfc_nand_chip_init()
1401 return -EINVAL; in mtk_nfc_nand_chip_init()
1404 if (test_and_set_bit(tmp, &nfc->assigned_cs)) { in mtk_nfc_nand_chip_init()
1406 return -EINVAL; in mtk_nfc_nand_chip_init()
1409 chip->sels[i] = tmp; in mtk_nfc_nand_chip_init()
1412 nand = &chip->nand; in mtk_nfc_nand_chip_init()
1413 nand->controller = &nfc->controller; in mtk_nfc_nand_chip_init()
1415 nand_set_flash_node(nand, np); in mtk_nfc_nand_chip_init()
1416 nand_set_controller_data(nand, nfc); in mtk_nfc_nand_chip_init()
1418 nand->options |= NAND_USES_DMA | NAND_SUBPAGE_READ; in mtk_nfc_nand_chip_init()
1421 nand->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST; in mtk_nfc_nand_chip_init()
1423 nand->ecc.write_subpage = mtk_nfc_write_subpage_hwecc; in mtk_nfc_nand_chip_init()
1424 nand->ecc.write_page_raw = mtk_nfc_write_page_raw; in mtk_nfc_nand_chip_init()
1425 nand->ecc.write_page = mtk_nfc_write_page_hwecc; in mtk_nfc_nand_chip_init()
1426 nand->ecc.write_oob_raw = mtk_nfc_write_oob_std; in mtk_nfc_nand_chip_init()
1427 nand->ecc.write_oob = mtk_nfc_write_oob_std; in mtk_nfc_nand_chip_init()
1429 nand->ecc.read_subpage = mtk_nfc_read_subpage_hwecc; in mtk_nfc_nand_chip_init()
1430 nand->ecc.read_page_raw = mtk_nfc_read_page_raw; in mtk_nfc_nand_chip_init()
1431 nand->ecc.read_page = mtk_nfc_read_page_hwecc; in mtk_nfc_nand_chip_init()
1432 nand->ecc.read_oob_raw = mtk_nfc_read_oob_std; in mtk_nfc_nand_chip_init()
1433 nand->ecc.read_oob = mtk_nfc_read_oob_std; in mtk_nfc_nand_chip_init()
1435 mtd = nand_to_mtd(nand); in mtk_nfc_nand_chip_init()
1436 mtd->owner = THIS_MODULE; in mtk_nfc_nand_chip_init()
1437 mtd->dev.parent = dev; in mtk_nfc_nand_chip_init()
1438 mtd->name = MTK_NAME; in mtk_nfc_nand_chip_init()
1443 ret = nand_scan(nand, nsels); in mtk_nfc_nand_chip_init()
1450 nand_cleanup(nand); in mtk_nfc_nand_chip_init()
1454 list_add_tail(&chip->node, &nfc->chips); in mtk_nfc_nand_chip_init()
1461 struct device_node *np = dev->of_node; in mtk_nfc_nand_chips_init()
1505 .compatible = "mediatek,mt2701-nfc",
1508 .compatible = "mediatek,mt2712-nfc",
1511 .compatible = "mediatek,mt7622-nfc",
1520 struct device *dev = &pdev->dev; in mtk_nfc_probe()
1521 struct device_node *np = dev->of_node; in mtk_nfc_probe()
1527 return -ENOMEM; in mtk_nfc_probe()
1529 nand_controller_init(&nfc->controller); in mtk_nfc_probe()
1530 INIT_LIST_HEAD(&nfc->chips); in mtk_nfc_probe()
1531 nfc->controller.ops = &mtk_nfc_controller_ops; in mtk_nfc_probe()
1534 nfc->ecc = of_mtk_ecc_get(np); in mtk_nfc_probe()
1535 if (IS_ERR(nfc->ecc)) in mtk_nfc_probe()
1536 return PTR_ERR(nfc->ecc); in mtk_nfc_probe()
1537 else if (!nfc->ecc) in mtk_nfc_probe()
1538 return -ENODEV; in mtk_nfc_probe()
1540 nfc->caps = of_device_get_match_data(dev); in mtk_nfc_probe()
1541 nfc->dev = dev; in mtk_nfc_probe()
1543 nfc->regs = devm_platform_ioremap_resource(pdev, 0); in mtk_nfc_probe()
1544 if (IS_ERR(nfc->regs)) { in mtk_nfc_probe()
1545 ret = PTR_ERR(nfc->regs); in mtk_nfc_probe()
1549 nfc->clk.nfi_clk = devm_clk_get(dev, "nfi_clk"); in mtk_nfc_probe()
1550 if (IS_ERR(nfc->clk.nfi_clk)) { in mtk_nfc_probe()
1552 ret = PTR_ERR(nfc->clk.nfi_clk); in mtk_nfc_probe()
1556 nfc->clk.pad_clk = devm_clk_get(dev, "pad_clk"); in mtk_nfc_probe()
1557 if (IS_ERR(nfc->clk.pad_clk)) { in mtk_nfc_probe()
1559 ret = PTR_ERR(nfc->clk.pad_clk); in mtk_nfc_probe()
1563 ret = mtk_nfc_enable_clk(dev, &nfc->clk); in mtk_nfc_probe()
1569 ret = -EINVAL; in mtk_nfc_probe()
1573 ret = devm_request_irq(dev, irq, mtk_nfc_irq, 0x0, "mtk-nand", nfc); in mtk_nfc_probe()
1589 dev_err(dev, "failed to init nand chips\n"); in mtk_nfc_probe()
1596 mtk_nfc_disable_clk(&nfc->clk); in mtk_nfc_probe()
1599 mtk_ecc_release(nfc->ecc); in mtk_nfc_probe()
1611 while (!list_empty(&nfc->chips)) { in mtk_nfc_remove()
1612 mtk_chip = list_first_entry(&nfc->chips, in mtk_nfc_remove()
1614 chip = &mtk_chip->nand; in mtk_nfc_remove()
1618 list_del(&mtk_chip->node); in mtk_nfc_remove()
1621 mtk_ecc_release(nfc->ecc); in mtk_nfc_remove()
1622 mtk_nfc_disable_clk(&nfc->clk); in mtk_nfc_remove()
1632 mtk_nfc_disable_clk(&nfc->clk); in mtk_nfc_suspend()
1641 struct nand_chip *nand; in mtk_nfc_resume() local
1647 ret = mtk_nfc_enable_clk(dev, &nfc->clk); in mtk_nfc_resume()
1651 /* reset NAND chip if VCC was powered off */ in mtk_nfc_resume()
1652 list_for_each_entry(chip, &nfc->chips, node) { in mtk_nfc_resume()
1653 nand = &chip->nand; in mtk_nfc_resume()
1654 for (i = 0; i < chip->nsels; i++) in mtk_nfc_resume()
1655 nand_reset(nand, i); in mtk_nfc_resume()
1680 MODULE_DESCRIPTION("MTK Nand Flash Controller Driver");