Lines Matching +full:no +full:- +full:blockmark +full:- +full:swap
1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
18 #include <linux/dma/mxs-dma.h>
19 #include "gpmi-nand.h"
20 #include "gpmi-regs.h"
21 #include "bch-regs.h"
24 #define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand"
52 while ((readl(addr) & mask) && --timeout) in clear_poll_bit()
96 while ((!(readl(reset_addr) & MODULE_CLKGATE)) && --timeout) in gpmi_reset_block()
116 return -ETIMEDOUT; in gpmi_reset_block()
126 clk = this->resources.clock[i]; in __gpmi_enable_clk()
141 for (; i > 0; i--) in __gpmi_enable_clk()
142 clk_disable_unprepare(this->resources.clock[i - 1]); in __gpmi_enable_clk()
148 struct resources *r = &this->resources; in gpmi_init()
151 ret = pm_runtime_get_sync(this->dev); in gpmi_init()
153 pm_runtime_put_noidle(this->dev); in gpmi_init()
157 ret = gpmi_reset_block(r->gpmi_regs, false); in gpmi_init()
165 ret = gpmi_reset_block(r->bch_regs, GPMI_IS_MXS(this)); in gpmi_init()
170 writel(BM_GPMI_CTRL1_GPMI_MODE, r->gpmi_regs + HW_GPMI_CTRL1_CLR); in gpmi_init()
174 r->gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_init()
176 /* Disable Write-Protection. */ in gpmi_init()
177 writel(BM_GPMI_CTRL1_DEV_RESET, r->gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_init()
180 writel(BM_GPMI_CTRL1_BCH_MODE, r->gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_init()
188 r->gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_init()
191 pm_runtime_mark_last_busy(this->dev); in gpmi_init()
192 pm_runtime_put_autosuspend(this->dev); in gpmi_init()
199 struct resources *r = &this->resources; in gpmi_dump_info()
200 struct bch_geometry *geo = &this->bch_geometry; in gpmi_dump_info()
204 dev_err(this->dev, "Show GPMI registers :\n"); in gpmi_dump_info()
206 reg = readl(r->gpmi_regs + i * 0x10); in gpmi_dump_info()
207 dev_err(this->dev, "offset 0x%.3x : 0x%.8x\n", i * 0x10, reg); in gpmi_dump_info()
211 dev_err(this->dev, "Show BCH registers :\n"); in gpmi_dump_info()
213 reg = readl(r->bch_regs + i * 0x10); in gpmi_dump_info()
214 dev_err(this->dev, "offset 0x%.3x : 0x%.8x\n", i * 0x10, reg); in gpmi_dump_info()
216 dev_err(this->dev, "BCH Geometry :\n" in gpmi_dump_info()
229 geo->gf_len, in gpmi_dump_info()
230 geo->ecc_strength, in gpmi_dump_info()
231 geo->page_size, in gpmi_dump_info()
232 geo->metadata_size, in gpmi_dump_info()
233 geo->ecc0_chunk_size, in gpmi_dump_info()
234 geo->eccn_chunk_size, in gpmi_dump_info()
235 geo->ecc_chunk_count, in gpmi_dump_info()
236 geo->payload_size, in gpmi_dump_info()
237 geo->auxiliary_size, in gpmi_dump_info()
238 geo->auxiliary_status_offset, in gpmi_dump_info()
239 geo->block_mark_byte_offset, in gpmi_dump_info()
240 geo->block_mark_bit_offset); in gpmi_dump_info()
245 struct nand_chip *chip = &this->nand; in gpmi_check_ecc()
246 struct bch_geometry *geo = &this->bch_geometry; in gpmi_check_ecc()
247 struct nand_device *nand = &chip->base; in gpmi_check_ecc()
248 struct nand_ecc_props *conf = &nand->ecc.ctx.conf; in gpmi_check_ecc()
250 conf->step_size = geo->eccn_chunk_size; in gpmi_check_ecc()
251 conf->strength = geo->ecc_strength; in gpmi_check_ecc()
256 if (geo->gf_len == 14) in gpmi_check_ecc()
260 if (geo->ecc_strength > this->devdata->bch_max_ecc_strength) in gpmi_check_ecc()
273 struct bch_geometry *geo = &this->bch_geometry; in bbm_in_data_chunk()
274 struct nand_chip *chip = &this->nand; in bbm_in_data_chunk()
278 if (geo->ecc0_chunk_size != geo->eccn_chunk_size) { in bbm_in_data_chunk()
279 dev_err(this->dev, in bbm_in_data_chunk()
284 i = (mtd->writesize * 8 - geo->metadata_size * 8) / in bbm_in_data_chunk()
285 (geo->gf_len * geo->ecc_strength + in bbm_in_data_chunk()
286 geo->eccn_chunk_size * 8); in bbm_in_data_chunk()
288 j = (mtd->writesize * 8 - geo->metadata_size * 8) - in bbm_in_data_chunk()
289 (geo->gf_len * geo->ecc_strength + in bbm_in_data_chunk()
290 geo->eccn_chunk_size * 8) * i; in bbm_in_data_chunk()
292 if (j < geo->eccn_chunk_size * 8) { in bbm_in_data_chunk()
294 dev_dbg(this->dev, "Set ecc to %d and bbm in chunk %d\n", in bbm_in_data_chunk()
295 geo->ecc_strength, *chunk_num); in bbm_in_data_chunk()
312 struct bch_geometry *geo = &this->bch_geometry; in set_geometry_by_ecc_info()
313 struct nand_chip *chip = &this->nand; in set_geometry_by_ecc_info()
319 geo->gf_len = 13; in set_geometry_by_ecc_info()
322 geo->gf_len = 14; in set_geometry_by_ecc_info()
325 dev_err(this->dev, in set_geometry_by_ecc_info()
327 nanddev_get_ecc_requirements(&chip->base)->strength, in set_geometry_by_ecc_info()
328 nanddev_get_ecc_requirements(&chip->base)->step_size); in set_geometry_by_ecc_info()
329 return -EINVAL; in set_geometry_by_ecc_info()
331 geo->ecc0_chunk_size = ecc_step; in set_geometry_by_ecc_info()
332 geo->eccn_chunk_size = ecc_step; in set_geometry_by_ecc_info()
333 geo->ecc_strength = round_up(ecc_strength, 2); in set_geometry_by_ecc_info()
335 return -EINVAL; in set_geometry_by_ecc_info()
338 if (geo->eccn_chunk_size < mtd->oobsize) { in set_geometry_by_ecc_info()
339 dev_err(this->dev, in set_geometry_by_ecc_info()
341 ecc_step, mtd->oobsize); in set_geometry_by_ecc_info()
342 return -EINVAL; in set_geometry_by_ecc_info()
346 geo->metadata_size = 10; in set_geometry_by_ecc_info()
348 geo->ecc_chunk_count = mtd->writesize / geo->eccn_chunk_size; in set_geometry_by_ecc_info()
354 * |<----------------------------------------------------->| in set_geometry_by_ecc_info()
358 * |<-------------------------------------------->| D | | O' | in set_geometry_by_ecc_info()
359 * | |<---->| |<--->| in set_geometry_by_ecc_info()
361 * +---+----------+-+----------+-+----------+-+----------+-+-----+ in set_geometry_by_ecc_info()
363 * +---+----------+-+----------+-+----------+-+----------+-+-----+ in set_geometry_by_ecc_info()
366 * |<------------>| in set_geometry_by_ecc_info()
382 * P = ------------ + P' + M in set_geometry_by_ecc_info()
385 * The position of block mark moves forward in the ECC-based view in set_geometry_by_ecc_info()
388 * E * G * (N - 1) in set_geometry_by_ecc_info()
389 * D = (---------------- + M) in set_geometry_by_ecc_info()
394 * So the bit position of the physical block mark within the ECC-based in set_geometry_by_ecc_info()
396 * (P' - D) * 8 in set_geometry_by_ecc_info()
398 geo->page_size = mtd->writesize + geo->metadata_size + in set_geometry_by_ecc_info()
399 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8; in set_geometry_by_ecc_info()
401 geo->payload_size = mtd->writesize; in set_geometry_by_ecc_info()
403 geo->auxiliary_status_offset = ALIGN(geo->metadata_size, 4); in set_geometry_by_ecc_info()
404 geo->auxiliary_size = ALIGN(geo->metadata_size, 4) in set_geometry_by_ecc_info()
405 + ALIGN(geo->ecc_chunk_count, 4); in set_geometry_by_ecc_info()
407 if (!this->swap_block_mark) in set_geometry_by_ecc_info()
410 /* For bit swap. */ in set_geometry_by_ecc_info()
411 block_mark_bit_offset = mtd->writesize * 8 - in set_geometry_by_ecc_info()
412 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1) in set_geometry_by_ecc_info()
413 + geo->metadata_size * 8); in set_geometry_by_ecc_info()
415 geo->block_mark_byte_offset = block_mark_bit_offset / 8; in set_geometry_by_ecc_info()
416 geo->block_mark_bit_offset = block_mark_bit_offset % 8; in set_geometry_by_ecc_info()
430 * ------------ <= (O - M)
434 * (O - M) * 8
435 * E <= -------------
440 struct bch_geometry *geo = &this->bch_geometry; in get_ecc_strength()
441 struct mtd_info *mtd = nand_to_mtd(&this->nand); in get_ecc_strength()
444 ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8) in get_ecc_strength()
445 / (geo->gf_len * geo->ecc_chunk_count); in get_ecc_strength()
453 struct bch_geometry *geo = &this->bch_geometry; in set_geometry_for_large_oob()
454 struct nand_chip *chip = &this->nand; in set_geometry_for_large_oob()
457 nanddev_get_ecc_requirements(&chip->base); in set_geometry_for_large_oob()
464 if (!(requirements->strength > 0 && in set_geometry_for_large_oob()
465 requirements->step_size > 0)) in set_geometry_for_large_oob()
466 return -EINVAL; in set_geometry_for_large_oob()
467 geo->ecc_strength = requirements->strength; in set_geometry_for_large_oob()
471 dev_err(this->dev, in set_geometry_for_large_oob()
473 geo->ecc_strength); in set_geometry_for_large_oob()
474 return -EINVAL; in set_geometry_for_large_oob()
478 geo->metadata_size = 10; in set_geometry_for_large_oob()
479 geo->gf_len = 14; in set_geometry_for_large_oob()
480 geo->ecc0_chunk_size = 1024; in set_geometry_for_large_oob()
481 geo->eccn_chunk_size = 1024; in set_geometry_for_large_oob()
482 geo->ecc_chunk_count = mtd->writesize / geo->eccn_chunk_size; in set_geometry_for_large_oob()
484 this->devdata->bch_max_ecc_strength); in set_geometry_for_large_oob()
490 geo->ecc_strength = max_ecc; in set_geometry_for_large_oob()
491 while (!(geo->ecc_strength < requirements->strength)) { in set_geometry_for_large_oob()
494 geo->ecc_strength -= 2; in set_geometry_for_large_oob()
499 geo->ecc_strength = requirements->strength; in set_geometry_for_large_oob()
501 geo->ecc0_chunk_size = 0; in set_geometry_for_large_oob()
502 geo->ecc_chunk_count = (mtd->writesize / geo->eccn_chunk_size) + 1; in set_geometry_for_large_oob()
503 geo->ecc_for_meta = 1; in set_geometry_for_large_oob()
505 if (mtd->oobsize * 8 < geo->metadata_size * 8 + in set_geometry_for_large_oob()
506 geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) { in set_geometry_for_large_oob()
507 dev_err(this->dev, "unsupported NAND chip with new layout\n"); in set_geometry_for_large_oob()
508 return -EINVAL; in set_geometry_for_large_oob()
512 bbm_chunk = (mtd->writesize * 8 - geo->metadata_size * 8 - in set_geometry_for_large_oob()
513 geo->gf_len * geo->ecc_strength) / in set_geometry_for_large_oob()
514 (geo->gf_len * geo->ecc_strength + in set_geometry_for_large_oob()
515 geo->eccn_chunk_size * 8) + 1; in set_geometry_for_large_oob()
519 geo->page_size = mtd->writesize + geo->metadata_size + in set_geometry_for_large_oob()
520 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8; in set_geometry_for_large_oob()
521 geo->payload_size = mtd->writesize; in set_geometry_for_large_oob()
525 * metadata is padded to the nearest 32-bit boundary. The ECC status in set_geometry_for_large_oob()
527 * nearest 32-bit boundary. in set_geometry_for_large_oob()
529 geo->auxiliary_status_offset = ALIGN(geo->metadata_size, 4); in set_geometry_for_large_oob()
530 geo->auxiliary_size = ALIGN(geo->metadata_size, 4) in set_geometry_for_large_oob()
531 + ALIGN(geo->ecc_chunk_count, 4); in set_geometry_for_large_oob()
533 if (!this->swap_block_mark) in set_geometry_for_large_oob()
537 i = (mtd->writesize / geo->eccn_chunk_size) - bbm_chunk + 1; in set_geometry_for_large_oob()
539 block_mark_bit_offset = mtd->writesize * 8 - in set_geometry_for_large_oob()
540 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - i) in set_geometry_for_large_oob()
541 + geo->metadata_size * 8); in set_geometry_for_large_oob()
543 geo->block_mark_byte_offset = block_mark_bit_offset / 8; in set_geometry_for_large_oob()
544 geo->block_mark_bit_offset = block_mark_bit_offset % 8; in set_geometry_for_large_oob()
546 dev_dbg(this->dev, "BCH Geometry :\n" in set_geometry_for_large_oob()
561 geo->gf_len, in set_geometry_for_large_oob()
562 geo->ecc_strength, in set_geometry_for_large_oob()
563 geo->page_size, in set_geometry_for_large_oob()
564 geo->metadata_size, in set_geometry_for_large_oob()
565 geo->ecc0_chunk_size, in set_geometry_for_large_oob()
566 geo->eccn_chunk_size, in set_geometry_for_large_oob()
567 geo->ecc_chunk_count, in set_geometry_for_large_oob()
568 geo->payload_size, in set_geometry_for_large_oob()
569 geo->auxiliary_size, in set_geometry_for_large_oob()
570 geo->auxiliary_status_offset, in set_geometry_for_large_oob()
571 geo->block_mark_byte_offset, in set_geometry_for_large_oob()
572 geo->block_mark_bit_offset, in set_geometry_for_large_oob()
574 geo->ecc_for_meta); in set_geometry_for_large_oob()
581 struct bch_geometry *geo = &this->bch_geometry; in legacy_set_geometry()
582 struct mtd_info *mtd = nand_to_mtd(&this->nand); in legacy_set_geometry()
592 geo->metadata_size = 10; in legacy_set_geometry()
595 geo->gf_len = 13; in legacy_set_geometry()
598 geo->ecc0_chunk_size = 512; in legacy_set_geometry()
599 geo->eccn_chunk_size = 512; in legacy_set_geometry()
600 while (geo->eccn_chunk_size < mtd->oobsize) { in legacy_set_geometry()
601 geo->ecc0_chunk_size *= 2; /* keep C >= O */ in legacy_set_geometry()
602 geo->eccn_chunk_size *= 2; /* keep C >= O */ in legacy_set_geometry()
603 geo->gf_len = 14; in legacy_set_geometry()
606 geo->ecc_chunk_count = mtd->writesize / geo->eccn_chunk_size; in legacy_set_geometry()
609 geo->ecc_strength = get_ecc_strength(this); in legacy_set_geometry()
611 dev_err(this->dev, in legacy_set_geometry()
614 geo->ecc_strength, in legacy_set_geometry()
615 this->devdata->bch_max_ecc_strength); in legacy_set_geometry()
616 return -EINVAL; in legacy_set_geometry()
619 geo->page_size = mtd->writesize + geo->metadata_size + in legacy_set_geometry()
620 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8; in legacy_set_geometry()
621 geo->payload_size = mtd->writesize; in legacy_set_geometry()
625 * metadata is padded to the nearest 32-bit boundary. The ECC status in legacy_set_geometry()
627 * nearest 32-bit boundary. in legacy_set_geometry()
629 metadata_size = ALIGN(geo->metadata_size, 4); in legacy_set_geometry()
630 status_size = ALIGN(geo->ecc_chunk_count, 4); in legacy_set_geometry()
632 geo->auxiliary_size = metadata_size + status_size; in legacy_set_geometry()
633 geo->auxiliary_status_offset = metadata_size; in legacy_set_geometry()
635 if (!this->swap_block_mark) in legacy_set_geometry()
640 * the physical block mark within the ECC-based view of the page. in legacy_set_geometry()
646 * |<---->| in legacy_set_geometry()
648 * +---+----------+-+----------+-+----------+-+----------+-+ in legacy_set_geometry()
650 * +---+----------+-+----------+-+----------+-+----------+-+ in legacy_set_geometry()
652 * The position of block mark moves forward in the ECC-based view in legacy_set_geometry()
655 * E * G * (N - 1) in legacy_set_geometry()
656 * D = (---------------- + M) in legacy_set_geometry()
664 * E * G (O - M) C - M C - M in legacy_set_geometry()
665 * ----------- <= ------- <= -------- < --------- in legacy_set_geometry()
666 * 8 N N (N - 1) in legacy_set_geometry()
670 * E * G * (N - 1) in legacy_set_geometry()
671 * D = (---------------- + M) < C in legacy_set_geometry()
675 * within the ECC-based view of the page is still in the data chunk, in legacy_set_geometry()
679 * physical block mark within the ECC-based view of the page: in legacy_set_geometry()
680 * (page_size - D) * 8 in legacy_set_geometry()
682 * --Huang Shijie in legacy_set_geometry()
684 block_mark_bit_offset = mtd->writesize * 8 - in legacy_set_geometry()
685 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1) in legacy_set_geometry()
686 + geo->metadata_size * 8); in legacy_set_geometry()
688 geo->block_mark_byte_offset = block_mark_bit_offset / 8; in legacy_set_geometry()
689 geo->block_mark_bit_offset = block_mark_bit_offset % 8; in legacy_set_geometry()
695 struct nand_chip *chip = &this->nand; in common_nfc_set_geometry()
696 struct mtd_info *mtd = nand_to_mtd(&this->nand); in common_nfc_set_geometry()
698 nanddev_get_ecc_requirements(&chip->base); in common_nfc_set_geometry()
702 use_minimun_ecc = of_property_read_bool(this->dev->of_node, in common_nfc_set_geometry()
703 "fsl,use-minimum-ecc"); in common_nfc_set_geometry()
706 if ((!use_minimun_ecc && mtd->oobsize < 1024) || in common_nfc_set_geometry()
707 !(requirements->strength > 0 && requirements->step_size > 0)) { in common_nfc_set_geometry()
708 dev_dbg(this->dev, "use legacy bch geometry\n"); in common_nfc_set_geometry()
715 if (mtd->oobsize > 1024) { in common_nfc_set_geometry()
716 dev_dbg(this->dev, "use large oob bch geometry\n"); in common_nfc_set_geometry()
723 dev_dbg(this->dev, "use minimum ecc bch geometry\n"); in common_nfc_set_geometry()
724 err = set_geometry_by_ecc_info(this, requirements->strength, in common_nfc_set_geometry()
725 requirements->step_size); in common_nfc_set_geometry()
727 dev_err(this->dev, "none of the bch geometry setting works\n"); in common_nfc_set_geometry()
735 struct resources *r = &this->resources; in bch_set_geometry()
742 ret = pm_runtime_get_sync(this->dev); in bch_set_geometry()
744 pm_runtime_put_autosuspend(this->dev); in bch_set_geometry()
753 ret = gpmi_reset_block(r->bch_regs, GPMI_IS_MXS(this)); in bch_set_geometry()
758 writel(0, r->bch_regs + HW_BCH_LAYOUTSELECT); in bch_set_geometry()
762 pm_runtime_mark_last_busy(this->dev); in bch_set_geometry()
763 pm_runtime_put_autosuspend(this->dev); in bch_set_geometry()
769 * <1> Firstly, we should know what's the GPMI-clock means.
770 * The GPMI-clock is the internal clock in the gpmi nand controller.
771 * If you set 100MHz to gpmi nand controller, the GPMI-clock's period
772 * is 10ns. Mark the GPMI-clock's period as GPMI-clock-period.
775 * The frequency on the nand chip pins is derived from the GPMI-clock.
794 * |<---tREA---->|
797 * |<--tRP-->| |
802 * /---------\
803 * Read Data --------------< >---------
804 * \---------/
806 * |<-D->|
816 * Delay = (tREA + C - tRP) {1}
821 * tRP = (GPMI-clock-period) * DATA_SETUP
827 * if (GPMI-clock-period > DLL_THRETHOLD)
828 * RP = GPMI-clock-period / 2;
830 * RP = GPMI-clock-period;
832 * Set the HW_GPMI_CTRL1:HALF_PERIOD if GPMI-clock-period
838 * (tREA + 4000 - tRP) * 8
839 * RDN_DELAY = ----------------------- {3}
845 struct gpmi_nfc_hardware_timing *hw = &this->hw; in gpmi_nfc_compute_timings()
846 struct resources *r = &this->resources; in gpmi_nfc_compute_timings()
847 unsigned int dll_threshold_ps = this->devdata->max_chain_delay; in gpmi_nfc_compute_timings()
858 if (sdr->tRC_min >= 30000) { in gpmi_nfc_compute_timings()
859 /* ONFI non-EDO modes [0-3] */ in gpmi_nfc_compute_timings()
860 hw->clk_rate = 22000000; in gpmi_nfc_compute_timings()
863 } else if (sdr->tRC_min >= 25000) { in gpmi_nfc_compute_timings()
865 hw->clk_rate = 80000000; in gpmi_nfc_compute_timings()
870 hw->clk_rate = 100000000; in gpmi_nfc_compute_timings()
875 clk_rate = clk_round_rate(r->clock[0], hw->clk_rate); in gpmi_nfc_compute_timings()
877 dev_err(this->dev, "clock setting: expected %ld, got %ld\n", in gpmi_nfc_compute_timings()
878 hw->clk_rate, clk_rate); in gpmi_nfc_compute_timings()
879 return -ENOTSUPP; in gpmi_nfc_compute_timings()
882 hw->clk_rate = clk_rate; in gpmi_nfc_compute_timings()
884 period_ps = div_u64((u64)NSEC_PER_SEC * 1000, hw->clk_rate); in gpmi_nfc_compute_timings()
886 addr_setup_cycles = TO_CYCLES(sdr->tALS_min, period_ps); in gpmi_nfc_compute_timings()
887 data_setup_cycles = TO_CYCLES(sdr->tDS_min, period_ps); in gpmi_nfc_compute_timings()
888 data_hold_cycles = TO_CYCLES(sdr->tDH_min, period_ps); in gpmi_nfc_compute_timings()
889 busy_timeout_ps = max(sdr->tBERS_max, sdr->tPROG_max); in gpmi_nfc_compute_timings()
892 hw->timing0 = BF_GPMI_TIMING0_ADDRESS_SETUP(addr_setup_cycles) | in gpmi_nfc_compute_timings()
895 hw->timing1 = BF_GPMI_TIMING1_BUSY_TIMEOUT(DIV_ROUND_UP(busy_timeout_cycles, 4096)); in gpmi_nfc_compute_timings()
900 * (tREA + 4000 - tRP) * 8 in gpmi_nfc_compute_timings()
901 * RDN_DELAY = ----------------------- in gpmi_nfc_compute_timings()
913 sample_delay_ps = (sdr->tREA_max + 4000 - tRP_ps) * 8; in gpmi_nfc_compute_timings()
919 hw->ctrl1n = BF_GPMI_CTRL1_WRN_DLY_SEL(wrn_dly_sel); in gpmi_nfc_compute_timings()
921 hw->ctrl1n |= BF_GPMI_CTRL1_RDN_DELAY(sample_delay_factor) | in gpmi_nfc_compute_timings()
929 struct gpmi_nfc_hardware_timing *hw = &this->hw; in gpmi_nfc_apply_timings()
930 struct resources *r = &this->resources; in gpmi_nfc_apply_timings()
931 void __iomem *gpmi_regs = r->gpmi_regs; in gpmi_nfc_apply_timings()
940 clk_disable_unprepare(r->clock[0]); in gpmi_nfc_apply_timings()
942 ret = clk_set_rate(r->clock[0], hw->clk_rate); in gpmi_nfc_apply_timings()
944 dev_err(this->dev, "cannot set clock rate to %lu Hz: %d\n", hw->clk_rate, ret); in gpmi_nfc_apply_timings()
949 ret = clk_prepare_enable(r->clock[0]); in gpmi_nfc_apply_timings()
954 writel(hw->timing0, gpmi_regs + HW_GPMI_TIMING0); in gpmi_nfc_apply_timings()
955 writel(hw->timing1, gpmi_regs + HW_GPMI_TIMING1); in gpmi_nfc_apply_timings()
962 writel(hw->ctrl1n, gpmi_regs + HW_GPMI_CTRL1_SET); in gpmi_nfc_apply_timings()
965 dll_wait_time_us = USEC_PER_SEC / hw->clk_rate * 64; in gpmi_nfc_apply_timings()
988 if (sdr->tRC_min <= 25000 && !GPMI_IS_MX28(this) && !GPMI_IS_MX6(this)) in gpmi_setup_interface()
989 return -ENOTSUPP; in gpmi_setup_interface()
1000 this->hw.must_apply_timings = true; in gpmi_setup_interface()
1008 struct resources *r = &this->resources; in gpmi_clear_bch()
1009 writel(BM_BCH_CTRL_COMPLETE_IRQ, r->bch_regs + HW_BCH_CTRL_CLR); in gpmi_clear_bch()
1015 return this->dma_chans[0]; in get_dma_chan()
1022 struct completion *dma_c = &this->dma_done; in dma_irq_callback()
1032 complete(&this->bch_done); in bch_irq()
1042 if (this->bch) in gpmi_raw_len_to_len()
1043 return ALIGN_DOWN(raw_len, this->bch_geometry.eccn_chunk_size); in gpmi_raw_len_to_len()
1059 ret = dma_map_sg(this->dev, sgl, 1, dr); in prepare_data_dma()
1068 sg_init_one(sgl, this->data_buffer_dma, len); in prepare_data_dma()
1070 if (dr == DMA_TO_DEVICE && buf != this->data_buffer_dma) in prepare_data_dma()
1071 memcpy(this->data_buffer_dma, buf, len); in prepare_data_dma()
1073 dma_map_sg(this->dev, sgl, 1, dr); in prepare_data_dma()
1096 struct bch_geometry *geo = &this->bch_geometry; in gpmi_ooblayout_ecc()
1099 return -ERANGE; in gpmi_ooblayout_ecc()
1101 oobregion->offset = 0; in gpmi_ooblayout_ecc()
1102 oobregion->length = geo->page_size - mtd->writesize; in gpmi_ooblayout_ecc()
1112 struct bch_geometry *geo = &this->bch_geometry; in gpmi_ooblayout_free()
1115 return -ERANGE; in gpmi_ooblayout_free()
1118 if (geo->page_size < mtd->writesize + mtd->oobsize) { in gpmi_ooblayout_free()
1119 oobregion->offset = geo->page_size - mtd->writesize; in gpmi_ooblayout_free()
1120 oobregion->length = mtd->oobsize - oobregion->offset; in gpmi_ooblayout_free()
1186 struct platform_device *pdev = this->pdev; in acquire_register_block()
1187 struct resources *res = &this->resources; in acquire_register_block()
1195 res->gpmi_regs = p; in acquire_register_block()
1197 res->bch_regs = p; in acquire_register_block()
1199 dev_err(this->dev, "unknown resource name : %s\n", res_name); in acquire_register_block()
1206 struct platform_device *pdev = this->pdev; in acquire_bch_irq()
1214 err = devm_request_irq(this->dev, err, irq_h, 0, res_name, this); in acquire_bch_irq()
1216 dev_err(this->dev, "error requesting BCH IRQ\n"); in acquire_bch_irq()
1225 if (this->dma_chans[i]) { in release_dma_channels()
1226 dma_release_channel(this->dma_chans[i]); in release_dma_channels()
1227 this->dma_chans[i] = NULL; in release_dma_channels()
1233 struct platform_device *pdev = this->pdev; in acquire_dma_channels()
1238 dma_chan = dma_request_chan(&pdev->dev, "rx-tx"); in acquire_dma_channels()
1240 ret = dev_err_probe(this->dev, PTR_ERR(dma_chan), in acquire_dma_channels()
1244 this->dma_chans[0] = dma_chan; in acquire_dma_channels()
1252 struct resources *r = &this->resources; in gpmi_get_clks()
1256 for (i = 0; i < this->devdata->clks_count; i++) { in gpmi_get_clks()
1257 clk = devm_clk_get(this->dev, this->devdata->clks[i]); in gpmi_get_clks()
1263 r->clock[i] = clk; in gpmi_get_clks()
1269 dev_dbg(this->dev, "failed in finding the clocks.\n"); in gpmi_get_clks()
1311 struct device *dev = this->dev; in gpmi_free_dma_buffer()
1312 struct bch_geometry *geo = &this->bch_geometry; in gpmi_free_dma_buffer()
1314 if (this->auxiliary_virt && virt_addr_valid(this->auxiliary_virt)) in gpmi_free_dma_buffer()
1315 dma_free_coherent(dev, geo->auxiliary_size, in gpmi_free_dma_buffer()
1316 this->auxiliary_virt, in gpmi_free_dma_buffer()
1317 this->auxiliary_phys); in gpmi_free_dma_buffer()
1318 kfree(this->data_buffer_dma); in gpmi_free_dma_buffer()
1319 kfree(this->raw_buffer); in gpmi_free_dma_buffer()
1321 this->data_buffer_dma = NULL; in gpmi_free_dma_buffer()
1322 this->raw_buffer = NULL; in gpmi_free_dma_buffer()
1328 struct bch_geometry *geo = &this->bch_geometry; in gpmi_alloc_dma_buffer()
1329 struct device *dev = this->dev; in gpmi_alloc_dma_buffer()
1330 struct mtd_info *mtd = nand_to_mtd(&this->nand); in gpmi_alloc_dma_buffer()
1340 this->data_buffer_dma = kzalloc(mtd->writesize ?: PAGE_SIZE, in gpmi_alloc_dma_buffer()
1342 if (this->data_buffer_dma == NULL) in gpmi_alloc_dma_buffer()
1345 this->auxiliary_virt = dma_alloc_coherent(dev, geo->auxiliary_size, in gpmi_alloc_dma_buffer()
1346 &this->auxiliary_phys, GFP_DMA); in gpmi_alloc_dma_buffer()
1347 if (!this->auxiliary_virt) in gpmi_alloc_dma_buffer()
1350 this->raw_buffer = kzalloc((mtd->writesize ?: PAGE_SIZE) + mtd->oobsize, GFP_KERNEL); in gpmi_alloc_dma_buffer()
1351 if (!this->raw_buffer) in gpmi_alloc_dma_buffer()
1358 return -ENOMEM; in gpmi_alloc_dma_buffer()
1369 struct bch_geometry *nfc_geo = &this->bch_geometry; in block_mark_swapping()
1377 if (!this->swap_block_mark) in block_mark_swapping()
1384 bit = nfc_geo->block_mark_bit_offset; in block_mark_swapping()
1385 p = payload + nfc_geo->block_mark_byte_offset; in block_mark_swapping()
1394 from_data = (p[0] >> bit) | (p[1] << (8 - bit)); in block_mark_swapping()
1399 /* Swap them. */ in block_mark_swapping()
1402 mask = (0x1 << bit) - 1; in block_mark_swapping()
1406 p[1] = (p[1] & mask) | (from_oob >> (8 - bit)); in block_mark_swapping()
1413 struct bch_geometry *nfc_geo = &this->bch_geometry; in gpmi_count_bitflips()
1420 status = this->auxiliary_virt + ALIGN(meta, 4); in gpmi_count_bitflips()
1427 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; in gpmi_count_bitflips()
1428 u8 *eccbuf = this->raw_buffer; in gpmi_count_bitflips()
1434 offset = nfc_geo->metadata_size * 8; in gpmi_count_bitflips()
1435 offset += ((8 * nfc_geo->eccn_chunk_size) + eccbits) * (i + 1); in gpmi_count_bitflips()
1436 offset -= eccbits; in gpmi_count_bitflips()
1440 eccbytes -= offset; in gpmi_count_bitflips()
1446 * in-band data in the first and last byte of in gpmi_count_bitflips()
1447 * eccbuf. Set non-eccbits to one so that in gpmi_count_bitflips()
1452 eccbuf[0] |= GENMASK(bitoffset - 1, 0); in gpmi_count_bitflips()
1456 eccbuf[eccbytes - 1] |= GENMASK(7, bitoffset); in gpmi_count_bitflips()
1472 buf + i * nfc_geo->eccn_chunk_size, in gpmi_count_bitflips()
1473 nfc_geo->eccn_chunk_size, in gpmi_count_bitflips()
1475 this->auxiliary_virt, in gpmi_count_bitflips()
1476 nfc_geo->metadata_size, in gpmi_count_bitflips()
1477 nfc_geo->ecc_strength); in gpmi_count_bitflips()
1480 buf + i * nfc_geo->eccn_chunk_size, in gpmi_count_bitflips()
1481 nfc_geo->eccn_chunk_size, in gpmi_count_bitflips()
1484 nfc_geo->ecc_strength); in gpmi_count_bitflips()
1490 mtd->ecc_stats.corrected += flips; in gpmi_count_bitflips()
1494 mtd->ecc_stats.failed++; in gpmi_count_bitflips()
1498 mtd->ecc_stats.corrected += *status; in gpmi_count_bitflips()
1507 struct bch_geometry *geo = &this->bch_geometry; in gpmi_bch_layout_std()
1508 unsigned int ecc_strength = geo->ecc_strength >> 1; in gpmi_bch_layout_std()
1509 unsigned int gf_len = geo->gf_len; in gpmi_bch_layout_std()
1510 unsigned int block0_size = geo->ecc0_chunk_size; in gpmi_bch_layout_std()
1511 unsigned int blockn_size = geo->eccn_chunk_size; in gpmi_bch_layout_std()
1513 this->bch_flashlayout0 = in gpmi_bch_layout_std()
1514 BF_BCH_FLASH0LAYOUT0_NBLOCKS(geo->ecc_chunk_count - 1) | in gpmi_bch_layout_std()
1515 BF_BCH_FLASH0LAYOUT0_META_SIZE(geo->metadata_size) | in gpmi_bch_layout_std()
1520 this->bch_flashlayout1 = in gpmi_bch_layout_std()
1521 BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(geo->page_size) | in gpmi_bch_layout_std()
1532 struct bch_geometry *geo = &this->bch_geometry; in gpmi_ecc_read_page()
1537 this->bch = true; in gpmi_ecc_read_page()
1539 ret = nand_read_page_op(chip, page, 0, buf, geo->page_size); in gpmi_ecc_read_page()
1544 geo->ecc_chunk_count, in gpmi_ecc_read_page()
1545 geo->auxiliary_status_offset); in gpmi_ecc_read_page()
1548 block_mark_swapping(this, buf, this->auxiliary_virt); in gpmi_ecc_read_page()
1561 memset(chip->oob_poi, ~0, mtd->oobsize); in gpmi_ecc_read_page()
1562 chip->oob_poi[0] = ((uint8_t *)this->auxiliary_virt)[0]; in gpmi_ecc_read_page()
1573 struct bch_geometry *geo = &this->bch_geometry; in gpmi_ecc_read_subpage()
1574 int size = chip->ecc.size; /* ECC chunk size */ in gpmi_ecc_read_subpage()
1584 ecc_parity_size = geo->gf_len * geo->ecc_strength / 8; in gpmi_ecc_read_subpage()
1588 last = (offs + len - 1) / size; in gpmi_ecc_read_subpage()
1590 if (this->swap_block_mark) { in gpmi_ecc_read_subpage()
1598 marker_pos = geo->block_mark_byte_offset / size; in gpmi_ecc_read_subpage()
1600 dev_dbg(this->dev, in gpmi_ecc_read_subpage()
1609 * - need to add an extra ECC size when calculating col and page_size, in gpmi_ecc_read_subpage()
1611 * - ecc0_chunk size need to set to the same size as other chunks, in gpmi_ecc_read_subpage()
1615 meta = geo->metadata_size; in gpmi_ecc_read_subpage()
1617 if (geo->ecc_for_meta) in gpmi_ecc_read_subpage()
1627 ecc_parity_size = geo->gf_len * geo->ecc_strength / 8; in gpmi_ecc_read_subpage()
1628 n = last - first + 1; in gpmi_ecc_read_subpage()
1630 if (geo->ecc_for_meta && meta) in gpmi_ecc_read_subpage()
1636 ecc_strength = geo->ecc_strength >> 1; in gpmi_ecc_read_subpage()
1638 this->bch_flashlayout0 = BF_BCH_FLASH0LAYOUT0_NBLOCKS( in gpmi_ecc_read_subpage()
1639 (geo->ecc_for_meta ? n : n - 1)) | in gpmi_ecc_read_subpage()
1642 BF_BCH_FLASH0LAYOUT0_GF(geo->gf_len, this) | in gpmi_ecc_read_subpage()
1643 BF_BCH_FLASH0LAYOUT0_DATA0_SIZE((geo->ecc_for_meta ? in gpmi_ecc_read_subpage()
1644 0 : geo->ecc0_chunk_size), this); in gpmi_ecc_read_subpage()
1646 this->bch_flashlayout1 = BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(page_size) | in gpmi_ecc_read_subpage()
1648 BF_BCH_FLASH0LAYOUT1_GF(geo->gf_len, this) | in gpmi_ecc_read_subpage()
1649 BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(geo->eccn_chunk_size, this); in gpmi_ecc_read_subpage()
1651 this->bch = true; in gpmi_ecc_read_subpage()
1657 dev_dbg(this->dev, "page:%d(%d:%d)%d, chunk:(%d:%d), BCH PG size:%d\n", in gpmi_ecc_read_subpage()
1670 struct bch_geometry *nfc_geo = &this->bch_geometry; in gpmi_ecc_write_page()
1672 dev_dbg(this->dev, "ecc write page.\n"); in gpmi_ecc_write_page()
1675 this->bch = true; in gpmi_ecc_write_page()
1677 memcpy(this->auxiliary_virt, chip->oob_poi, nfc_geo->auxiliary_size); in gpmi_ecc_write_page()
1679 if (this->swap_block_mark) { in gpmi_ecc_write_page()
1684 memcpy(this->data_buffer_dma, buf, mtd->writesize); in gpmi_ecc_write_page()
1685 buf = this->data_buffer_dma; in gpmi_ecc_write_page()
1686 block_mark_swapping(this, this->data_buffer_dma, in gpmi_ecc_write_page()
1687 this->auxiliary_virt); in gpmi_ecc_write_page()
1690 return nand_prog_page_op(chip, page, 0, buf, nfc_geo->page_size); in gpmi_ecc_write_page()
1704 * true state of the block mark, no matter where that block mark appears in
1707 * 3) ECC-based read operations return an OOB full of set bits (since we never
1708 * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads
1719 * 1) Are we doing a "raw" read, or an ECC-based read?
1725 * | Raw | ECC-based |
1726 * -------------+-------------------------+-------------------------+
1732 * -------------+-------------------------+ return it in a buffer |
1740 * -------------+-------------------------+-------------------------+
1747 * It turns out that knowing whether we want an "ECC-based" or "raw" read is not
1750 * ECC-based or raw view of the page is implicit in which function it calls
1751 * (there is a similar pair of ECC-based/raw functions for writing).
1760 memset(chip->oob_poi, ~0, mtd->oobsize); in gpmi_ecc_read_oob()
1763 ret = nand_read_page_op(chip, page, mtd->writesize, chip->oob_poi, in gpmi_ecc_read_oob()
1764 mtd->oobsize); in gpmi_ecc_read_oob()
1770 * non-transcribing case (!GPMI_IS_MX23()), we already have it. in gpmi_ecc_read_oob()
1775 ret = nand_read_page_op(chip, page, 0, chip->oob_poi, 1); in gpmi_ecc_read_oob()
1791 return -EPERM; in gpmi_ecc_write_oob()
1794 return -EPERM; in gpmi_ecc_write_oob()
1796 return nand_prog_page_op(chip, page, mtd->writesize + of.offset, in gpmi_ecc_write_oob()
1797 chip->oob_poi + of.offset, of.length); in gpmi_ecc_write_oob()
1801 * This function reads a NAND page without involving the ECC engine (no HW
1817 struct bch_geometry *nfc_geo = &this->bch_geometry; in gpmi_ecc_read_page_raw()
1818 int eccsize = nfc_geo->eccn_chunk_size; in gpmi_ecc_read_page_raw()
1819 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; in gpmi_ecc_read_page_raw()
1820 u8 *tmp_buf = this->raw_buffer; in gpmi_ecc_read_page_raw()
1824 uint8_t *oob = chip->oob_poi; in gpmi_ecc_read_page_raw()
1829 mtd->writesize + mtd->oobsize); in gpmi_ecc_read_page_raw()
1834 * If required, swap the bad block marker and the data stored in the in gpmi_ecc_read_page_raw()
1840 if (this->swap_block_mark) in gpmi_ecc_read_page_raw()
1841 swap(tmp_buf[0], tmp_buf[mtd->writesize]); in gpmi_ecc_read_page_raw()
1848 memcpy(oob, tmp_buf, nfc_geo->metadata_size); in gpmi_ecc_read_page_raw()
1850 oob_bit_off = nfc_geo->metadata_size * 8; in gpmi_ecc_read_page_raw()
1854 for (step = 0; step < nfc_geo->ecc_chunk_count; step++) { in gpmi_ecc_read_page_raw()
1861 if (step == nfc_geo->ecc_chunk_count - 1 && in gpmi_ecc_read_page_raw()
1863 eccbits += 8 - ((oob_bit_off + eccbits) % 8); in gpmi_ecc_read_page_raw()
1876 if (oob_byte_off < mtd->oobsize) in gpmi_ecc_read_page_raw()
1878 tmp_buf + mtd->writesize + oob_byte_off, in gpmi_ecc_read_page_raw()
1879 mtd->oobsize - oob_byte_off); in gpmi_ecc_read_page_raw()
1886 * This function writes a NAND page without involving the ECC engine (no HW
1902 struct bch_geometry *nfc_geo = &this->bch_geometry; in gpmi_ecc_write_page_raw()
1903 int eccsize = nfc_geo->eccn_chunk_size; in gpmi_ecc_write_page_raw()
1904 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; in gpmi_ecc_write_page_raw()
1905 u8 *tmp_buf = this->raw_buffer; in gpmi_ecc_write_page_raw()
1906 uint8_t *oob = chip->oob_poi; in gpmi_ecc_write_page_raw()
1918 memset(tmp_buf, 0xff, mtd->writesize + mtd->oobsize); in gpmi_ecc_write_page_raw()
1924 memcpy(tmp_buf, oob, nfc_geo->metadata_size); in gpmi_ecc_write_page_raw()
1925 oob_bit_off = nfc_geo->metadata_size * 8; in gpmi_ecc_write_page_raw()
1929 for (step = 0; step < nfc_geo->ecc_chunk_count; step++) { in gpmi_ecc_write_page_raw()
1936 if (step == nfc_geo->ecc_chunk_count - 1 && in gpmi_ecc_write_page_raw()
1938 eccbits += 8 - ((oob_bit_off + eccbits) % 8); in gpmi_ecc_write_page_raw()
1950 if (oob_required && oob_byte_off < mtd->oobsize) in gpmi_ecc_write_page_raw()
1951 memcpy(tmp_buf + mtd->writesize + oob_byte_off, in gpmi_ecc_write_page_raw()
1952 oob + oob_byte_off, mtd->oobsize - oob_byte_off); in gpmi_ecc_write_page_raw()
1955 * If required, swap the bad block marker and the first byte of the in gpmi_ecc_write_page_raw()
1961 if (this->swap_block_mark) in gpmi_ecc_write_page_raw()
1962 swap(tmp_buf[0], tmp_buf[mtd->writesize]); in gpmi_ecc_write_page_raw()
1965 mtd->writesize + mtd->oobsize); in gpmi_ecc_write_page_raw()
1986 chipnr = (int)(ofs >> chip->chip_shift); in gpmi_block_markbad()
1989 column = !GPMI_IS_MX23(this) ? mtd->writesize : 0; in gpmi_block_markbad()
1992 block_mark = this->data_buffer_dma; in gpmi_block_markbad()
1996 page = (int)(ofs >> chip->page_shift); in gpmi_block_markbad()
2007 struct boot_rom_geometry *geometry = &this->rom_geometry; in nand_boot_set_geometry()
2017 geometry->stride_size_in_pages = 64; in nand_boot_set_geometry()
2027 geometry->search_area_stride_exponent = 2; in nand_boot_set_geometry()
2034 struct boot_rom_geometry *rom_geo = &this->rom_geometry; in mx23_check_transcription_stamp()
2035 struct device *dev = this->dev; in mx23_check_transcription_stamp()
2036 struct nand_chip *chip = &this->nand; in mx23_check_transcription_stamp()
2045 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent; in mx23_check_transcription_stamp()
2056 page = stride * rom_geo->stride_size_in_pages; in mx23_check_transcription_stamp()
2089 struct device *dev = this->dev; in mx23_write_transcription_stamp()
2090 struct boot_rom_geometry *rom_geo = &this->rom_geometry; in mx23_write_transcription_stamp()
2091 struct nand_chip *chip = &this->nand; in mx23_write_transcription_stamp()
2104 block_size_in_pages = mtd->erasesize / mtd->writesize; in mx23_write_transcription_stamp()
2105 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent; in mx23_write_transcription_stamp()
2107 rom_geo->stride_size_in_pages; in mx23_write_transcription_stamp()
2109 (search_area_size_in_pages + (block_size_in_pages - 1)) / in mx23_write_transcription_stamp()
2131 memset(buffer, ~0, mtd->writesize); in mx23_write_transcription_stamp()
2138 page = stride * rom_geo->stride_size_in_pages; in mx23_write_transcription_stamp()
2143 status = chip->ecc.write_page_raw(chip, buffer, 0, page); in mx23_write_transcription_stamp()
2155 struct device *dev = this->dev; in mx23_boot_init()
2156 struct nand_chip *chip = &this->nand; in mx23_boot_init()
2170 * anything -- the block marks are already transcribed. in mx23_boot_init()
2182 block_count = nanddev_eraseblocks_per_target(&chip->base); in mx23_boot_init()
2193 chipnr = block >> (chip->chip_shift - chip->phys_erase_shift); in mx23_boot_init()
2194 page = block << (chip->phys_erase_shift - chip->page_shift); in mx23_boot_init()
2195 byte = block << chip->phys_erase_shift; in mx23_boot_init()
2199 ret = nand_read_page_op(chip, page, mtd->writesize, &block_mark, in mx23_boot_init()
2213 ret = chip->legacy.block_markbad(chip, byte); in mx23_boot_init()
2230 /* This is ROM arch-specific initilization before the BBT scanning. */ in nand_boot_init()
2246 dev_err(this->dev, "Error setting BCH geometry : %d\n", ret); in gpmi_set_geometry()
2256 struct nand_chip *chip = &this->nand; in gpmi_init_last()
2258 struct nand_ecc_ctrl *ecc = &chip->ecc; in gpmi_init_last()
2259 struct bch_geometry *bch_geo = &this->bch_geometry; in gpmi_init_last()
2268 ecc->read_page = gpmi_ecc_read_page; in gpmi_init_last()
2269 ecc->write_page = gpmi_ecc_write_page; in gpmi_init_last()
2270 ecc->read_oob = gpmi_ecc_read_oob; in gpmi_init_last()
2271 ecc->write_oob = gpmi_ecc_write_oob; in gpmi_init_last()
2272 ecc->read_page_raw = gpmi_ecc_read_page_raw; in gpmi_init_last()
2273 ecc->write_page_raw = gpmi_ecc_write_page_raw; in gpmi_init_last()
2274 ecc->read_oob_raw = gpmi_ecc_read_oob_raw; in gpmi_init_last()
2275 ecc->write_oob_raw = gpmi_ecc_write_oob_raw; in gpmi_init_last()
2276 ecc->engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST; in gpmi_init_last()
2277 ecc->size = bch_geo->eccn_chunk_size; in gpmi_init_last()
2278 ecc->strength = bch_geo->ecc_strength; in gpmi_init_last()
2287 ((bch_geo->gf_len * bch_geo->ecc_strength) % 8) == 0) { in gpmi_init_last()
2288 ecc->read_subpage = gpmi_ecc_read_subpage; in gpmi_init_last()
2289 chip->options |= NAND_SUBPAGE_READ; in gpmi_init_last()
2300 if (chip->bbt_options & NAND_BBT_USE_FLASH) { in gpmi_nand_attach_chip()
2301 chip->bbt_options |= NAND_BBT_NO_OOB; in gpmi_nand_attach_chip()
2303 if (of_property_read_bool(this->dev->of_node, in gpmi_nand_attach_chip()
2304 "fsl,no-blockmark-swap")) in gpmi_nand_attach_chip()
2305 this->swap_block_mark = false; in gpmi_nand_attach_chip()
2307 dev_dbg(this->dev, "Blockmark swapping %sabled\n", in gpmi_nand_attach_chip()
2308 this->swap_block_mark ? "en" : "dis"); in gpmi_nand_attach_chip()
2314 chip->options |= NAND_SKIP_BBTSCAN; in gpmi_nand_attach_chip()
2321 struct gpmi_transfer *transfer = &this->transfers[this->ntransfers]; in get_next_transfer()
2323 this->ntransfers++; in get_next_transfer()
2325 if (this->ntransfers == GPMI_MAX_TRANSFERS) in get_next_transfer()
2337 int chip = this->nand.cur_cs; in gpmi_chain_command()
2359 transfer->cmdbuf[0] = cmd; in gpmi_chain_command()
2361 memcpy(&transfer->cmdbuf[1], addr, naddr); in gpmi_chain_command()
2363 sg_init_one(&transfer->sgl, transfer->cmdbuf, naddr + 1); in gpmi_chain_command()
2364 dma_map_sg(this->dev, &transfer->sgl, 1, DMA_TO_DEVICE); in gpmi_chain_command()
2366 transfer->direction = DMA_TO_DEVICE; in gpmi_chain_command()
2368 desc = dmaengine_prep_slave_sg(channel, &transfer->sgl, 1, DMA_MEM_TO_DEV, in gpmi_chain_command()
2381 | BF_GPMI_CTRL0_CS(this->nand.cur_cs, this) in gpmi_chain_wait_ready()
2403 transfer->direction = DMA_FROM_DEVICE; in gpmi_chain_data_read()
2405 *direct = prepare_data_dma(this, buf, raw_len, &transfer->sgl, in gpmi_chain_data_read()
2410 | BF_GPMI_CTRL0_CS(this->nand.cur_cs, this) in gpmi_chain_data_read()
2415 if (this->bch) { in gpmi_chain_data_read()
2421 pio[4] = transfer->sgl.dma_address; in gpmi_chain_data_read()
2422 pio[5] = this->auxiliary_phys; in gpmi_chain_data_read()
2430 if (!this->bch) in gpmi_chain_data_read()
2431 desc = dmaengine_prep_slave_sg(channel, &transfer->sgl, 1, in gpmi_chain_data_read()
2450 transfer->direction = DMA_TO_DEVICE; in gpmi_chain_data_write()
2452 prepare_data_dma(this, buf, raw_len, &transfer->sgl, DMA_TO_DEVICE); in gpmi_chain_data_write()
2456 | BF_GPMI_CTRL0_CS(this->nand.cur_cs, this) in gpmi_chain_data_write()
2461 if (this->bch) { in gpmi_chain_data_write()
2467 pio[4] = transfer->sgl.dma_address; in gpmi_chain_data_write()
2468 pio[5] = this->auxiliary_phys; in gpmi_chain_data_write()
2473 (this->bch ? MXS_DMA_CTRL_WAIT4END : 0)); in gpmi_chain_data_write()
2477 if (!this->bch) in gpmi_chain_data_write()
2478 desc = dmaengine_prep_slave_sg(channel, &transfer->sgl, 1, in gpmi_chain_data_write()
2503 this->ntransfers = 0; in gpmi_nfc_exec_op()
2505 this->transfers[i].direction = DMA_NONE; in gpmi_nfc_exec_op()
2507 ret = pm_runtime_get_sync(this->dev); in gpmi_nfc_exec_op()
2509 pm_runtime_put_noidle(this->dev); in gpmi_nfc_exec_op()
2519 if (this->hw.must_apply_timings) { in gpmi_nfc_exec_op()
2520 this->hw.must_apply_timings = false; in gpmi_nfc_exec_op()
2526 dev_dbg(this->dev, "%s: %d instructions\n", __func__, op->ninstrs); in gpmi_nfc_exec_op()
2528 for (i = 0; i < op->ninstrs; i++) { in gpmi_nfc_exec_op()
2529 instr = &op->instrs[i]; in gpmi_nfc_exec_op()
2533 switch (instr->type) { in gpmi_nfc_exec_op()
2538 cmd = instr->ctx.cmd.opcode; in gpmi_nfc_exec_op()
2544 if (i + 1 != op->ninstrs && in gpmi_nfc_exec_op()
2545 op->instrs[i + 1].type == NAND_OP_ADDR_INSTR) in gpmi_nfc_exec_op()
2552 desc = gpmi_chain_command(this, cmd, instr->ctx.addr.addrs, in gpmi_nfc_exec_op()
2553 instr->ctx.addr.naddrs); in gpmi_nfc_exec_op()
2556 buf_write = instr->ctx.data.buf.out; in gpmi_nfc_exec_op()
2557 buf_len = instr->ctx.data.len; in gpmi_nfc_exec_op()
2564 if (!instr->ctx.data.len) in gpmi_nfc_exec_op()
2566 buf_read = instr->ctx.data.buf.in; in gpmi_nfc_exec_op()
2567 buf_len = instr->ctx.data.len; in gpmi_nfc_exec_op()
2576 ret = -ENXIO; in gpmi_nfc_exec_op()
2581 dev_dbg(this->dev, "%s setup done\n", __func__); in gpmi_nfc_exec_op()
2584 dev_err(this->dev, "Multiple data instructions not supported\n"); in gpmi_nfc_exec_op()
2585 ret = -EINVAL; in gpmi_nfc_exec_op()
2589 if (this->bch) { in gpmi_nfc_exec_op()
2590 writel(this->bch_flashlayout0, in gpmi_nfc_exec_op()
2591 this->resources.bch_regs + HW_BCH_FLASH0LAYOUT0); in gpmi_nfc_exec_op()
2592 writel(this->bch_flashlayout1, in gpmi_nfc_exec_op()
2593 this->resources.bch_regs + HW_BCH_FLASH0LAYOUT1); in gpmi_nfc_exec_op()
2596 desc->callback = dma_irq_callback; in gpmi_nfc_exec_op()
2597 desc->callback_param = this; in gpmi_nfc_exec_op()
2598 dma_completion = &this->dma_done; in gpmi_nfc_exec_op()
2603 if (this->bch && buf_read) { in gpmi_nfc_exec_op()
2605 this->resources.bch_regs + HW_BCH_CTRL_SET); in gpmi_nfc_exec_op()
2606 bch_completion = &this->bch_done; in gpmi_nfc_exec_op()
2615 dev_err(this->dev, "DMA timeout, last DMA\n"); in gpmi_nfc_exec_op()
2617 ret = -ETIMEDOUT; in gpmi_nfc_exec_op()
2621 if (this->bch && buf_read) { in gpmi_nfc_exec_op()
2624 dev_err(this->dev, "BCH timeout, last DMA\n"); in gpmi_nfc_exec_op()
2626 ret = -ETIMEDOUT; in gpmi_nfc_exec_op()
2632 this->resources.bch_regs + HW_BCH_CTRL_CLR); in gpmi_nfc_exec_op()
2638 for (i = 0; i < this->ntransfers; i++) { in gpmi_nfc_exec_op()
2639 struct gpmi_transfer *transfer = &this->transfers[i]; in gpmi_nfc_exec_op()
2641 if (transfer->direction != DMA_NONE) in gpmi_nfc_exec_op()
2642 dma_unmap_sg(this->dev, &transfer->sgl, 1, in gpmi_nfc_exec_op()
2643 transfer->direction); in gpmi_nfc_exec_op()
2647 memcpy(buf_read, this->data_buffer_dma, in gpmi_nfc_exec_op()
2650 this->bch = false; in gpmi_nfc_exec_op()
2653 pm_runtime_mark_last_busy(this->dev); in gpmi_nfc_exec_op()
2654 pm_runtime_put_autosuspend(this->dev); in gpmi_nfc_exec_op()
2667 struct nand_chip *chip = &this->nand; in gpmi_nand_init()
2672 mtd->name = "gpmi-nand"; in gpmi_nand_init()
2673 mtd->dev.parent = this->dev; in gpmi_nand_init()
2675 /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */ in gpmi_nand_init()
2677 nand_set_flash_node(chip, this->pdev->dev.of_node); in gpmi_nand_init()
2678 chip->legacy.block_markbad = gpmi_block_markbad; in gpmi_nand_init()
2679 chip->badblock_pattern = &gpmi_bbt_descr; in gpmi_nand_init()
2680 chip->options |= NAND_NO_SUBPAGE_WRITE; in gpmi_nand_init()
2683 this->swap_block_mark = !GPMI_IS_MX23(this); in gpmi_nand_init()
2689 this->bch_geometry.payload_size = 1024; in gpmi_nand_init()
2690 this->bch_geometry.auxiliary_size = 128; in gpmi_nand_init()
2695 nand_controller_init(&this->base); in gpmi_nand_init()
2696 this->base.ops = &gpmi_nand_controller_ops; in gpmi_nand_init()
2697 chip->controller = &this->base; in gpmi_nand_init()
2723 { .compatible = "fsl,imx23-gpmi-nand", .data = &gpmi_devdata_imx23, },
2724 { .compatible = "fsl,imx28-gpmi-nand", .data = &gpmi_devdata_imx28, },
2725 { .compatible = "fsl,imx6q-gpmi-nand", .data = &gpmi_devdata_imx6q, },
2726 { .compatible = "fsl,imx6sx-gpmi-nand", .data = &gpmi_devdata_imx6sx, },
2727 { .compatible = "fsl,imx7d-gpmi-nand", .data = &gpmi_devdata_imx7d,},
2737 this = devm_kzalloc(&pdev->dev, sizeof(*this), GFP_KERNEL); in gpmi_nand_probe()
2739 return -ENOMEM; in gpmi_nand_probe()
2741 this->devdata = of_device_get_match_data(&pdev->dev); in gpmi_nand_probe()
2743 this->pdev = pdev; in gpmi_nand_probe()
2744 this->dev = &pdev->dev; in gpmi_nand_probe()
2754 pm_runtime_set_autosuspend_delay(&pdev->dev, 500); in gpmi_nand_probe()
2755 pm_runtime_use_autosuspend(&pdev->dev); in gpmi_nand_probe()
2756 pm_runtime_set_active(&pdev->dev); in gpmi_nand_probe()
2757 pm_runtime_enable(&pdev->dev); in gpmi_nand_probe()
2758 pm_runtime_get_sync(&pdev->dev); in gpmi_nand_probe()
2768 pm_runtime_mark_last_busy(&pdev->dev); in gpmi_nand_probe()
2769 pm_runtime_put_autosuspend(&pdev->dev); in gpmi_nand_probe()
2771 dev_info(this->dev, "driver registered.\n"); in gpmi_nand_probe()
2776 pm_runtime_put(&pdev->dev); in gpmi_nand_probe()
2777 pm_runtime_disable(&pdev->dev); in gpmi_nand_probe()
2787 struct nand_chip *chip = &this->nand; in gpmi_nand_remove()
2790 pm_runtime_put_sync(&pdev->dev); in gpmi_nand_remove()
2791 pm_runtime_disable(&pdev->dev); in gpmi_nand_remove()
2819 /* re-init the GPMI registers */ in gpmi_pm_resume()
2822 dev_err(this->dev, "Error setting GPMI : %d\n", ret); in gpmi_pm_resume()
2827 if (this->hw.clk_rate) in gpmi_pm_resume()
2828 this->hw.must_apply_timings = true; in gpmi_pm_resume()
2830 /* re-init the BCH registers */ in gpmi_pm_resume()
2833 dev_err(this->dev, "Error setting BCH : %d\n", ret); in gpmi_pm_resume()
2862 .name = "gpmi-nand",