Lines Matching +full:native +full:- +full:endian

1 /* SPDX-License-Identifier: GPL-2.0-only */
16 /* Special register offset constant to intercept a non-MMIO access
38 	if (soc && soc->prepare_data_bus)  in brcmnand_soc_data_bus_prepare()
39 		soc->prepare_data_bus(soc, true, is_param);  in brcmnand_soc_data_bus_prepare()
45 	if (soc && soc->prepare_data_bus)  in brcmnand_soc_data_bus_unprepare()
46 		soc->prepare_data_bus(soc, false, is_param);  in brcmnand_soc_data_bus_unprepare()
53 	 * bus endianness (i.e., big-endian CPU + big endian bus ==> native  in brcmnand_readl()
54 	 * endian I/O).  in brcmnand_readl()
56 	 * Other architectures (e.g., ARM) either do not support big endian, or  in brcmnand_readl()
57 	 * else leave I/O in little endian mode.  in brcmnand_readl()
76 	return soc && soc->ops && soc->ops->read_reg && soc->ops->write_reg;  in brcmnand_soc_has_ops()
81 	return soc->ops->read_reg(soc, offset);  in brcmnand_soc_read()
87 	soc->ops->write_reg(soc, val, offset);  in brcmnand_soc_write()