186 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_readw()  local
187 	const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;  in tegra_sdhci_readw()
222 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_writel()  local
223 	const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;  in tegra_sdhci_writel()
304 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_is_pad_and_regulator_valid()  local
315 	if (!(tegra_host->soc_data->nvquirks & NVQUIRK_NEEDS_PAD_CONTROL))  in tegra_sdhci_is_pad_and_regulator_valid()
328 		return tegra_host->pad_control_available;  in tegra_sdhci_is_pad_and_regulator_valid()
337 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_set_tap()  local
338 	const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;  in tegra_sdhci_set_tap()
367 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_reset()  local
368 	const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;  in tegra_sdhci_reset()
376 	tegra_sdhci_set_tap(host, tegra_host->default_tap);  in tegra_sdhci_reset()
404 	clk_ctrl |= tegra_host->default_trim << SDHCI_CLOCK_CTRL_TRIM_SHIFT;  in tegra_sdhci_reset()
415 		tegra_host->pad_calib_required = true;  in tegra_sdhci_reset()
418 	tegra_host->ddr_signaling = false;  in tegra_sdhci_reset()
457 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_set_padctrl()  local
459 						&tegra_host->autocal_offsets;  in tegra_sdhci_set_padctrl()
468 			if (tegra_host->pinctrl_state_1v8_drv) {  in tegra_sdhci_set_padctrl()
470 					tegra_host->pinctrl_state_1v8_drv;  in tegra_sdhci_set_padctrl()
476 			if (tegra_host->pinctrl_state_3v3_drv) {  in tegra_sdhci_set_padctrl()
478 					tegra_host->pinctrl_state_3v3_drv;  in tegra_sdhci_set_padctrl()
486 			ret = pinctrl_select_state(tegra_host->pinctrl_sdmmc,  in tegra_sdhci_set_padctrl()
502 		if (!tegra_host->pad_control_available)  in tegra_sdhci_set_padctrl()
506 			ret = pinctrl_select_state(tegra_host->pinctrl_sdmmc,  in tegra_sdhci_set_padctrl()
507 						tegra_host->pinctrl_state_1v8);  in tegra_sdhci_set_padctrl()
512 			ret = pinctrl_select_state(tegra_host->pinctrl_sdmmc,  in tegra_sdhci_set_padctrl()
513 						tegra_host->pinctrl_state_3v3);  in tegra_sdhci_set_padctrl()
526 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_pad_autocalib()  local
528 			tegra_host->autocal_offsets;  in tegra_sdhci_pad_autocalib()
588 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_parse_pad_autocal_dt()  local
590 			&tegra_host->autocal_offsets;  in tegra_sdhci_parse_pad_autocal_dt()
647 	if (!(tegra_host->soc_data->nvquirks & NVQUIRK_NEEDS_PAD_CONTROL))  in tegra_sdhci_parse_pad_autocal_dt()
654 		if (!IS_ERR(tegra_host->pinctrl_state_3v3) &&  in tegra_sdhci_parse_pad_autocal_dt()
655 			(tegra_host->pinctrl_state_3v3_drv == NULL))  in tegra_sdhci_parse_pad_autocal_dt()
665 		if (!IS_ERR(tegra_host->pinctrl_state_3v3) &&  in tegra_sdhci_parse_pad_autocal_dt()
666 			(tegra_host->pinctrl_state_3v3_drv == NULL))  in tegra_sdhci_parse_pad_autocal_dt()
676 		if (!IS_ERR(tegra_host->pinctrl_state_1v8) &&  in tegra_sdhci_parse_pad_autocal_dt()
677 			(tegra_host->pinctrl_state_1v8_drv == NULL))  in tegra_sdhci_parse_pad_autocal_dt()
687 		if (!IS_ERR(tegra_host->pinctrl_state_1v8) &&  in tegra_sdhci_parse_pad_autocal_dt()
688 			(tegra_host->pinctrl_state_1v8_drv == NULL))  in tegra_sdhci_parse_pad_autocal_dt()
699 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_request()  local
700 	ktime_t since_calib = ktime_sub(ktime_get(), tegra_host->last_calib);  in tegra_sdhci_request()
705 		tegra_host->last_calib = ktime_get();  in tegra_sdhci_request()
714 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_parse_tap_and_trim()  local
718 				       &tegra_host->default_tap);  in tegra_sdhci_parse_tap_and_trim()
720 		tegra_host->default_tap = 0;  in tegra_sdhci_parse_tap_and_trim()
723 				       &tegra_host->default_trim);  in tegra_sdhci_parse_tap_and_trim()
725 		tegra_host->default_trim = 0;  in tegra_sdhci_parse_tap_and_trim()
728 				       &tegra_host->dqs_trim);  in tegra_sdhci_parse_tap_and_trim()
730 		tegra_host->dqs_trim = 0x11;  in tegra_sdhci_parse_tap_and_trim()
736 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_parse_dt()  local
739 		tegra_host->enable_hwcq = true;  in tegra_sdhci_parse_dt()
741 		tegra_host->enable_hwcq = false;  in tegra_sdhci_parse_dt()
750 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_set_clock()  local
770 	host_clk = tegra_host->ddr_signaling ? clock * 2 : clock;  in tegra_sdhci_set_clock()
777 	tegra_host->curr_clk_rate = clk_get_rate(pltfm_host->clk);  in tegra_sdhci_set_clock()
778 	if (tegra_host->ddr_signaling)  in tegra_sdhci_set_clock()
785 	if (tegra_host->pad_calib_required) {  in tegra_sdhci_set_clock()
787 		tegra_host->pad_calib_required = false;  in tegra_sdhci_set_clock()
856 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_tap_correction()  local
914 					tegra_host->tuned_tap_delay = tap;  in tegra_sdhci_tap_correction()
929 			tegra_host->tuned_tap_delay = edge1 - fixed_tap;  in tegra_sdhci_tap_correction()
931 			tegra_host->tuned_tap_delay = edge1 + fixed_tap;  in tegra_sdhci_tap_correction()
938 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_post_tuning()  local
939 	const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;  in tegra_sdhci_post_tuning()
948 	tegra_host->tuned_tap_delay = (val & SDHCI_CLOCK_CTRL_TAP_MASK) >>  in tegra_sdhci_post_tuning()
953 		clk_rate_mhz = tegra_host->curr_clk_rate / USEC_PER_SEC;  in tegra_sdhci_post_tuning()
990 	tegra_sdhci_set_tap(host, tegra_host->tuned_tap_delay);  in tegra_sdhci_post_tuning()
1009 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_set_uhs_signaling()  local
1016 	tegra_host->ddr_signaling = false;  in tegra_sdhci_set_uhs_signaling()
1032 		tegra_host->ddr_signaling = true;  in tegra_sdhci_set_uhs_signaling()
1056 	if (tegra_host->tuned_tap_delay && !set_default_tap)  in tegra_sdhci_set_uhs_signaling()
1057 		tegra_sdhci_set_tap(host, tegra_host->tuned_tap_delay);  in tegra_sdhci_set_uhs_signaling()
1059 		tegra_sdhci_set_tap(host, tegra_host->default_tap);  in tegra_sdhci_set_uhs_signaling()
1062 		tegra_sdhci_set_dqs_trim(host, tegra_host->dqs_trim);  in tegra_sdhci_set_uhs_signaling()
1107 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_tegra_start_signal_voltage_switch()  local
1122 	if (tegra_host->pad_calib_required)  in sdhci_tegra_start_signal_voltage_switch()
1129 					 struct sdhci_tegra *tegra_host)  in tegra_sdhci_init_pinctrl_info()  argument
1131 	tegra_host->pinctrl_sdmmc = devm_pinctrl_get(dev);  in tegra_sdhci_init_pinctrl_info()
1132 	if (IS_ERR(tegra_host->pinctrl_sdmmc)) {  in tegra_sdhci_init_pinctrl_info()
1134 			PTR_ERR(tegra_host->pinctrl_sdmmc));  in tegra_sdhci_init_pinctrl_info()
1138 	tegra_host->pinctrl_state_1v8_drv = pinctrl_lookup_state(  in tegra_sdhci_init_pinctrl_info()
1139 				tegra_host->pinctrl_sdmmc, "sdmmc-1v8-drv");  in tegra_sdhci_init_pinctrl_info()
1140 	if (IS_ERR(tegra_host->pinctrl_state_1v8_drv)) {  in tegra_sdhci_init_pinctrl_info()
1141 		if (PTR_ERR(tegra_host->pinctrl_state_1v8_drv) == -ENODEV)  in tegra_sdhci_init_pinctrl_info()
1142 			tegra_host->pinctrl_state_1v8_drv = NULL;  in tegra_sdhci_init_pinctrl_info()
1145 	tegra_host->pinctrl_state_3v3_drv = pinctrl_lookup_state(  in tegra_sdhci_init_pinctrl_info()
1146 				tegra_host->pinctrl_sdmmc, "sdmmc-3v3-drv");  in tegra_sdhci_init_pinctrl_info()
1147 	if (IS_ERR(tegra_host->pinctrl_state_3v3_drv)) {  in tegra_sdhci_init_pinctrl_info()
1148 		if (PTR_ERR(tegra_host->pinctrl_state_3v3_drv) == -ENODEV)  in tegra_sdhci_init_pinctrl_info()
1149 			tegra_host->pinctrl_state_3v3_drv = NULL;  in tegra_sdhci_init_pinctrl_info()
1152 	tegra_host->pinctrl_state_3v3 =  in tegra_sdhci_init_pinctrl_info()
1153 		pinctrl_lookup_state(tegra_host->pinctrl_sdmmc, "sdmmc-3v3");  in tegra_sdhci_init_pinctrl_info()
1154 	if (IS_ERR(tegra_host->pinctrl_state_3v3)) {  in tegra_sdhci_init_pinctrl_info()
1156 			 PTR_ERR(tegra_host->pinctrl_state_3v3));  in tegra_sdhci_init_pinctrl_info()
1160 	tegra_host->pinctrl_state_1v8 =  in tegra_sdhci_init_pinctrl_info()
1161 		pinctrl_lookup_state(tegra_host->pinctrl_sdmmc, "sdmmc-1v8");  in tegra_sdhci_init_pinctrl_info()
1162 	if (IS_ERR(tegra_host->pinctrl_state_1v8)) {  in tegra_sdhci_init_pinctrl_info()
1164 			 PTR_ERR(tegra_host->pinctrl_state_1v8));  in tegra_sdhci_init_pinctrl_info()
1168 	tegra_host->pad_control_available = true;  in tegra_sdhci_init_pinctrl_info()
1176 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_voltage_switch()  local
1177 	const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;  in tegra_sdhci_voltage_switch()
1180 		tegra_host->pad_calib_required = true;  in tegra_sdhci_voltage_switch()
1226 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_tegra_update_dcmd_desc()  local
1227 	const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;  in sdhci_tegra_update_dcmd_desc()
1575 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_tegra_add_host()  local
1580 	if (!tegra_host->enable_hwcq)  in sdhci_tegra_add_host()
1625 	struct sdhci_tegra *tegra_host;  in sdhci_tegra_probe()  local
1633 	host = sdhci_pltfm_init(pdev, soc_data->pdata, sizeof(*tegra_host));  in sdhci_tegra_probe()
1638 	tegra_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_tegra_probe()
1639 	tegra_host->ddr_signaling = false;  in sdhci_tegra_probe()
1640 	tegra_host->pad_calib_required = false;  in sdhci_tegra_probe()
1641 	tegra_host->pad_control_available = false;  in sdhci_tegra_probe()
1642 	tegra_host->soc_data = soc_data;  in sdhci_tegra_probe()
1648 		rc = tegra_sdhci_init_pinctrl_info(&pdev->dev, tegra_host);  in sdhci_tegra_probe()
1669 	if (tegra_host->soc_data->nvquirks & NVQUIRK_ENABLE_DDR50)  in sdhci_tegra_probe()
1680 	tegra_host->power_gpio = devm_gpiod_get_optional(&pdev->dev, "power",  in sdhci_tegra_probe()
1682 	if (IS_ERR(tegra_host->power_gpio)) {  in sdhci_tegra_probe()
1683 		rc = PTR_ERR(tegra_host->power_gpio);  in sdhci_tegra_probe()
1721 		tegra_host->tmclk = clk;  in sdhci_tegra_probe()
1732 	tegra_host->rst = devm_reset_control_get_exclusive(&pdev->dev,  in sdhci_tegra_probe()
1734 	if (IS_ERR(tegra_host->rst)) {  in sdhci_tegra_probe()
1735 		rc = PTR_ERR(tegra_host->rst);  in sdhci_tegra_probe()
1749 	rc = reset_control_assert(tegra_host->rst);  in sdhci_tegra_probe()
1755 	rc = reset_control_deassert(tegra_host->rst);  in sdhci_tegra_probe()
1768 	reset_control_assert(tegra_host->rst);  in sdhci_tegra_probe()
1775 	clk_disable_unprepare(tegra_host->tmclk);  in sdhci_tegra_probe()
1786 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_tegra_remove()  local
1790 	reset_control_assert(tegra_host->rst);  in sdhci_tegra_remove()
1796 	clk_disable_unprepare(tegra_host->tmclk);  in sdhci_tegra_remove()