Lines Matching +full:max +full:- +full:bit +full:- +full:rate
1 // SPDX-License-Identifier: GPL-2.0-only
2 /* linux/drivers/mmc/host/sdhci-s3c.c
14 #include <linux/dma-mapping.h>
16 #include <linux/platform_data/mmc-sdhci-s3c.h>
38 #define S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR BIT(31)
39 #define S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK BIT(30)
40 #define S3C_SDHCI_CTRL2_CDINVRXD3 BIT(29)
41 #define S3C_SDHCI_CTRL2_SLCARDOUT BIT(28)
51 #define S3C_SDHCI_CTRL2_ENFBCLKTX BIT(15)
52 #define S3C_SDHCI_CTRL2_ENFBCLKRX BIT(14)
53 #define S3C_SDHCI_CTRL2_SDCDSEL BIT(13)
54 #define S3C_SDHCI_CTRL2_SDSIGPC BIT(12)
55 #define S3C_SDHCI_CTRL2_ENBUSYCHKTXSTART BIT(11)
64 #define S3C_SDHCI_CTRL2_ENCLKOUTHOLD BIT(8)
65 #define S3C_SDHCI_CTRL2_RWAITMODE BIT(7)
66 #define S3C_SDHCI_CTRL2_DISBUFRD BIT(6)
70 #define S3C_SDHCI_CTRL2_PWRSYNC BIT(3)
71 #define S3C_SDHCI_CTRL2_ENCLKOUTMSKCON BIT(1)
72 #define S3C_SDHCI_CTRL2_HWINITFIN BIT(0)
74 #define S3C_SDHCI_CTRL3_FCSEL3 BIT(31)
75 #define S3C_SDHCI_CTRL3_FCSEL2 BIT(23)
76 #define S3C_SDHCI_CTRL3_FCSEL1 BIT(15)
77 #define S3C_SDHCI_CTRL3_FCSEL0 BIT(7)
105 * struct sdhci_s3c - S3C SDHCI instance
115 * @no_divider: No or non-standard internal clock divider.
133 * struct sdhci_s3c_drv_data - S3C SDHCI platform specific driver data
135 * @no_divider: no or non-standard internal clock divider.
152 * sdhci_s3c_get_max_clk - callback to get maximum clock frequency.
155 * Callback to return the maximum clock rate acheivable by the controller.
160 unsigned long rate, max = 0; in sdhci_s3c_get_max_clk() local
164 rate = ourhost->clk_rates[src]; in sdhci_s3c_get_max_clk()
165 if (rate > max) in sdhci_s3c_get_max_clk()
166 max = rate; in sdhci_s3c_get_max_clk()
169 return max; in sdhci_s3c_get_max_clk()
173 * sdhci_s3c_consider_clock - consider one the bus clocks for current setting
182 unsigned long rate; in sdhci_s3c_consider_clock() local
183 struct clk *clksrc = ourhost->clk_bus[src]; in sdhci_s3c_consider_clock()
190 * If controller uses a non-standard clock division, find the best clock in sdhci_s3c_consider_clock()
193 if (ourhost->no_divider) { in sdhci_s3c_consider_clock()
194 rate = clk_round_rate(clksrc, wanted); in sdhci_s3c_consider_clock()
195 return wanted - rate; in sdhci_s3c_consider_clock()
198 rate = ourhost->clk_rates[src]; in sdhci_s3c_consider_clock()
201 if ((rate >> shift) <= wanted) in sdhci_s3c_consider_clock()
206 dev_dbg(&ourhost->pdev->dev, in sdhci_s3c_consider_clock()
207 "clk %d: rate %ld, min rate %lu > wanted %u\n", in sdhci_s3c_consider_clock()
208 src, rate, rate / 256, wanted); in sdhci_s3c_consider_clock()
212 dev_dbg(&ourhost->pdev->dev, "clk %d: rate %ld, want %d, got %ld\n", in sdhci_s3c_consider_clock()
213 src, rate, wanted, rate >> shift); in sdhci_s3c_consider_clock()
215 return wanted - (rate >> shift); in sdhci_s3c_consider_clock()
219 * sdhci_s3c_set_clock - callback on clock change
221 * @clock: The clock rate being requested.
235 host->mmc->actual_clock = 0; in sdhci_s3c_set_clock()
251 dev_dbg(&ourhost->pdev->dev, in sdhci_s3c_set_clock()
256 if (ourhost->cur_clk != best_src) { in sdhci_s3c_set_clock()
257 struct clk *clk = ourhost->clk_bus[best_src]; in sdhci_s3c_set_clock()
260 if (ourhost->cur_clk >= 0) in sdhci_s3c_set_clock()
262 ourhost->clk_bus[ourhost->cur_clk]); in sdhci_s3c_set_clock()
264 ourhost->cur_clk = best_src; in sdhci_s3c_set_clock()
265 host->max_clk = ourhost->clk_rates[best_src]; in sdhci_s3c_set_clock()
269 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); in sdhci_s3c_set_clock()
271 ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2); in sdhci_s3c_set_clock()
274 writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2); in sdhci_s3c_set_clock()
278 host->ioaddr + S3C64XX_SDHCI_CONTROL4); in sdhci_s3c_set_clock()
280 ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2); in sdhci_s3c_set_clock()
286 writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2); in sdhci_s3c_set_clock()
288 /* reconfigure the controller for new clock rate */ in sdhci_s3c_set_clock()
292 writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3); in sdhci_s3c_set_clock()
298 * sdhci_s3c_get_min_clock - callback to get minimal supported clock value
309 unsigned long rate, min = ULONG_MAX; in sdhci_s3c_get_min_clock() local
313 rate = ourhost->clk_rates[src] / 256; in sdhci_s3c_get_min_clock()
314 if (!rate) in sdhci_s3c_get_min_clock()
316 if (rate < min) in sdhci_s3c_get_min_clock()
317 min = rate; in sdhci_s3c_get_min_clock()
323 /* sdhci_cmu_get_max_clk - callback to get maximum clock frequency.*/
327 unsigned long rate, max = 0; in sdhci_cmu_get_max_clock() local
333 clk = ourhost->clk_bus[src]; in sdhci_cmu_get_max_clock()
337 rate = clk_round_rate(clk, ULONG_MAX); in sdhci_cmu_get_max_clock()
338 if (rate > max) in sdhci_cmu_get_max_clock()
339 max = rate; in sdhci_cmu_get_max_clock()
342 return max; in sdhci_cmu_get_max_clock()
345 /* sdhci_cmu_get_min_clock - callback to get minimal supported clock value. */
349 unsigned long rate, min = ULONG_MAX; in sdhci_cmu_get_min_clock() local
355 clk = ourhost->clk_bus[src]; in sdhci_cmu_get_min_clock()
359 rate = clk_round_rate(clk, 0); in sdhci_cmu_get_min_clock()
360 if (rate < min) in sdhci_cmu_get_min_clock()
361 min = rate; in sdhci_cmu_get_min_clock()
367 /* sdhci_cmu_set_clock - callback on clock change.*/
371 struct device *dev = &ourhost->pdev->dev; in sdhci_cmu_set_clock()
376 host->mmc->actual_clock = 0; in sdhci_cmu_set_clock()
391 ret = clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock); in sdhci_cmu_set_clock()
393 dev_err(dev, "%s: failed to set clock rate %uHz\n", in sdhci_cmu_set_clock()
394 mmc_hostname(host->mmc), clock); in sdhci_cmu_set_clock()
401 /* Wait max 20 ms */ in sdhci_cmu_set_clock()
407 mmc_hostname(host->mmc)); in sdhci_cmu_set_clock()
410 timeout--; in sdhci_cmu_set_clock()
431 struct device_node *node = dev->of_node; in sdhci_s3c_parse_dt()
434 /* if the bus-width property is not specified, assume width as 1 */ in sdhci_s3c_parse_dt()
435 if (of_property_read_u32(node, "bus-width", &max_width)) in sdhci_s3c_parse_dt()
437 pdata->max_width = max_width; in sdhci_s3c_parse_dt()
440 if (of_get_property(node, "broken-cd", NULL)) { in sdhci_s3c_parse_dt()
441 pdata->cd_type = S3C_SDHCI_CD_NONE; in sdhci_s3c_parse_dt()
445 if (of_get_property(node, "non-removable", NULL)) { in sdhci_s3c_parse_dt()
446 pdata->cd_type = S3C_SDHCI_CD_PERMANENT; in sdhci_s3c_parse_dt()
450 if (of_get_named_gpio(node, "cd-gpios", 0)) in sdhci_s3c_parse_dt()
454 pdata->cd_type = S3C_SDHCI_CD_INTERNAL; in sdhci_s3c_parse_dt()
461 return -EINVAL; in sdhci_s3c_parse_dt()
469 if (pdev->dev.of_node) in sdhci_s3c_get_driver_data()
470 return of_device_get_match_data(&pdev->dev); in sdhci_s3c_get_driver_data()
473 platform_get_device_id(pdev)->driver_data; in sdhci_s3c_get_driver_data()
480 struct device *dev = &pdev->dev; in sdhci_s3c_probe()
485 if (!pdev->dev.platform_data && !pdev->dev.of_node) { in sdhci_s3c_probe()
487 return -ENOENT; in sdhci_s3c_probe()
501 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); in sdhci_s3c_probe()
503 ret = -ENOMEM; in sdhci_s3c_probe()
507 if (pdev->dev.of_node) { in sdhci_s3c_probe()
508 ret = sdhci_s3c_parse_dt(&pdev->dev, host, pdata); in sdhci_s3c_probe()
512 memcpy(pdata, pdev->dev.platform_data, sizeof(*pdata)); in sdhci_s3c_probe()
517 sc->host = host; in sdhci_s3c_probe()
518 sc->pdev = pdev; in sdhci_s3c_probe()
519 sc->pdata = pdata; in sdhci_s3c_probe()
520 sc->cur_clk = -1; in sdhci_s3c_probe()
524 sc->clk_io = devm_clk_get(dev, "hsmmc"); in sdhci_s3c_probe()
525 if (IS_ERR(sc->clk_io)) { in sdhci_s3c_probe()
527 ret = PTR_ERR(sc->clk_io); in sdhci_s3c_probe()
532 clk_prepare_enable(sc->clk_io); in sdhci_s3c_probe()
538 sc->clk_bus[ptr] = devm_clk_get(dev, name); in sdhci_s3c_probe()
539 if (IS_ERR(sc->clk_bus[ptr])) in sdhci_s3c_probe()
543 sc->clk_rates[ptr] = clk_get_rate(sc->clk_bus[ptr]); in sdhci_s3c_probe()
546 ptr, name, sc->clk_rates[ptr]); in sdhci_s3c_probe()
551 ret = -ENOENT; in sdhci_s3c_probe()
555 host->ioaddr = devm_platform_ioremap_resource(pdev, 0); in sdhci_s3c_probe()
556 if (IS_ERR(host->ioaddr)) { in sdhci_s3c_probe()
557 ret = PTR_ERR(host->ioaddr); in sdhci_s3c_probe()
562 if (pdata->cfg_gpio) in sdhci_s3c_probe()
563 pdata->cfg_gpio(pdev, pdata->max_width); in sdhci_s3c_probe()
565 host->hw_name = "samsung-hsmmc"; in sdhci_s3c_probe()
566 host->ops = &sdhci_s3c_ops; in sdhci_s3c_probe()
567 host->quirks = 0; in sdhci_s3c_probe()
568 host->quirks2 = 0; in sdhci_s3c_probe()
569 host->irq = irq; in sdhci_s3c_probe()
572 host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC; in sdhci_s3c_probe()
573 host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT; in sdhci_s3c_probe()
575 host->quirks |= drv_data->sdhci_quirks; in sdhci_s3c_probe()
576 sc->no_divider = drv_data->no_divider; in sdhci_s3c_probe()
583 host->quirks |= SDHCI_QUIRK_BROKEN_DMA; in sdhci_s3c_probe()
587 /* It seems we do not get an DATA transfer complete on non-busy in sdhci_s3c_probe()
590 host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ; in sdhci_s3c_probe()
593 host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12; in sdhci_s3c_probe()
596 host->quirks |= SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC; in sdhci_s3c_probe()
598 if (pdata->cd_type == S3C_SDHCI_CD_NONE || in sdhci_s3c_probe()
599 pdata->cd_type == S3C_SDHCI_CD_PERMANENT) in sdhci_s3c_probe()
600 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; in sdhci_s3c_probe()
602 if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT) in sdhci_s3c_probe()
603 host->mmc->caps = MMC_CAP_NONREMOVABLE; in sdhci_s3c_probe()
605 switch (pdata->max_width) { in sdhci_s3c_probe()
607 host->mmc->caps |= MMC_CAP_8_BIT_DATA; in sdhci_s3c_probe()
610 host->mmc->caps |= MMC_CAP_4_BIT_DATA; in sdhci_s3c_probe()
614 if (pdata->pm_caps) in sdhci_s3c_probe()
615 host->mmc->pm_caps |= pdata->pm_caps; in sdhci_s3c_probe()
617 host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR | in sdhci_s3c_probe()
621 host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK; in sdhci_s3c_probe()
627 if (sc->no_divider) { in sdhci_s3c_probe()
634 if (pdata->host_caps) in sdhci_s3c_probe()
635 host->mmc->caps |= pdata->host_caps; in sdhci_s3c_probe()
637 if (pdata->host_caps2) in sdhci_s3c_probe()
638 host->mmc->caps2 |= pdata->host_caps2; in sdhci_s3c_probe()
640 pm_runtime_enable(&pdev->dev); in sdhci_s3c_probe()
641 pm_runtime_set_autosuspend_delay(&pdev->dev, 50); in sdhci_s3c_probe()
642 pm_runtime_use_autosuspend(&pdev->dev); in sdhci_s3c_probe()
643 pm_suspend_ignore_children(&pdev->dev, 1); in sdhci_s3c_probe()
645 ret = mmc_of_parse(host->mmc); in sdhci_s3c_probe()
654 if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL) in sdhci_s3c_probe()
655 clk_disable_unprepare(sc->clk_io); in sdhci_s3c_probe()
660 pm_runtime_disable(&pdev->dev); in sdhci_s3c_probe()
663 clk_disable_unprepare(sc->clk_io); in sdhci_s3c_probe()
676 if (sc->ext_cd_irq) in sdhci_s3c_remove()
677 free_irq(sc->ext_cd_irq, sc); in sdhci_s3c_remove()
680 if (sc->pdata->cd_type != S3C_SDHCI_CD_INTERNAL) in sdhci_s3c_remove()
681 clk_prepare_enable(sc->clk_io); in sdhci_s3c_remove()
685 pm_runtime_dont_use_autosuspend(&pdev->dev); in sdhci_s3c_remove()
686 pm_runtime_disable(&pdev->dev); in sdhci_s3c_remove()
688 clk_disable_unprepare(sc->clk_io); in sdhci_s3c_remove()
700 if (host->tuning_mode != SDHCI_TUNING_MODE_3) in sdhci_s3c_suspend()
701 mmc_retune_needed(host->mmc); in sdhci_s3c_suspend()
719 struct clk *busclk = ourhost->clk_io; in sdhci_s3c_runtime_suspend()
724 if (host->tuning_mode != SDHCI_TUNING_MODE_3) in sdhci_s3c_runtime_suspend()
725 mmc_retune_needed(host->mmc); in sdhci_s3c_runtime_suspend()
727 if (ourhost->cur_clk >= 0) in sdhci_s3c_runtime_suspend()
728 clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]); in sdhci_s3c_runtime_suspend()
737 struct clk *busclk = ourhost->clk_io; in sdhci_s3c_runtime_resume()
741 if (ourhost->cur_clk >= 0) in sdhci_s3c_runtime_resume()
742 clk_prepare_enable(ourhost->clk_bus[ourhost->cur_clk]); in sdhci_s3c_runtime_resume()
756 .name = "s3c-sdhci",
769 { .compatible = "samsung,s3c6410-sdhci", },
770 { .compatible = "samsung,exynos4210-sdhci",
782 .name = "s3c-sdhci",