59 #define ESDHC_MIX_CTRL			0x48  macro
616 				val = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_readw_le()
634 			u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_readw_le()
677 			u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writew_le()
696 			writel(m, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writew_le()
712 			u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writew_le()
719 			writel(m, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writew_le()
860 				new_val = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writeb_le()
862 						host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writeb_le()
1046 	reg = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_prepare_tuning()
1049 	writel(reg, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_prepare_tuning()
1062 	reg = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_post_tuning()
1065 	writel(reg, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_post_tuning()
1109 	m = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_hs400_enhanced_strobe()
1114 	writel(m, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_hs400_enhanced_strobe()
1209 			ctrl = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_reset_tuning()
1212 			writel(ctrl, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_reset_tuning()
1245 	m = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_set_uhs_signaling()
1256 		writel(m, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_set_uhs_signaling()
1261 		writel(m, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_set_uhs_signaling()
1275 		writel(m, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_set_uhs_signaling()
1653 		writel(0x0, host->ioaddr + ESDHC_MIX_CTRL);  in sdhci_esdhc_imx_probe()