Lines Matching refs:WRITE_REG_CMD
97 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CMD0, 0xFF, in sd_cmd_set_sd_cmd()
104 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, blocks); in sd_cmd_set_data_len()
105 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, blocks >> 8); in sd_cmd_set_data_len()
106 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, blksz); in sd_cmd_set_data_len()
107 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, blksz >> 8); in sd_cmd_set_data_len()
246 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type); in sd_send_cmd_get_rsp()
247 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE, in sd_send_cmd_get_rsp()
249 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, in sd_send_cmd_get_rsp()
348 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, in sd_read_data()
352 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in sd_read_data()
355 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, in sd_read_data()
408 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, in sd_write_data()
411 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, 0xFF, in sd_write_data()
454 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0, in sd_read_long_data()
456 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC3, in sd_read_long_data()
458 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC2, in sd_read_long_data()
460 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC1, in sd_read_long_data()
462 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC0, 0xFF, (u8)data_len); in sd_read_long_data()
463 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMACTL, in sd_read_long_data()
466 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE, in sd_read_long_data()
468 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2 | resp_type); in sd_read_long_data()
469 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, 0xFF, in sd_read_long_data()
513 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0, in sd_write_long_data()
515 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC3, in sd_write_long_data()
517 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC2, in sd_write_long_data()
519 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC1, in sd_write_long_data()
521 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC0, 0xFF, (u8)data_len); in sd_write_long_data()
522 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMACTL, in sd_write_long_data()
525 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE, in sd_write_long_data()
527 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2); in sd_write_long_data()
528 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, 0xFF, in sd_write_long_data()
924 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL); in sd_power_on()
925 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_SHARE_MODE, in sd_power_on()
927 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, in sd_power_on()
988 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0); in sd_power_off()
989 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0); in sd_power_off()
1025 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG1, in sd_set_timing()
1028 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in sd_set_timing()
1030 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, in sd_set_timing()
1032 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
1037 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG1, in sd_set_timing()
1040 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in sd_set_timing()
1042 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, in sd_set_timing()
1044 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
1045 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_PUSH_POINT_CTL, in sd_set_timing()
1047 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL, in sd_set_timing()
1054 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG1, in sd_set_timing()
1056 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in sd_set_timing()
1058 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, in sd_set_timing()
1060 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
1061 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_PUSH_POINT_CTL, in sd_set_timing()
1063 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL, in sd_set_timing()
1068 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in sd_set_timing()
1070 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in sd_set_timing()
1072 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, in sd_set_timing()
1074 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
1075 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in sd_set_timing()
1077 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL, in sd_set_timing()