Lines Matching refs:src_clk_freq
457 u32 src_clk_freq; /* source clock frequency */ member
887 if (hz >= (host->src_clk_freq >> 2)) { in msdc_set_mclk()
889 sclk = host->src_clk_freq >> 2; /* sclk = clk / 4 */ in msdc_set_mclk()
891 div = (host->src_clk_freq + ((hz << 2) - 1)) / (hz << 2); in msdc_set_mclk()
892 sclk = (host->src_clk_freq >> 2) / div; in msdc_set_mclk()
897 hz >= (host->src_clk_freq >> 1)) { in msdc_set_mclk()
904 sclk = host->src_clk_freq >> 1; in msdc_set_mclk()
907 } else if (hz >= host->src_clk_freq) { in msdc_set_mclk()
910 sclk = host->src_clk_freq; in msdc_set_mclk()
913 if (hz >= (host->src_clk_freq >> 1)) { in msdc_set_mclk()
915 sclk = host->src_clk_freq >> 1; /* sclk = clk / 2 */ in msdc_set_mclk()
917 div = (host->src_clk_freq + ((hz << 2) - 1)) / (hz << 2); in msdc_set_mclk()
918 sclk = (host->src_clk_freq >> 2) / div; in msdc_set_mclk()
2704 host->src_clk_freq = clk_get_rate(host->src_clk); in msdc_drv_probe()
2708 mmc->f_min = DIV_ROUND_UP(host->src_clk_freq, 4 * 255); in msdc_drv_probe()
2710 mmc->f_min = DIV_ROUND_UP(host->src_clk_freq, 4 * 4095); in msdc_drv_probe()