Lines Matching +full:mmci +full:- +full:gpio +full:- +full:supply
1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/mmc/host/mmci.c - ARM PrimeCell MMCI PL180/1 driver
6 * Copyright (C) 2010 ST-Ericsson SA
26 #include <linux/mmc/slot-gpio.h>
33 #include <linux/dma-mapping.h>
34 #include <linux/amba/mmci.h>
39 #include <linux/gpio/consumer.h>
44 #include "mmci.h"
46 #define DRIVER_NAME "mmci-pl18x"
342 spin_lock_irqsave(&host->lock, flags); in mmci_card_busy()
343 if (readl(host->base + MMCISTATUS) & host->variant->busy_detect_flag) in mmci_card_busy()
345 spin_unlock_irqrestore(&host->lock, flags); in mmci_card_busy()
359 if (host->cclk < 25000000) in mmci_reg_delay()
366 * This must be called with host->lock held
370 if (host->clk_reg != clk) { in mmci_write_clkreg()
371 host->clk_reg = clk; in mmci_write_clkreg()
372 writel(clk, host->base + MMCICLOCK); in mmci_write_clkreg()
377 * This must be called with host->lock held
381 if (host->pwr_reg != pwr) { in mmci_write_pwrreg()
382 host->pwr_reg = pwr; in mmci_write_pwrreg()
383 writel(pwr, host->base + MMCIPOWER); in mmci_write_pwrreg()
388 * This must be called with host->lock held
393 datactrl |= host->datactrl_reg & host->variant->busy_dpsm_flag; in mmci_write_datactrlreg()
395 if (host->datactrl_reg != datactrl) { in mmci_write_datactrlreg()
396 host->datactrl_reg = datactrl; in mmci_write_datactrlreg()
397 writel(datactrl, host->base + MMCIDATACTRL); in mmci_write_datactrlreg()
402 * This must be called with host->lock held
406 struct variant_data *variant = host->variant; in mmci_set_clkreg()
407 u32 clk = variant->clkreg; in mmci_set_clkreg()
410 host->cclk = 0; in mmci_set_clkreg()
413 if (variant->explicit_mclk_control) { in mmci_set_clkreg()
414 host->cclk = host->mclk; in mmci_set_clkreg()
415 } else if (desired >= host->mclk) { in mmci_set_clkreg()
417 if (variant->st_clkdiv) in mmci_set_clkreg()
419 host->cclk = host->mclk; in mmci_set_clkreg()
420 } else if (variant->st_clkdiv) { in mmci_set_clkreg()
423 * => clkdiv = (mclk / f) - 2 in mmci_set_clkreg()
427 clk = DIV_ROUND_UP(host->mclk, desired) - 2; in mmci_set_clkreg()
430 host->cclk = host->mclk / (clk + 2); in mmci_set_clkreg()
434 * => clkdiv = mclk / (2 * f) - 1 in mmci_set_clkreg()
436 clk = host->mclk / (2 * desired) - 1; in mmci_set_clkreg()
439 host->cclk = host->mclk / (2 * (clk + 1)); in mmci_set_clkreg()
442 clk |= variant->clkreg_enable; in mmci_set_clkreg()
449 host->mmc->actual_clock = host->cclk; in mmci_set_clkreg()
451 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) in mmci_set_clkreg()
453 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) in mmci_set_clkreg()
454 clk |= variant->clkreg_8bit_bus_enable; in mmci_set_clkreg()
456 if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50 || in mmci_set_clkreg()
457 host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) in mmci_set_clkreg()
458 clk |= variant->clkreg_neg_edge_enable; in mmci_set_clkreg()
465 if (host->ops && host->ops->dma_release) in mmci_dma_release()
466 host->ops->dma_release(host); in mmci_dma_release()
468 host->use_dma = false; in mmci_dma_release()
473 if (!host->ops || !host->ops->dma_setup) in mmci_dma_setup()
476 if (host->ops->dma_setup(host)) in mmci_dma_setup()
480 host->next_cookie = 1; in mmci_dma_setup()
482 host->use_dma = true; in mmci_dma_setup()
491 struct variant_data *variant = host->variant; in mmci_validate_data()
495 if (!is_power_of_2(data->blksz) && !variant->datactrl_any_blocksz) { in mmci_validate_data()
496 dev_err(mmc_dev(host->mmc), in mmci_validate_data()
497 "unsupported block size (%d bytes)\n", data->blksz); in mmci_validate_data()
498 return -EINVAL; in mmci_validate_data()
501 if (host->ops && host->ops->validate_data) in mmci_validate_data()
502 return host->ops->validate_data(host, data); in mmci_validate_data()
511 if (!host->ops || !host->ops->prep_data) in mmci_prep_data()
514 err = host->ops->prep_data(host, data, next); in mmci_prep_data()
517 data->host_cookie = ++host->next_cookie < 0 ? in mmci_prep_data()
518 1 : host->next_cookie; in mmci_prep_data()
526 if (host->ops && host->ops->unprep_data) in mmci_unprep_data()
527 host->ops->unprep_data(host, data, err); in mmci_unprep_data()
529 data->host_cookie = 0; in mmci_unprep_data()
534 WARN_ON(data->host_cookie && data->host_cookie != host->next_cookie); in mmci_get_next_data()
536 if (host->ops && host->ops->get_next_data) in mmci_get_next_data()
537 host->ops->get_next_data(host, data); in mmci_get_next_data()
542 struct mmc_data *data = host->data; in mmci_dma_start()
545 if (!host->use_dma) in mmci_dma_start()
546 return -EINVAL; in mmci_dma_start()
552 if (!host->ops || !host->ops->dma_start) in mmci_dma_start()
553 return -EINVAL; in mmci_dma_start()
556 dev_vdbg(mmc_dev(host->mmc), in mmci_dma_start()
557 "Submit MMCI DMA job, sglen %d blksz %04x blks %04x flags %08x\n", in mmci_dma_start()
558 data->sg_len, data->blksz, data->blocks, data->flags); in mmci_dma_start()
560 ret = host->ops->dma_start(host, &datactrl); in mmci_dma_start()
568 * Let the MMCI say when the data is ended and it's time in mmci_dma_start()
569 * to fire next DMA request. When that happens, MMCI will in mmci_dma_start()
572 writel(readl(host->base + MMCIMASK0) | MCI_DATAENDMASK, in mmci_dma_start()
573 host->base + MMCIMASK0); in mmci_dma_start()
579 if (!host->use_dma) in mmci_dma_finalize()
582 if (host->ops && host->ops->dma_finalize) in mmci_dma_finalize()
583 host->ops->dma_finalize(host, data); in mmci_dma_finalize()
588 if (!host->use_dma) in mmci_dma_error()
591 if (host->ops && host->ops->dma_error) in mmci_dma_error()
592 host->ops->dma_error(host); in mmci_dma_error()
598 writel(0, host->base + MMCICOMMAND); in mmci_request_end()
600 BUG_ON(host->data); in mmci_request_end()
602 host->mrq = NULL; in mmci_request_end()
603 host->cmd = NULL; in mmci_request_end()
605 mmc_request_done(host->mmc, mrq); in mmci_request_end()
610 void __iomem *base = host->base; in mmci_set_mask1()
611 struct variant_data *variant = host->variant; in mmci_set_mask1()
613 if (host->singleirq) { in mmci_set_mask1()
616 mask0 &= ~variant->irq_pio_mask; in mmci_set_mask1()
622 if (variant->mmcimask1) in mmci_set_mask1()
625 host->mask1_reg = mask; in mmci_set_mask1()
632 host->data = NULL; in mmci_stop_data()
639 if (data->flags & MMC_DATA_READ) in mmci_init_sg()
644 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in mmci_init_sg()
654 return MCI_DPSM_ENABLE | (host->data->blksz << 16); in ux500v2_get_dctrl_cfg()
659 void __iomem *base = host->base; in ux500_busy_complete()
664 * command in-progress, waiting for busy signaling to end, in ux500_busy_complete()
665 * store the status in host->busy_status. in ux500_busy_complete()
668 * it starts signaling busy on DAT0, hence re-read the in ux500_busy_complete()
674 if (!host->busy_status && !(status & err_msk) && in ux500_busy_complete()
675 (readl(base + MMCISTATUS) & host->variant->busy_detect_flag)) { in ux500_busy_complete()
677 host->variant->busy_detect_mask, in ux500_busy_complete()
680 host->busy_status = status & (MCI_CMDSENT | MCI_CMDRESPEND); in ux500_busy_complete()
685 * If there is a command in-progress that has been successfully in ux500_busy_complete()
695 if (host->busy_status && in ux500_busy_complete()
696 (status & host->variant->busy_detect_flag)) { in ux500_busy_complete()
697 writel(host->variant->busy_detect_mask, base + MMCICLEAR); in ux500_busy_complete()
702 * If there is a command in-progress that has been successfully in ux500_busy_complete()
707 if (host->busy_status) { in ux500_busy_complete()
708 writel(host->variant->busy_detect_mask, base + MMCICLEAR); in ux500_busy_complete()
711 ~host->variant->busy_detect_mask, base + MMCIMASK0); in ux500_busy_complete()
712 host->busy_status = 0; in ux500_busy_complete()
742 dmae = devm_kzalloc(mmc_dev(host->mmc), sizeof(*dmae), GFP_KERNEL); in mmci_dmae_setup()
744 return -ENOMEM; in mmci_dmae_setup()
746 host->dma_priv = dmae; in mmci_dmae_setup()
748 dmae->rx_channel = dma_request_chan(mmc_dev(host->mmc), "rx"); in mmci_dmae_setup()
749 if (IS_ERR(dmae->rx_channel)) { in mmci_dmae_setup()
750 int ret = PTR_ERR(dmae->rx_channel); in mmci_dmae_setup()
751 dmae->rx_channel = NULL; in mmci_dmae_setup()
755 dmae->tx_channel = dma_request_chan(mmc_dev(host->mmc), "tx"); in mmci_dmae_setup()
756 if (IS_ERR(dmae->tx_channel)) { in mmci_dmae_setup()
757 if (PTR_ERR(dmae->tx_channel) == -EPROBE_DEFER) in mmci_dmae_setup()
758 dev_warn(mmc_dev(host->mmc), in mmci_dmae_setup()
760 dmae->tx_channel = NULL; in mmci_dmae_setup()
768 if (dmae->rx_channel && !dmae->tx_channel) in mmci_dmae_setup()
769 dmae->tx_channel = dmae->rx_channel; in mmci_dmae_setup()
771 if (dmae->rx_channel) in mmci_dmae_setup()
772 rxname = dma_chan_name(dmae->rx_channel); in mmci_dmae_setup()
776 if (dmae->tx_channel) in mmci_dmae_setup()
777 txname = dma_chan_name(dmae->tx_channel); in mmci_dmae_setup()
781 dev_info(mmc_dev(host->mmc), "DMA channels RX %s, TX %s\n", in mmci_dmae_setup()
788 if (dmae->tx_channel) { in mmci_dmae_setup()
789 struct device *dev = dmae->tx_channel->device->dev; in mmci_dmae_setup()
792 if (max_seg_size < host->mmc->max_seg_size) in mmci_dmae_setup()
793 host->mmc->max_seg_size = max_seg_size; in mmci_dmae_setup()
795 if (dmae->rx_channel) { in mmci_dmae_setup()
796 struct device *dev = dmae->rx_channel->device->dev; in mmci_dmae_setup()
799 if (max_seg_size < host->mmc->max_seg_size) in mmci_dmae_setup()
800 host->mmc->max_seg_size = max_seg_size; in mmci_dmae_setup()
803 if (!dmae->tx_channel || !dmae->rx_channel) { in mmci_dmae_setup()
805 return -EINVAL; in mmci_dmae_setup()
817 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_release()
819 if (dmae->rx_channel) in mmci_dmae_release()
820 dma_release_channel(dmae->rx_channel); in mmci_dmae_release()
821 if (dmae->tx_channel) in mmci_dmae_release()
822 dma_release_channel(dmae->tx_channel); in mmci_dmae_release()
823 dmae->rx_channel = dmae->tx_channel = NULL; in mmci_dmae_release()
828 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dma_unmap()
831 if (data->flags & MMC_DATA_READ) in mmci_dma_unmap()
832 chan = dmae->rx_channel; in mmci_dma_unmap()
834 chan = dmae->tx_channel; in mmci_dma_unmap()
836 dma_unmap_sg(chan->device->dev, data->sg, data->sg_len, in mmci_dma_unmap()
842 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_error()
847 dev_err(mmc_dev(host->mmc), "error during DMA transfer!\n"); in mmci_dmae_error()
848 dmaengine_terminate_all(dmae->cur); in mmci_dmae_error()
849 host->dma_in_progress = false; in mmci_dmae_error()
850 dmae->cur = NULL; in mmci_dmae_error()
851 dmae->desc_current = NULL; in mmci_dmae_error()
852 host->data->host_cookie = 0; in mmci_dmae_error()
854 mmci_dma_unmap(host, host->data); in mmci_dmae_error()
859 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_finalize()
868 status = readl(host->base + MMCISTATUS); in mmci_dmae_finalize()
875 * Check to see whether we still have some data left in the FIFO - in mmci_dmae_finalize()
877 * DMALBREQ and DMALSREQ signals while allowing us to DMA to non- in mmci_dmae_finalize()
882 if (!data->error) in mmci_dmae_finalize()
883 data->error = -EIO; in mmci_dmae_finalize()
884 } else if (!data->host_cookie) { in mmci_dmae_finalize()
889 * Use of DMA with scatter-gather is impossible. in mmci_dmae_finalize()
893 dev_err(mmc_dev(host->mmc), "buggy DMA detected. Taking evasive action.\n"); in mmci_dmae_finalize()
897 host->dma_in_progress = false; in mmci_dmae_finalize()
898 dmae->cur = NULL; in mmci_dmae_finalize()
899 dmae->desc_current = NULL; in mmci_dmae_finalize()
902 /* prepares DMA channel and DMA descriptor, returns non-zero on failure */
907 struct mmci_dmae_priv *dmae = host->dma_priv; in _mmci_dmae_prep_data()
908 struct variant_data *variant = host->variant; in _mmci_dmae_prep_data()
910 .src_addr = host->phybase + MMCIFIFO, in _mmci_dmae_prep_data()
911 .dst_addr = host->phybase + MMCIFIFO, in _mmci_dmae_prep_data()
914 .src_maxburst = variant->fifohalfsize >> 2, /* # of words */ in _mmci_dmae_prep_data()
915 .dst_maxburst = variant->fifohalfsize >> 2, /* # of words */ in _mmci_dmae_prep_data()
924 if (data->flags & MMC_DATA_READ) { in _mmci_dmae_prep_data()
926 chan = dmae->rx_channel; in _mmci_dmae_prep_data()
929 chan = dmae->tx_channel; in _mmci_dmae_prep_data()
934 return -EINVAL; in _mmci_dmae_prep_data()
937 if (data->blksz * data->blocks <= variant->fifosize) in _mmci_dmae_prep_data()
938 return -EINVAL; in _mmci_dmae_prep_data()
943 * - The Ux500 DMA controller (DMA40) in _mmci_dmae_prep_data()
944 * - The MMCI DMA interface on the Ux500 in _mmci_dmae_prep_data()
949 if (host->variant->dma_power_of_2 && !is_power_of_2(data->blksz)) in _mmci_dmae_prep_data()
950 return -EINVAL; in _mmci_dmae_prep_data()
952 device = chan->device; in _mmci_dmae_prep_data()
953 nr_sg = dma_map_sg(device->dev, data->sg, data->sg_len, in _mmci_dmae_prep_data()
956 return -EINVAL; in _mmci_dmae_prep_data()
958 if (host->variant->qcom_dml) in _mmci_dmae_prep_data()
962 desc = dmaengine_prep_slave_sg(chan, data->sg, nr_sg, in _mmci_dmae_prep_data()
973 dma_unmap_sg(device->dev, data->sg, data->sg_len, in _mmci_dmae_prep_data()
975 return -ENOMEM; in _mmci_dmae_prep_data()
982 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_prep_data()
983 struct mmci_dmae_next *nd = &dmae->next_data; in mmci_dmae_prep_data()
985 if (!host->use_dma) in mmci_dmae_prep_data()
986 return -EINVAL; in mmci_dmae_prep_data()
989 return _mmci_dmae_prep_data(host, data, &nd->chan, &nd->desc); in mmci_dmae_prep_data()
991 if (dmae->cur && dmae->desc_current) in mmci_dmae_prep_data()
995 return _mmci_dmae_prep_data(host, data, &dmae->cur, in mmci_dmae_prep_data()
996 &dmae->desc_current); in mmci_dmae_prep_data()
1001 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_start()
1004 host->dma_in_progress = true; in mmci_dmae_start()
1005 ret = dma_submit_error(dmaengine_submit(dmae->desc_current)); in mmci_dmae_start()
1007 host->dma_in_progress = false; in mmci_dmae_start()
1010 dma_async_issue_pending(dmae->cur); in mmci_dmae_start()
1019 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_get_next_data()
1020 struct mmci_dmae_next *next = &dmae->next_data; in mmci_dmae_get_next_data()
1022 if (!host->use_dma) in mmci_dmae_get_next_data()
1025 WARN_ON(!data->host_cookie && (next->desc || next->chan)); in mmci_dmae_get_next_data()
1027 dmae->desc_current = next->desc; in mmci_dmae_get_next_data()
1028 dmae->cur = next->chan; in mmci_dmae_get_next_data()
1029 next->desc = NULL; in mmci_dmae_get_next_data()
1030 next->chan = NULL; in mmci_dmae_get_next_data()
1037 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_unprep_data()
1039 if (!host->use_dma) in mmci_dmae_unprep_data()
1045 struct mmci_dmae_next *next = &dmae->next_data; in mmci_dmae_unprep_data()
1047 if (data->flags & MMC_DATA_READ) in mmci_dmae_unprep_data()
1048 chan = dmae->rx_channel; in mmci_dmae_unprep_data()
1050 chan = dmae->tx_channel; in mmci_dmae_unprep_data()
1053 if (dmae->desc_current == next->desc) in mmci_dmae_unprep_data()
1054 dmae->desc_current = NULL; in mmci_dmae_unprep_data()
1056 if (dmae->cur == next->chan) { in mmci_dmae_unprep_data()
1057 host->dma_in_progress = false; in mmci_dmae_unprep_data()
1058 dmae->cur = NULL; in mmci_dmae_unprep_data()
1061 next->desc = NULL; in mmci_dmae_unprep_data()
1062 next->chan = NULL; in mmci_dmae_unprep_data()
1085 host->ops = &mmci_variant_ops; in mmci_variant_init()
1090 host->ops = &mmci_variant_ops; in ux500_variant_init()
1091 host->ops->busy_complete = ux500_busy_complete; in ux500_variant_init()
1096 host->ops = &mmci_variant_ops; in ux500v2_variant_init()
1097 host->ops->busy_complete = ux500_busy_complete; in ux500v2_variant_init()
1098 host->ops->get_datactrl_cfg = ux500v2_get_dctrl_cfg; in ux500v2_variant_init()
1104 struct mmc_data *data = mrq->data; in mmci_pre_request()
1109 WARN_ON(data->host_cookie); in mmci_pre_request()
1121 struct mmc_data *data = mrq->data; in mmci_post_request()
1123 if (!data || !data->host_cookie) in mmci_post_request()
1131 struct variant_data *variant = host->variant; in mmci_start_data()
1136 dev_dbg(mmc_dev(host->mmc), "blksz %04x blks %04x flags %08x\n", in mmci_start_data()
1137 data->blksz, data->blocks, data->flags); in mmci_start_data()
1139 host->data = data; in mmci_start_data()
1140 host->size = data->blksz * data->blocks; in mmci_start_data()
1141 data->bytes_xfered = 0; in mmci_start_data()
1143 clks = (unsigned long long)data->timeout_ns * host->cclk; in mmci_start_data()
1146 timeout = data->timeout_clks + (unsigned int)clks; in mmci_start_data()
1148 base = host->base; in mmci_start_data()
1150 writel(host->size, base + MMCIDATALENGTH); in mmci_start_data()
1152 datactrl = host->ops->get_datactrl_cfg(host); in mmci_start_data()
1153 datactrl |= host->data->flags & MMC_DATA_READ ? MCI_DPSM_DIRECTION : 0; in mmci_start_data()
1155 if (host->mmc->card && mmc_card_sdio(host->mmc->card)) { in mmci_start_data()
1158 datactrl |= variant->datactrl_mask_sdio; in mmci_start_data()
1166 if (variant->st_sdio && data->flags & MMC_DATA_WRITE && in mmci_start_data()
1167 (host->size < 8 || in mmci_start_data()
1168 (host->size <= 8 && host->mclk > 50000000))) in mmci_start_data()
1169 clk = host->clk_reg & ~variant->clkreg_enable; in mmci_start_data()
1171 clk = host->clk_reg | variant->clkreg_enable; in mmci_start_data()
1176 if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50 || in mmci_start_data()
1177 host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) in mmci_start_data()
1178 datactrl |= variant->datactrl_mask_ddrmode; in mmci_start_data()
1190 if (data->flags & MMC_DATA_READ) { in mmci_start_data()
1194 * If we have less than the fifo 'half-full' threshold to in mmci_start_data()
1198 if (host->size < variant->fifohalfsize) in mmci_start_data()
1216 void __iomem *base = host->base; in mmci_start_command()
1219 dev_dbg(mmc_dev(host->mmc), "op %02x arg %08x flags %08x\n", in mmci_start_command()
1220 cmd->opcode, cmd->arg, cmd->flags); in mmci_start_command()
1222 if (readl(base + MMCICOMMAND) & host->variant->cmdreg_cpsm_enable) { in mmci_start_command()
1227 if (host->variant->cmdreg_stop && in mmci_start_command()
1228 cmd->opcode == MMC_STOP_TRANSMISSION) in mmci_start_command()
1229 c |= host->variant->cmdreg_stop; in mmci_start_command()
1231 c |= cmd->opcode | host->variant->cmdreg_cpsm_enable; in mmci_start_command()
1232 if (cmd->flags & MMC_RSP_PRESENT) { in mmci_start_command()
1233 if (cmd->flags & MMC_RSP_136) in mmci_start_command()
1234 c |= host->variant->cmdreg_lrsp_crc; in mmci_start_command()
1235 else if (cmd->flags & MMC_RSP_CRC) in mmci_start_command()
1236 c |= host->variant->cmdreg_srsp_crc; in mmci_start_command()
1238 c |= host->variant->cmdreg_srsp; in mmci_start_command()
1241 if (host->variant->busy_timeout && cmd->flags & MMC_RSP_BUSY) { in mmci_start_command()
1242 if (!cmd->busy_timeout) in mmci_start_command()
1243 cmd->busy_timeout = 10 * MSEC_PER_SEC; in mmci_start_command()
1245 if (cmd->busy_timeout > host->mmc->max_busy_timeout) in mmci_start_command()
1246 clks = (unsigned long long)host->mmc->max_busy_timeout * host->cclk; in mmci_start_command()
1248 clks = (unsigned long long)cmd->busy_timeout * host->cclk; in mmci_start_command()
1251 writel_relaxed(clks, host->base + MMCIDATATIMER); in mmci_start_command()
1254 if (host->ops->pre_sig_volt_switch && cmd->opcode == SD_SWITCH_VOLTAGE) in mmci_start_command()
1255 host->ops->pre_sig_volt_switch(host); in mmci_start_command()
1261 c |= host->variant->data_cmd_enable; in mmci_start_command()
1263 host->cmd = cmd; in mmci_start_command()
1265 writel(cmd->arg, base + MMCIARGUMENT); in mmci_start_command()
1271 host->stop_abort.error = 0; in mmci_stop_command()
1272 mmci_start_command(host, &host->stop_abort, 0); in mmci_stop_command()
1286 status_err = status & (host->variant->start_err | in mmci_data_irq()
1300 * can be as much as a FIFO-worth of data ahead. This in mmci_data_irq()
1303 if (!host->variant->datacnt_useless) { in mmci_data_irq()
1304 remain = readl(host->base + MMCIDATACNT); in mmci_data_irq()
1305 success = data->blksz * data->blocks - remain; in mmci_data_irq()
1310 dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ, status 0x%08x at 0x%08x\n", in mmci_data_irq()
1314 success -= 1; in mmci_data_irq()
1315 data->error = -EILSEQ; in mmci_data_irq()
1317 data->error = -ETIMEDOUT; in mmci_data_irq()
1319 data->error = -ECOMM; in mmci_data_irq()
1321 data->error = -EIO; in mmci_data_irq()
1323 if (success > host->variant->fifosize) in mmci_data_irq()
1324 success -= host->variant->fifosize; in mmci_data_irq()
1327 data->error = -EIO; in mmci_data_irq()
1329 data->bytes_xfered = round_down(success, data->blksz); in mmci_data_irq()
1333 dev_err(mmc_dev(host->mmc), "stray MCI_DATABLOCKEND interrupt\n"); in mmci_data_irq()
1335 if (status & MCI_DATAEND || data->error) { in mmci_data_irq()
1340 if (!data->error) in mmci_data_irq()
1342 data->bytes_xfered = data->blksz * data->blocks; in mmci_data_irq()
1344 if (!data->stop) { in mmci_data_irq()
1345 if (host->variant->cmdreg_stop && data->error) in mmci_data_irq()
1348 mmci_request_end(host, data->mrq); in mmci_data_irq()
1349 } else if (host->mrq->sbc && !data->error) { in mmci_data_irq()
1350 mmci_request_end(host, data->mrq); in mmci_data_irq()
1352 mmci_start_command(host, data->stop, 0); in mmci_data_irq()
1362 void __iomem *base = host->base; in mmci_cmd_irq()
1368 sbc = (cmd == host->mrq->sbc); in mmci_cmd_irq()
1369 busy_resp = !!(cmd->flags & MMC_RSP_BUSY); in mmci_cmd_irq()
1376 if (host->variant->busy_timeout && busy_resp) in mmci_cmd_irq()
1379 if (!((status | host->busy_status) & in mmci_cmd_irq()
1384 if (busy_resp && host->variant->busy_detect) in mmci_cmd_irq()
1385 if (!host->ops->busy_complete(host, status, err_msk)) in mmci_cmd_irq()
1388 host->cmd = NULL; in mmci_cmd_irq()
1391 cmd->error = -ETIMEDOUT; in mmci_cmd_irq()
1392 } else if (status & MCI_CMDCRCFAIL && cmd->flags & MMC_RSP_CRC) { in mmci_cmd_irq()
1393 cmd->error = -EILSEQ; in mmci_cmd_irq()
1394 } else if (host->variant->busy_timeout && busy_resp && in mmci_cmd_irq()
1396 cmd->error = -ETIMEDOUT; in mmci_cmd_irq()
1399 * a hardware reset of the MMCI block. in mmci_cmd_irq()
1401 host->irq_action = IRQ_WAKE_THREAD; in mmci_cmd_irq()
1403 cmd->resp[0] = readl(base + MMCIRESPONSE0); in mmci_cmd_irq()
1404 cmd->resp[1] = readl(base + MMCIRESPONSE1); in mmci_cmd_irq()
1405 cmd->resp[2] = readl(base + MMCIRESPONSE2); in mmci_cmd_irq()
1406 cmd->resp[3] = readl(base + MMCIRESPONSE3); in mmci_cmd_irq()
1409 if ((!sbc && !cmd->data) || cmd->error) { in mmci_cmd_irq()
1410 if (host->data) { in mmci_cmd_irq()
1415 if (host->variant->cmdreg_stop && cmd->error) { in mmci_cmd_irq()
1421 if (host->irq_action != IRQ_WAKE_THREAD) in mmci_cmd_irq()
1422 mmci_request_end(host, host->mrq); in mmci_cmd_irq()
1425 mmci_start_command(host, host->mrq->cmd, 0); in mmci_cmd_irq()
1426 } else if (!host->variant->datactrl_first && in mmci_cmd_irq()
1427 !(cmd->data->flags & MMC_DATA_READ)) { in mmci_cmd_irq()
1428 mmci_start_data(host, cmd->data); in mmci_cmd_irq()
1434 return remain - (readl(host->base + MMCIFIFOCNT) << 2); in mmci_get_rx_fifocnt()
1444 return host->variant->fifohalfsize; in mmci_qcom_get_rx_fifocnt()
1453 void __iomem *base = host->base; in mmci_pio_read()
1455 u32 status = readl(host->base + MMCISTATUS); in mmci_pio_read()
1456 int host_remain = host->size; in mmci_pio_read()
1459 int count = host->get_rx_fifocnt(host, status, host_remain); in mmci_pio_read()
1471 * while only doing full 32-bit reads towards the FIFO. in mmci_pio_read()
1487 remain -= count; in mmci_pio_read()
1488 host_remain -= count; in mmci_pio_read()
1496 return ptr - buffer; in mmci_pio_read()
1501 struct variant_data *variant = host->variant; in mmci_pio_write()
1502 void __iomem *base = host->base; in mmci_pio_write()
1509 variant->fifosize : variant->fifohalfsize; in mmci_pio_write()
1515 * etc), and the FIFO only accept full 32-bit writes. in mmci_pio_write()
1523 remain -= count; in mmci_pio_write()
1531 return ptr - buffer; in mmci_pio_write()
1540 struct sg_mapping_iter *sg_miter = &host->sg_miter; in mmci_pio_irq()
1541 struct variant_data *variant = host->variant; in mmci_pio_irq()
1542 void __iomem *base = host->base; in mmci_pio_irq()
1547 dev_dbg(mmc_dev(host->mmc), "irq1 (pio) %08x\n", status); in mmci_pio_irq()
1554 * For write, we only need to test the half-empty flag in mmci_pio_irq()
1555 * here - if the FIFO is completely empty, then by in mmci_pio_irq()
1566 buffer = sg_miter->addr; in mmci_pio_irq()
1567 remain = sg_miter->length; in mmci_pio_irq()
1575 sg_miter->consumed = len; in mmci_pio_irq()
1577 host->size -= len; in mmci_pio_irq()
1578 remain -= len; in mmci_pio_irq()
1589 * If we have less than the fifo 'half-full' threshold to transfer, in mmci_pio_irq()
1592 if (status & MCI_RXACTIVE && host->size < variant->fifohalfsize) in mmci_pio_irq()
1601 if (host->size == 0) { in mmci_pio_irq()
1617 spin_lock(&host->lock); in mmci_irq()
1618 host->irq_action = IRQ_HANDLED; in mmci_irq()
1621 status = readl(host->base + MMCISTATUS); in mmci_irq()
1625 if (host->singleirq) { in mmci_irq()
1626 if (status & host->mask1_reg) in mmci_irq()
1629 status &= ~host->variant->irq_pio_mask; in mmci_irq()
1636 status &= readl(host->base + MMCIMASK0); in mmci_irq()
1637 if (host->variant->busy_detect) in mmci_irq()
1638 writel(status & ~host->variant->busy_detect_mask, in mmci_irq()
1639 host->base + MMCICLEAR); in mmci_irq()
1641 writel(status, host->base + MMCICLEAR); in mmci_irq()
1643 dev_dbg(mmc_dev(host->mmc), "irq0 (data+cmd) %08x\n", status); in mmci_irq()
1645 if (host->variant->reversed_irq_handling) { in mmci_irq()
1646 mmci_data_irq(host, host->data, status); in mmci_irq()
1647 mmci_cmd_irq(host, host->cmd, status); in mmci_irq()
1649 mmci_cmd_irq(host, host->cmd, status); in mmci_irq()
1650 mmci_data_irq(host, host->data, status); in mmci_irq()
1657 if (host->variant->busy_detect_flag) in mmci_irq()
1658 status &= ~host->variant->busy_detect_flag; in mmci_irq()
1662 spin_unlock(&host->lock); in mmci_irq()
1664 return host->irq_action; in mmci_irq()
1668 * mmci_irq_thread() - A threaded IRQ handler that manages a reset of the HW.
1671 * causes the DPSM to stay busy (non-functional).
1678 if (host->rst) { in mmci_irq_thread()
1679 reset_control_assert(host->rst); in mmci_irq_thread()
1681 reset_control_deassert(host->rst); in mmci_irq_thread()
1684 spin_lock_irqsave(&host->lock, flags); in mmci_irq_thread()
1685 writel(host->clk_reg, host->base + MMCICLOCK); in mmci_irq_thread()
1686 writel(host->pwr_reg, host->base + MMCIPOWER); in mmci_irq_thread()
1687 writel(MCI_IRQENABLE | host->variant->start_err, in mmci_irq_thread()
1688 host->base + MMCIMASK0); in mmci_irq_thread()
1690 host->irq_action = IRQ_HANDLED; in mmci_irq_thread()
1691 mmci_request_end(host, host->mrq); in mmci_irq_thread()
1692 spin_unlock_irqrestore(&host->lock, flags); in mmci_irq_thread()
1694 return host->irq_action; in mmci_irq_thread()
1702 WARN_ON(host->mrq != NULL); in mmci_request()
1704 mrq->cmd->error = mmci_validate_data(host, mrq->data); in mmci_request()
1705 if (mrq->cmd->error) { in mmci_request()
1710 spin_lock_irqsave(&host->lock, flags); in mmci_request()
1712 host->mrq = mrq; in mmci_request()
1714 if (mrq->data) in mmci_request()
1715 mmci_get_next_data(host, mrq->data); in mmci_request()
1717 if (mrq->data && in mmci_request()
1718 (host->variant->datactrl_first || mrq->data->flags & MMC_DATA_READ)) in mmci_request()
1719 mmci_start_data(host, mrq->data); in mmci_request()
1721 if (mrq->sbc) in mmci_request()
1722 mmci_start_command(host, mrq->sbc, 0); in mmci_request()
1724 mmci_start_command(host, mrq->cmd, 0); in mmci_request()
1726 spin_unlock_irqrestore(&host->lock, flags); in mmci_request()
1734 if (!host->variant->busy_detect) in mmci_set_max_busy_timeout()
1737 if (host->variant->busy_timeout && mmc->actual_clock) in mmci_set_max_busy_timeout()
1738 max_busy_timeout = ~0UL / (mmc->actual_clock / MSEC_PER_SEC); in mmci_set_max_busy_timeout()
1740 mmc->max_busy_timeout = max_busy_timeout; in mmci_set_max_busy_timeout()
1746 struct variant_data *variant = host->variant; in mmci_set_ios()
1751 switch (ios->power_mode) { in mmci_set_ios()
1753 if (!IS_ERR(mmc->supply.vmmc)) in mmci_set_ios()
1754 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); in mmci_set_ios()
1756 if (!IS_ERR(mmc->supply.vqmmc) && host->vqmmc_enabled) { in mmci_set_ios()
1757 regulator_disable(mmc->supply.vqmmc); in mmci_set_ios()
1758 host->vqmmc_enabled = false; in mmci_set_ios()
1763 if (!IS_ERR(mmc->supply.vmmc)) in mmci_set_ios()
1764 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd); in mmci_set_ios()
1771 pwr |= variant->pwrreg_powerup; in mmci_set_ios()
1775 if (!IS_ERR(mmc->supply.vqmmc) && !host->vqmmc_enabled) { in mmci_set_ios()
1776 ret = regulator_enable(mmc->supply.vqmmc); in mmci_set_ios()
1781 host->vqmmc_enabled = true; in mmci_set_ios()
1788 if (variant->signal_direction && ios->power_mode != MMC_POWER_OFF) { in mmci_set_ios()
1792 * the SD/MMC bus and feedback-clock usage. in mmci_set_ios()
1794 pwr |= host->pwr_reg_add; in mmci_set_ios()
1796 if (ios->bus_width == MMC_BUS_WIDTH_4) in mmci_set_ios()
1798 else if (ios->bus_width == MMC_BUS_WIDTH_1) in mmci_set_ios()
1804 if (variant->opendrain) { in mmci_set_ios()
1805 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) in mmci_set_ios()
1806 pwr |= variant->opendrain; in mmci_set_ios()
1812 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) in mmci_set_ios()
1813 pinctrl_select_state(host->pinctrl, host->pins_opendrain); in mmci_set_ios()
1822 if (!ios->clock && variant->pwrreg_clkgate) in mmci_set_ios()
1825 if (host->variant->explicit_mclk_control && in mmci_set_ios()
1826 ios->clock != host->clock_cache) { in mmci_set_ios()
1827 ret = clk_set_rate(host->clk, ios->clock); in mmci_set_ios()
1829 dev_err(mmc_dev(host->mmc), in mmci_set_ios()
1832 host->mclk = clk_get_rate(host->clk); in mmci_set_ios()
1834 host->clock_cache = ios->clock; in mmci_set_ios()
1836 spin_lock_irqsave(&host->lock, flags); in mmci_set_ios()
1838 if (host->ops && host->ops->set_clkreg) in mmci_set_ios()
1839 host->ops->set_clkreg(host, ios->clock); in mmci_set_ios()
1841 mmci_set_clkreg(host, ios->clock); in mmci_set_ios()
1845 if (host->ops && host->ops->set_pwrreg) in mmci_set_ios()
1846 host->ops->set_pwrreg(host, pwr); in mmci_set_ios()
1852 spin_unlock_irqrestore(&host->lock, flags); in mmci_set_ios()
1858 struct mmci_platform_data *plat = host->plat; in mmci_get_cd()
1861 if (status == -ENOSYS) { in mmci_get_cd()
1862 if (!plat->status) in mmci_get_cd()
1865 status = plat->status(mmc_dev(host->mmc)); in mmci_get_cd()
1877 if (!ret && host->ops && host->ops->post_sig_volt_switch) in mmci_sig_volt_switch()
1878 ret = host->ops->post_sig_volt_switch(host, ios); in mmci_sig_volt_switch()
1908 * Assume the level translator is present if st,use-ckin is set. in mmci_probe_level_translator()
1911 host->clk_reg_add |= MCI_STM32_CLK_SELCKIN; in mmci_probe_level_translator()
1942 host->clk_reg_add &= ~MCI_STM32_CLK_SELCKIN; in mmci_probe_level_translator()
1965 if (of_get_property(np, "st,sig-dir-dat0", NULL)) in mmci_of_parse()
1966 host->pwr_reg_add |= MCI_ST_DATA0DIREN; in mmci_of_parse()
1967 if (of_get_property(np, "st,sig-dir-dat2", NULL)) in mmci_of_parse()
1968 host->pwr_reg_add |= MCI_ST_DATA2DIREN; in mmci_of_parse()
1969 if (of_get_property(np, "st,sig-dir-dat31", NULL)) in mmci_of_parse()
1970 host->pwr_reg_add |= MCI_ST_DATA31DIREN; in mmci_of_parse()
1971 if (of_get_property(np, "st,sig-dir-dat74", NULL)) in mmci_of_parse()
1972 host->pwr_reg_add |= MCI_ST_DATA74DIREN; in mmci_of_parse()
1973 if (of_get_property(np, "st,sig-dir-cmd", NULL)) in mmci_of_parse()
1974 host->pwr_reg_add |= MCI_ST_CMDDIREN; in mmci_of_parse()
1975 if (of_get_property(np, "st,sig-pin-fbclk", NULL)) in mmci_of_parse()
1976 host->pwr_reg_add |= MCI_ST_FBCLKEN; in mmci_of_parse()
1977 if (of_get_property(np, "st,sig-dir", NULL)) in mmci_of_parse()
1978 host->pwr_reg_add |= MCI_STM32_DIRPOL; in mmci_of_parse()
1979 if (of_get_property(np, "st,neg-edge", NULL)) in mmci_of_parse()
1980 host->clk_reg_add |= MCI_STM32_CLK_NEGEDGE; in mmci_of_parse()
1981 if (of_get_property(np, "st,use-ckin", NULL)) in mmci_of_parse()
1984 if (of_get_property(np, "mmc-cap-mmc-highspeed", NULL)) in mmci_of_parse()
1985 mmc->caps |= MMC_CAP_MMC_HIGHSPEED; in mmci_of_parse()
1986 if (of_get_property(np, "mmc-cap-sd-highspeed", NULL)) in mmci_of_parse()
1987 mmc->caps |= MMC_CAP_SD_HIGHSPEED; in mmci_of_parse()
1995 struct mmci_platform_data *plat = dev->dev.platform_data; in mmci_probe()
1996 struct device_node *np = dev->dev.of_node; in mmci_probe()
1997 struct variant_data *variant = id->data; in mmci_probe()
2004 dev_err(&dev->dev, "No plat data or DT found\n"); in mmci_probe()
2005 return -EINVAL; in mmci_probe()
2009 plat = devm_kzalloc(&dev->dev, sizeof(*plat), GFP_KERNEL); in mmci_probe()
2011 return -ENOMEM; in mmci_probe()
2014 mmc = mmc_alloc_host(sizeof(struct mmci_host), &dev->dev); in mmci_probe()
2016 return -ENOMEM; in mmci_probe()
2019 host->mmc = mmc; in mmci_probe()
2020 host->mmc_ops = &mmci_ops; in mmci_probe()
2021 mmc->ops = &mmci_ops; in mmci_probe()
2031 if (!variant->opendrain) { in mmci_probe()
2032 host->pinctrl = devm_pinctrl_get(&dev->dev); in mmci_probe()
2033 if (IS_ERR(host->pinctrl)) { in mmci_probe()
2034 dev_err(&dev->dev, "failed to get pinctrl"); in mmci_probe()
2035 ret = PTR_ERR(host->pinctrl); in mmci_probe()
2039 host->pins_opendrain = pinctrl_lookup_state(host->pinctrl, in mmci_probe()
2041 if (IS_ERR(host->pins_opendrain)) { in mmci_probe()
2043 ret = PTR_ERR(host->pins_opendrain); in mmci_probe()
2048 host->hw_designer = amba_manf(dev); in mmci_probe()
2049 host->hw_revision = amba_rev(dev); in mmci_probe()
2050 dev_dbg(mmc_dev(mmc), "designer ID = 0x%02x\n", host->hw_designer); in mmci_probe()
2051 dev_dbg(mmc_dev(mmc), "revision = 0x%01x\n", host->hw_revision); in mmci_probe()
2053 host->clk = devm_clk_get(&dev->dev, NULL); in mmci_probe()
2054 if (IS_ERR(host->clk)) { in mmci_probe()
2055 ret = PTR_ERR(host->clk); in mmci_probe()
2059 ret = clk_prepare_enable(host->clk); in mmci_probe()
2063 if (variant->qcom_fifo) in mmci_probe()
2064 host->get_rx_fifocnt = mmci_qcom_get_rx_fifocnt; in mmci_probe()
2066 host->get_rx_fifocnt = mmci_get_rx_fifocnt; in mmci_probe()
2068 host->plat = plat; in mmci_probe()
2069 host->variant = variant; in mmci_probe()
2070 host->mclk = clk_get_rate(host->clk); in mmci_probe()
2076 if (host->mclk > variant->f_max) { in mmci_probe()
2077 ret = clk_set_rate(host->clk, variant->f_max); in mmci_probe()
2080 host->mclk = clk_get_rate(host->clk); in mmci_probe()
2082 host->mclk); in mmci_probe()
2085 host->phybase = dev->res.start; in mmci_probe()
2086 host->base = devm_ioremap_resource(&dev->dev, &dev->res); in mmci_probe()
2087 if (IS_ERR(host->base)) { in mmci_probe()
2088 ret = PTR_ERR(host->base); in mmci_probe()
2092 if (variant->init) in mmci_probe()
2093 variant->init(host); in mmci_probe()
2101 if (variant->st_clkdiv) in mmci_probe()
2102 mmc->f_min = DIV_ROUND_UP(host->mclk, 257); in mmci_probe()
2103 else if (variant->stm32_clkdiv) in mmci_probe()
2104 mmc->f_min = DIV_ROUND_UP(host->mclk, 2046); in mmci_probe()
2105 else if (variant->explicit_mclk_control) in mmci_probe()
2106 mmc->f_min = clk_round_rate(host->clk, 100000); in mmci_probe()
2108 mmc->f_min = DIV_ROUND_UP(host->mclk, 512); in mmci_probe()
2115 if (mmc->f_max) in mmci_probe()
2116 mmc->f_max = variant->explicit_mclk_control ? in mmci_probe()
2117 min(variant->f_max, mmc->f_max) : in mmci_probe()
2118 min(host->mclk, mmc->f_max); in mmci_probe()
2120 mmc->f_max = variant->explicit_mclk_control ? in mmci_probe()
2121 fmax : min(host->mclk, fmax); in mmci_probe()
2124 dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max); in mmci_probe()
2126 host->rst = devm_reset_control_get_optional_exclusive(&dev->dev, NULL); in mmci_probe()
2127 if (IS_ERR(host->rst)) { in mmci_probe()
2128 ret = PTR_ERR(host->rst); in mmci_probe()
2131 ret = reset_control_deassert(host->rst); in mmci_probe()
2133 dev_err(mmc_dev(mmc), "failed to de-assert reset\n"); in mmci_probe()
2140 if (!mmc->ocr_avail) in mmci_probe()
2141 mmc->ocr_avail = plat->ocr_mask; in mmci_probe()
2142 else if (plat->ocr_mask) in mmci_probe()
2146 mmc->caps |= MMC_CAP_CMD23; in mmci_probe()
2151 if (variant->busy_detect) { in mmci_probe()
2157 if (variant->busy_dpsm_flag) in mmci_probe()
2159 host->variant->busy_dpsm_flag); in mmci_probe()
2160 mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY; in mmci_probe()
2164 if (variant->busy_timeout) in mmci_probe()
2165 mmc->caps |= MMC_CAP_NEED_RSP_BUSY; in mmci_probe()
2167 /* Prepare a CMD12 - needed to clear the DPSM on some variants. */ in mmci_probe()
2168 host->stop_abort.opcode = MMC_STOP_TRANSMISSION; in mmci_probe()
2169 host->stop_abort.arg = 0; in mmci_probe()
2170 host->stop_abort.flags = MMC_RSP_R1B | MMC_CMD_AC; in mmci_probe()
2173 mmc->pm_caps |= MMC_PM_KEEP_POWER; in mmci_probe()
2178 mmc->max_segs = NR_SG; in mmci_probe()
2182 * register, we must ensure that we don't exceed 2^num-1 bytes in a in mmci_probe()
2185 mmc->max_req_size = (1 << variant->datalength_bits) - 1; in mmci_probe()
2191 mmc->max_seg_size = mmc->max_req_size; in mmci_probe()
2196 mmc->max_blk_size = 1 << variant->datactrl_blocksz; in mmci_probe()
2202 mmc->max_blk_count = mmc->max_req_size >> variant->datactrl_blocksz; in mmci_probe()
2204 spin_lock_init(&host->lock); in mmci_probe()
2206 writel(0, host->base + MMCIMASK0); in mmci_probe()
2208 if (variant->mmcimask1) in mmci_probe()
2209 writel(0, host->base + MMCIMASK1); in mmci_probe()
2211 writel(0xfff, host->base + MMCICLEAR); in mmci_probe()
2215 * - not using DT but using a descriptor table, or in mmci_probe()
2216 * - using a table of descriptors ALONGSIDE DT, or in mmci_probe()
2222 if (ret == -EPROBE_DEFER) in mmci_probe()
2226 if (ret == -EPROBE_DEFER) in mmci_probe()
2230 ret = devm_request_threaded_irq(&dev->dev, dev->irq[0], mmci_irq, in mmci_probe()
2236 if (!dev->irq[1]) in mmci_probe()
2237 host->singleirq = true; in mmci_probe()
2239 ret = devm_request_irq(&dev->dev, dev->irq[1], mmci_pio_irq, in mmci_probe()
2245 writel(MCI_IRQENABLE | variant->start_err, host->base + MMCIMASK0); in mmci_probe()
2249 dev_info(&dev->dev, "%s: PL%03x manf %x rev%u at 0x%08llx irq %d,%d (pio)\n", in mmci_probe()
2251 amba_rev(dev), (unsigned long long)dev->res.start, in mmci_probe()
2252 dev->irq[0], dev->irq[1]); in mmci_probe()
2256 pm_runtime_set_autosuspend_delay(&dev->dev, 50); in mmci_probe()
2257 pm_runtime_use_autosuspend(&dev->dev); in mmci_probe()
2261 pm_runtime_put(&dev->dev); in mmci_probe()
2265 clk_disable_unprepare(host->clk); in mmci_probe()
2277 struct variant_data *variant = host->variant; in mmci_remove()
2283 pm_runtime_get_sync(&dev->dev); in mmci_remove()
2287 writel(0, host->base + MMCIMASK0); in mmci_remove()
2289 if (variant->mmcimask1) in mmci_remove()
2290 writel(0, host->base + MMCIMASK1); in mmci_remove()
2292 writel(0, host->base + MMCICOMMAND); in mmci_remove()
2293 writel(0, host->base + MMCIDATACTRL); in mmci_remove()
2296 clk_disable_unprepare(host->clk); in mmci_remove()
2306 spin_lock_irqsave(&host->lock, flags); in mmci_save()
2308 writel(0, host->base + MMCIMASK0); in mmci_save()
2309 if (host->variant->pwrreg_nopower) { in mmci_save()
2310 writel(0, host->base + MMCIDATACTRL); in mmci_save()
2311 writel(0, host->base + MMCIPOWER); in mmci_save()
2312 writel(0, host->base + MMCICLOCK); in mmci_save()
2316 spin_unlock_irqrestore(&host->lock, flags); in mmci_save()
2323 spin_lock_irqsave(&host->lock, flags); in mmci_restore()
2325 if (host->variant->pwrreg_nopower) { in mmci_restore()
2326 writel(host->clk_reg, host->base + MMCICLOCK); in mmci_restore()
2327 writel(host->datactrl_reg, host->base + MMCIDATACTRL); in mmci_restore()
2328 writel(host->pwr_reg, host->base + MMCIPOWER); in mmci_restore()
2330 writel(MCI_IRQENABLE | host->variant->start_err, in mmci_restore()
2331 host->base + MMCIMASK0); in mmci_restore()
2334 spin_unlock_irqrestore(&host->lock, flags); in mmci_restore()
2346 clk_disable_unprepare(host->clk); in mmci_runtime_suspend()
2359 clk_prepare_enable(host->clk); in mmci_runtime_resume()