Lines Matching full:host
3 * linux/drivers/mmc/host/mmci.c - ARM PrimeCell MMCI PL180/1 driver
23 #include <linux/mmc/host.h>
48 static void mmci_variant_init(struct mmci_host *host);
49 static void ux500_variant_init(struct mmci_host *host);
50 static void ux500v2_variant_init(struct mmci_host *host);
338 struct mmci_host *host = mmc_priv(mmc); in mmci_card_busy() local
342 spin_lock_irqsave(&host->lock, flags); in mmci_card_busy()
343 if (readl(host->base + MMCISTATUS) & host->variant->busy_detect_flag) in mmci_card_busy()
345 spin_unlock_irqrestore(&host->lock, flags); in mmci_card_busy()
350 static void mmci_reg_delay(struct mmci_host *host) in mmci_reg_delay() argument
359 if (host->cclk < 25000000) in mmci_reg_delay()
366 * This must be called with host->lock held
368 void mmci_write_clkreg(struct mmci_host *host, u32 clk) in mmci_write_clkreg() argument
370 if (host->clk_reg != clk) { in mmci_write_clkreg()
371 host->clk_reg = clk; in mmci_write_clkreg()
372 writel(clk, host->base + MMCICLOCK); in mmci_write_clkreg()
377 * This must be called with host->lock held
379 void mmci_write_pwrreg(struct mmci_host *host, u32 pwr) in mmci_write_pwrreg() argument
381 if (host->pwr_reg != pwr) { in mmci_write_pwrreg()
382 host->pwr_reg = pwr; in mmci_write_pwrreg()
383 writel(pwr, host->base + MMCIPOWER); in mmci_write_pwrreg()
388 * This must be called with host->lock held
390 static void mmci_write_datactrlreg(struct mmci_host *host, u32 datactrl) in mmci_write_datactrlreg() argument
393 datactrl |= host->datactrl_reg & host->variant->busy_dpsm_flag; in mmci_write_datactrlreg()
395 if (host->datactrl_reg != datactrl) { in mmci_write_datactrlreg()
396 host->datactrl_reg = datactrl; in mmci_write_datactrlreg()
397 writel(datactrl, host->base + MMCIDATACTRL); in mmci_write_datactrlreg()
402 * This must be called with host->lock held
404 static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) in mmci_set_clkreg() argument
406 struct variant_data *variant = host->variant; in mmci_set_clkreg()
410 host->cclk = 0; in mmci_set_clkreg()
414 host->cclk = host->mclk; in mmci_set_clkreg()
415 } else if (desired >= host->mclk) { in mmci_set_clkreg()
419 host->cclk = host->mclk; in mmci_set_clkreg()
427 clk = DIV_ROUND_UP(host->mclk, desired) - 2; in mmci_set_clkreg()
430 host->cclk = host->mclk / (clk + 2); in mmci_set_clkreg()
436 clk = host->mclk / (2 * desired) - 1; in mmci_set_clkreg()
439 host->cclk = host->mclk / (2 * (clk + 1)); in mmci_set_clkreg()
449 host->mmc->actual_clock = host->cclk; in mmci_set_clkreg()
451 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) in mmci_set_clkreg()
453 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) in mmci_set_clkreg()
456 if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50 || in mmci_set_clkreg()
457 host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) in mmci_set_clkreg()
460 mmci_write_clkreg(host, clk); in mmci_set_clkreg()
463 static void mmci_dma_release(struct mmci_host *host) in mmci_dma_release() argument
465 if (host->ops && host->ops->dma_release) in mmci_dma_release()
466 host->ops->dma_release(host); in mmci_dma_release()
468 host->use_dma = false; in mmci_dma_release()
471 static void mmci_dma_setup(struct mmci_host *host) in mmci_dma_setup() argument
473 if (!host->ops || !host->ops->dma_setup) in mmci_dma_setup()
476 if (host->ops->dma_setup(host)) in mmci_dma_setup()
480 host->next_cookie = 1; in mmci_dma_setup()
482 host->use_dma = true; in mmci_dma_setup()
488 static int mmci_validate_data(struct mmci_host *host, in mmci_validate_data() argument
491 struct variant_data *variant = host->variant; in mmci_validate_data()
496 dev_err(mmc_dev(host->mmc), in mmci_validate_data()
501 if (host->ops && host->ops->validate_data) in mmci_validate_data()
502 return host->ops->validate_data(host, data); in mmci_validate_data()
507 static int mmci_prep_data(struct mmci_host *host, struct mmc_data *data, bool next) in mmci_prep_data() argument
511 if (!host->ops || !host->ops->prep_data) in mmci_prep_data()
514 err = host->ops->prep_data(host, data, next); in mmci_prep_data()
517 data->host_cookie = ++host->next_cookie < 0 ? in mmci_prep_data()
518 1 : host->next_cookie; in mmci_prep_data()
523 static void mmci_unprep_data(struct mmci_host *host, struct mmc_data *data, in mmci_unprep_data() argument
526 if (host->ops && host->ops->unprep_data) in mmci_unprep_data()
527 host->ops->unprep_data(host, data, err); in mmci_unprep_data()
532 static void mmci_get_next_data(struct mmci_host *host, struct mmc_data *data) in mmci_get_next_data() argument
534 WARN_ON(data->host_cookie && data->host_cookie != host->next_cookie); in mmci_get_next_data()
536 if (host->ops && host->ops->get_next_data) in mmci_get_next_data()
537 host->ops->get_next_data(host, data); in mmci_get_next_data()
540 static int mmci_dma_start(struct mmci_host *host, unsigned int datactrl) in mmci_dma_start() argument
542 struct mmc_data *data = host->data; in mmci_dma_start()
545 if (!host->use_dma) in mmci_dma_start()
548 ret = mmci_prep_data(host, data, false); in mmci_dma_start()
552 if (!host->ops || !host->ops->dma_start) in mmci_dma_start()
556 dev_vdbg(mmc_dev(host->mmc), in mmci_dma_start()
560 ret = host->ops->dma_start(host, &datactrl); in mmci_dma_start()
565 mmci_write_datactrlreg(host, datactrl); in mmci_dma_start()
572 writel(readl(host->base + MMCIMASK0) | MCI_DATAENDMASK, in mmci_dma_start()
573 host->base + MMCIMASK0); in mmci_dma_start()
577 static void mmci_dma_finalize(struct mmci_host *host, struct mmc_data *data) in mmci_dma_finalize() argument
579 if (!host->use_dma) in mmci_dma_finalize()
582 if (host->ops && host->ops->dma_finalize) in mmci_dma_finalize()
583 host->ops->dma_finalize(host, data); in mmci_dma_finalize()
586 static void mmci_dma_error(struct mmci_host *host) in mmci_dma_error() argument
588 if (!host->use_dma) in mmci_dma_error()
591 if (host->ops && host->ops->dma_error) in mmci_dma_error()
592 host->ops->dma_error(host); in mmci_dma_error()
596 mmci_request_end(struct mmci_host *host, struct mmc_request *mrq) in mmci_request_end() argument
598 writel(0, host->base + MMCICOMMAND); in mmci_request_end()
600 BUG_ON(host->data); in mmci_request_end()
602 host->mrq = NULL; in mmci_request_end()
603 host->cmd = NULL; in mmci_request_end()
605 mmc_request_done(host->mmc, mrq); in mmci_request_end()
608 static void mmci_set_mask1(struct mmci_host *host, unsigned int mask) in mmci_set_mask1() argument
610 void __iomem *base = host->base; in mmci_set_mask1()
611 struct variant_data *variant = host->variant; in mmci_set_mask1()
613 if (host->singleirq) { in mmci_set_mask1()
625 host->mask1_reg = mask; in mmci_set_mask1()
628 static void mmci_stop_data(struct mmci_host *host) in mmci_stop_data() argument
630 mmci_write_datactrlreg(host, 0); in mmci_stop_data()
631 mmci_set_mask1(host, 0); in mmci_stop_data()
632 host->data = NULL; in mmci_stop_data()
635 static void mmci_init_sg(struct mmci_host *host, struct mmc_data *data) in mmci_init_sg() argument
644 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in mmci_init_sg()
647 static u32 mmci_get_dctrl_cfg(struct mmci_host *host) in mmci_get_dctrl_cfg() argument
649 return MCI_DPSM_ENABLE | mmci_dctrl_blksz(host); in mmci_get_dctrl_cfg()
652 static u32 ux500v2_get_dctrl_cfg(struct mmci_host *host) in ux500v2_get_dctrl_cfg() argument
654 return MCI_DPSM_ENABLE | (host->data->blksz << 16); in ux500v2_get_dctrl_cfg()
657 static bool ux500_busy_complete(struct mmci_host *host, u32 status, u32 err_msk) in ux500_busy_complete() argument
659 void __iomem *base = host->base; in ux500_busy_complete()
665 * store the status in host->busy_status. in ux500_busy_complete()
674 if (!host->busy_status && !(status & err_msk) && in ux500_busy_complete()
675 (readl(base + MMCISTATUS) & host->variant->busy_detect_flag)) { in ux500_busy_complete()
677 host->variant->busy_detect_mask, in ux500_busy_complete()
680 host->busy_status = status & (MCI_CMDSENT | MCI_CMDRESPEND); in ux500_busy_complete()
695 if (host->busy_status && in ux500_busy_complete()
696 (status & host->variant->busy_detect_flag)) { in ux500_busy_complete()
697 writel(host->variant->busy_detect_mask, base + MMCICLEAR); in ux500_busy_complete()
707 if (host->busy_status) { in ux500_busy_complete()
708 writel(host->variant->busy_detect_mask, base + MMCICLEAR); in ux500_busy_complete()
711 ~host->variant->busy_detect_mask, base + MMCIMASK0); in ux500_busy_complete()
712 host->busy_status = 0; in ux500_busy_complete()
737 int mmci_dmae_setup(struct mmci_host *host) in mmci_dmae_setup() argument
742 dmae = devm_kzalloc(mmc_dev(host->mmc), sizeof(*dmae), GFP_KERNEL); in mmci_dmae_setup()
746 host->dma_priv = dmae; in mmci_dmae_setup()
748 dmae->rx_channel = dma_request_chan(mmc_dev(host->mmc), "rx"); in mmci_dmae_setup()
755 dmae->tx_channel = dma_request_chan(mmc_dev(host->mmc), "tx"); in mmci_dmae_setup()
758 dev_warn(mmc_dev(host->mmc), in mmci_dmae_setup()
781 dev_info(mmc_dev(host->mmc), "DMA channels RX %s, TX %s\n", in mmci_dmae_setup()
792 if (max_seg_size < host->mmc->max_seg_size) in mmci_dmae_setup()
793 host->mmc->max_seg_size = max_seg_size; in mmci_dmae_setup()
799 if (max_seg_size < host->mmc->max_seg_size) in mmci_dmae_setup()
800 host->mmc->max_seg_size = max_seg_size; in mmci_dmae_setup()
804 mmci_dmae_release(host); in mmci_dmae_setup()
815 void mmci_dmae_release(struct mmci_host *host) in mmci_dmae_release() argument
817 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_release()
826 static void mmci_dma_unmap(struct mmci_host *host, struct mmc_data *data) in mmci_dma_unmap() argument
828 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dma_unmap()
840 void mmci_dmae_error(struct mmci_host *host) in mmci_dmae_error() argument
842 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_error()
844 if (!dma_inprogress(host)) in mmci_dmae_error()
847 dev_err(mmc_dev(host->mmc), "error during DMA transfer!\n"); in mmci_dmae_error()
849 host->dma_in_progress = false; in mmci_dmae_error()
852 host->data->host_cookie = 0; in mmci_dmae_error()
854 mmci_dma_unmap(host, host->data); in mmci_dmae_error()
857 void mmci_dmae_finalize(struct mmci_host *host, struct mmc_data *data) in mmci_dmae_finalize() argument
859 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_finalize()
863 if (!dma_inprogress(host)) in mmci_dmae_finalize()
868 status = readl(host->base + MMCISTATUS); in mmci_dmae_finalize()
881 mmci_dma_error(host); in mmci_dmae_finalize()
885 mmci_dma_unmap(host, data); in mmci_dmae_finalize()
893 dev_err(mmc_dev(host->mmc), "buggy DMA detected. Taking evasive action.\n"); in mmci_dmae_finalize()
894 mmci_dma_release(host); in mmci_dmae_finalize()
897 host->dma_in_progress = false; in mmci_dmae_finalize()
903 static int _mmci_dmae_prep_data(struct mmci_host *host, struct mmc_data *data, in _mmci_dmae_prep_data() argument
907 struct mmci_dmae_priv *dmae = host->dma_priv; in _mmci_dmae_prep_data()
908 struct variant_data *variant = host->variant; in _mmci_dmae_prep_data()
910 .src_addr = host->phybase + MMCIFIFO, in _mmci_dmae_prep_data()
911 .dst_addr = host->phybase + MMCIFIFO, in _mmci_dmae_prep_data()
949 if (host->variant->dma_power_of_2 && !is_power_of_2(data->blksz)) in _mmci_dmae_prep_data()
958 if (host->variant->qcom_dml) in _mmci_dmae_prep_data()
978 int mmci_dmae_prep_data(struct mmci_host *host, in mmci_dmae_prep_data() argument
982 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_prep_data()
985 if (!host->use_dma) in mmci_dmae_prep_data()
989 return _mmci_dmae_prep_data(host, data, &nd->chan, &nd->desc); in mmci_dmae_prep_data()
995 return _mmci_dmae_prep_data(host, data, &dmae->cur, in mmci_dmae_prep_data()
999 int mmci_dmae_start(struct mmci_host *host, unsigned int *datactrl) in mmci_dmae_start() argument
1001 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_start()
1004 host->dma_in_progress = true; in mmci_dmae_start()
1007 host->dma_in_progress = false; in mmci_dmae_start()
1017 void mmci_dmae_get_next_data(struct mmci_host *host, struct mmc_data *data) in mmci_dmae_get_next_data() argument
1019 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_get_next_data()
1022 if (!host->use_dma) in mmci_dmae_get_next_data()
1033 void mmci_dmae_unprep_data(struct mmci_host *host, in mmci_dmae_unprep_data() argument
1037 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_unprep_data()
1039 if (!host->use_dma) in mmci_dmae_unprep_data()
1042 mmci_dma_unmap(host, data); in mmci_dmae_unprep_data()
1057 host->dma_in_progress = false; in mmci_dmae_unprep_data()
1083 static void mmci_variant_init(struct mmci_host *host) in mmci_variant_init() argument
1085 host->ops = &mmci_variant_ops; in mmci_variant_init()
1088 static void ux500_variant_init(struct mmci_host *host) in ux500_variant_init() argument
1090 host->ops = &mmci_variant_ops; in ux500_variant_init()
1091 host->ops->busy_complete = ux500_busy_complete; in ux500_variant_init()
1094 static void ux500v2_variant_init(struct mmci_host *host) in ux500v2_variant_init() argument
1096 host->ops = &mmci_variant_ops; in ux500v2_variant_init()
1097 host->ops->busy_complete = ux500_busy_complete; in ux500v2_variant_init()
1098 host->ops->get_datactrl_cfg = ux500v2_get_dctrl_cfg; in ux500v2_variant_init()
1103 struct mmci_host *host = mmc_priv(mmc); in mmci_pre_request() local
1111 if (mmci_validate_data(host, data)) in mmci_pre_request()
1114 mmci_prep_data(host, data, true); in mmci_pre_request()
1120 struct mmci_host *host = mmc_priv(mmc); in mmci_post_request() local
1126 mmci_unprep_data(host, data, err); in mmci_post_request()
1129 static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) in mmci_start_data() argument
1131 struct variant_data *variant = host->variant; in mmci_start_data()
1136 dev_dbg(mmc_dev(host->mmc), "blksz %04x blks %04x flags %08x\n", in mmci_start_data()
1139 host->data = data; in mmci_start_data()
1140 host->size = data->blksz * data->blocks; in mmci_start_data()
1143 clks = (unsigned long long)data->timeout_ns * host->cclk; in mmci_start_data()
1148 base = host->base; in mmci_start_data()
1150 writel(host->size, base + MMCIDATALENGTH); in mmci_start_data()
1152 datactrl = host->ops->get_datactrl_cfg(host); in mmci_start_data()
1153 datactrl |= host->data->flags & MMC_DATA_READ ? MCI_DPSM_DIRECTION : 0; in mmci_start_data()
1155 if (host->mmc->card && mmc_card_sdio(host->mmc->card)) { in mmci_start_data()
1167 (host->size < 8 || in mmci_start_data()
1168 (host->size <= 8 && host->mclk > 50000000))) in mmci_start_data()
1169 clk = host->clk_reg & ~variant->clkreg_enable; in mmci_start_data()
1171 clk = host->clk_reg | variant->clkreg_enable; in mmci_start_data()
1173 mmci_write_clkreg(host, clk); in mmci_start_data()
1176 if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50 || in mmci_start_data()
1177 host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) in mmci_start_data()
1184 if (!mmci_dma_start(host, datactrl)) in mmci_start_data()
1188 mmci_init_sg(host, data); in mmci_start_data()
1198 if (host->size < variant->fifohalfsize) in mmci_start_data()
1208 mmci_write_datactrlreg(host, datactrl); in mmci_start_data()
1210 mmci_set_mask1(host, irqmask); in mmci_start_data()
1214 mmci_start_command(struct mmci_host *host, struct mmc_command *cmd, u32 c) in mmci_start_command() argument
1216 void __iomem *base = host->base; in mmci_start_command()
1219 dev_dbg(mmc_dev(host->mmc), "op %02x arg %08x flags %08x\n", in mmci_start_command()
1222 if (readl(base + MMCICOMMAND) & host->variant->cmdreg_cpsm_enable) { in mmci_start_command()
1224 mmci_reg_delay(host); in mmci_start_command()
1227 if (host->variant->cmdreg_stop && in mmci_start_command()
1229 c |= host->variant->cmdreg_stop; in mmci_start_command()
1231 c |= cmd->opcode | host->variant->cmdreg_cpsm_enable; in mmci_start_command()
1234 c |= host->variant->cmdreg_lrsp_crc; in mmci_start_command()
1236 c |= host->variant->cmdreg_srsp_crc; in mmci_start_command()
1238 c |= host->variant->cmdreg_srsp; in mmci_start_command()
1241 if (host->variant->busy_timeout && cmd->flags & MMC_RSP_BUSY) { in mmci_start_command()
1245 if (cmd->busy_timeout > host->mmc->max_busy_timeout) in mmci_start_command()
1246 clks = (unsigned long long)host->mmc->max_busy_timeout * host->cclk; in mmci_start_command()
1248 clks = (unsigned long long)cmd->busy_timeout * host->cclk; in mmci_start_command()
1251 writel_relaxed(clks, host->base + MMCIDATATIMER); in mmci_start_command()
1254 if (host->ops->pre_sig_volt_switch && cmd->opcode == SD_SWITCH_VOLTAGE) in mmci_start_command()
1255 host->ops->pre_sig_volt_switch(host); in mmci_start_command()
1261 c |= host->variant->data_cmd_enable; in mmci_start_command()
1263 host->cmd = cmd; in mmci_start_command()
1269 static void mmci_stop_command(struct mmci_host *host) in mmci_stop_command() argument
1271 host->stop_abort.error = 0; in mmci_stop_command()
1272 mmci_start_command(host, &host->stop_abort, 0); in mmci_stop_command()
1276 mmci_data_irq(struct mmci_host *host, struct mmc_data *data, in mmci_data_irq() argument
1286 status_err = status & (host->variant->start_err | in mmci_data_irq()
1294 mmci_dma_error(host); in mmci_data_irq()
1299 * on the MMC bus, not on the host side. On reads, this in mmci_data_irq()
1303 if (!host->variant->datacnt_useless) { in mmci_data_irq()
1304 remain = readl(host->base + MMCIDATACNT); in mmci_data_irq()
1310 dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ, status 0x%08x at 0x%08x\n", in mmci_data_irq()
1323 if (success > host->variant->fifosize) in mmci_data_irq()
1324 success -= host->variant->fifosize; in mmci_data_irq()
1333 dev_err(mmc_dev(host->mmc), "stray MCI_DATABLOCKEND interrupt\n"); in mmci_data_irq()
1336 mmci_dma_finalize(host, data); in mmci_data_irq()
1338 mmci_stop_data(host); in mmci_data_irq()
1345 if (host->variant->cmdreg_stop && data->error) in mmci_data_irq()
1346 mmci_stop_command(host); in mmci_data_irq()
1348 mmci_request_end(host, data->mrq); in mmci_data_irq()
1349 } else if (host->mrq->sbc && !data->error) { in mmci_data_irq()
1350 mmci_request_end(host, data->mrq); in mmci_data_irq()
1352 mmci_start_command(host, data->stop, 0); in mmci_data_irq()
1358 mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd, in mmci_cmd_irq() argument
1362 void __iomem *base = host->base; in mmci_cmd_irq()
1368 sbc = (cmd == host->mrq->sbc); in mmci_cmd_irq()
1376 if (host->variant->busy_timeout && busy_resp) in mmci_cmd_irq()
1379 if (!((status | host->busy_status) & in mmci_cmd_irq()
1384 if (busy_resp && host->variant->busy_detect) in mmci_cmd_irq()
1385 if (!host->ops->busy_complete(host, status, err_msk)) in mmci_cmd_irq()
1388 host->cmd = NULL; in mmci_cmd_irq()
1394 } else if (host->variant->busy_timeout && busy_resp && in mmci_cmd_irq()
1401 host->irq_action = IRQ_WAKE_THREAD; in mmci_cmd_irq()
1410 if (host->data) { in mmci_cmd_irq()
1412 mmci_dma_error(host); in mmci_cmd_irq()
1414 mmci_stop_data(host); in mmci_cmd_irq()
1415 if (host->variant->cmdreg_stop && cmd->error) { in mmci_cmd_irq()
1416 mmci_stop_command(host); in mmci_cmd_irq()
1421 if (host->irq_action != IRQ_WAKE_THREAD) in mmci_cmd_irq()
1422 mmci_request_end(host, host->mrq); in mmci_cmd_irq()
1425 mmci_start_command(host, host->mrq->cmd, 0); in mmci_cmd_irq()
1426 } else if (!host->variant->datactrl_first && in mmci_cmd_irq()
1428 mmci_start_data(host, cmd->data); in mmci_cmd_irq()
1432 static int mmci_get_rx_fifocnt(struct mmci_host *host, u32 status, int remain) in mmci_get_rx_fifocnt() argument
1434 return remain - (readl(host->base + MMCIFIFOCNT) << 2); in mmci_get_rx_fifocnt()
1437 static int mmci_qcom_get_rx_fifocnt(struct mmci_host *host, u32 status, int r) in mmci_qcom_get_rx_fifocnt() argument
1444 return host->variant->fifohalfsize; in mmci_qcom_get_rx_fifocnt()
1451 static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int remain) in mmci_pio_read() argument
1453 void __iomem *base = host->base; in mmci_pio_read()
1455 u32 status = readl(host->base + MMCISTATUS); in mmci_pio_read()
1456 int host_remain = host->size; in mmci_pio_read()
1459 int count = host->get_rx_fifocnt(host, status, host_remain); in mmci_pio_read()
1499 static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int remain, u32 status) in mmci_pio_write() argument
1501 struct variant_data *variant = host->variant; in mmci_pio_write()
1502 void __iomem *base = host->base; in mmci_pio_write()
1539 struct mmci_host *host = dev_id; in mmci_pio_irq() local
1540 struct sg_mapping_iter *sg_miter = &host->sg_miter; in mmci_pio_irq()
1541 struct variant_data *variant = host->variant; in mmci_pio_irq()
1542 void __iomem *base = host->base; in mmci_pio_irq()
1547 dev_dbg(mmc_dev(host->mmc), "irq1 (pio) %08x\n", status); in mmci_pio_irq()
1571 len = mmci_pio_read(host, buffer, remain); in mmci_pio_irq()
1573 len = mmci_pio_write(host, buffer, remain, status); in mmci_pio_irq()
1577 host->size -= len; in mmci_pio_irq()
1592 if (status & MCI_RXACTIVE && host->size < variant->fifohalfsize) in mmci_pio_irq()
1593 mmci_set_mask1(host, MCI_RXDATAAVLBLMASK); in mmci_pio_irq()
1601 if (host->size == 0) { in mmci_pio_irq()
1602 mmci_set_mask1(host, 0); in mmci_pio_irq()
1614 struct mmci_host *host = dev_id; in mmci_irq() local
1617 spin_lock(&host->lock); in mmci_irq()
1618 host->irq_action = IRQ_HANDLED; in mmci_irq()
1621 status = readl(host->base + MMCISTATUS); in mmci_irq()
1625 if (host->singleirq) { in mmci_irq()
1626 if (status & host->mask1_reg) in mmci_irq()
1629 status &= ~host->variant->irq_pio_mask; in mmci_irq()
1636 status &= readl(host->base + MMCIMASK0); in mmci_irq()
1637 if (host->variant->busy_detect) in mmci_irq()
1638 writel(status & ~host->variant->busy_detect_mask, in mmci_irq()
1639 host->base + MMCICLEAR); in mmci_irq()
1641 writel(status, host->base + MMCICLEAR); in mmci_irq()
1643 dev_dbg(mmc_dev(host->mmc), "irq0 (data+cmd) %08x\n", status); in mmci_irq()
1645 if (host->variant->reversed_irq_handling) { in mmci_irq()
1646 mmci_data_irq(host, host->data, status); in mmci_irq()
1647 mmci_cmd_irq(host, host->cmd, status); in mmci_irq()
1649 mmci_cmd_irq(host, host->cmd, status); in mmci_irq()
1650 mmci_data_irq(host, host->data, status); in mmci_irq()
1657 if (host->variant->busy_detect_flag) in mmci_irq()
1658 status &= ~host->variant->busy_detect_flag; in mmci_irq()
1662 spin_unlock(&host->lock); in mmci_irq()
1664 return host->irq_action; in mmci_irq()
1675 struct mmci_host *host = dev_id; in mmci_irq_thread() local
1678 if (host->rst) { in mmci_irq_thread()
1679 reset_control_assert(host->rst); in mmci_irq_thread()
1681 reset_control_deassert(host->rst); in mmci_irq_thread()
1684 spin_lock_irqsave(&host->lock, flags); in mmci_irq_thread()
1685 writel(host->clk_reg, host->base + MMCICLOCK); in mmci_irq_thread()
1686 writel(host->pwr_reg, host->base + MMCIPOWER); in mmci_irq_thread()
1687 writel(MCI_IRQENABLE | host->variant->start_err, in mmci_irq_thread()
1688 host->base + MMCIMASK0); in mmci_irq_thread()
1690 host->irq_action = IRQ_HANDLED; in mmci_irq_thread()
1691 mmci_request_end(host, host->mrq); in mmci_irq_thread()
1692 spin_unlock_irqrestore(&host->lock, flags); in mmci_irq_thread()
1694 return host->irq_action; in mmci_irq_thread()
1699 struct mmci_host *host = mmc_priv(mmc); in mmci_request() local
1702 WARN_ON(host->mrq != NULL); in mmci_request()
1704 mrq->cmd->error = mmci_validate_data(host, mrq->data); in mmci_request()
1710 spin_lock_irqsave(&host->lock, flags); in mmci_request()
1712 host->mrq = mrq; in mmci_request()
1715 mmci_get_next_data(host, mrq->data); in mmci_request()
1718 (host->variant->datactrl_first || mrq->data->flags & MMC_DATA_READ)) in mmci_request()
1719 mmci_start_data(host, mrq->data); in mmci_request()
1722 mmci_start_command(host, mrq->sbc, 0); in mmci_request()
1724 mmci_start_command(host, mrq->cmd, 0); in mmci_request()
1726 spin_unlock_irqrestore(&host->lock, flags); in mmci_request()
1731 struct mmci_host *host = mmc_priv(mmc); in mmci_set_max_busy_timeout() local
1734 if (!host->variant->busy_detect) in mmci_set_max_busy_timeout()
1737 if (host->variant->busy_timeout && mmc->actual_clock) in mmci_set_max_busy_timeout()
1745 struct mmci_host *host = mmc_priv(mmc); in mmci_set_ios() local
1746 struct variant_data *variant = host->variant; in mmci_set_ios()
1756 if (!IS_ERR(mmc->supply.vqmmc) && host->vqmmc_enabled) { in mmci_set_ios()
1758 host->vqmmc_enabled = false; in mmci_set_ios()
1775 if (!IS_ERR(mmc->supply.vqmmc) && !host->vqmmc_enabled) { in mmci_set_ios()
1781 host->vqmmc_enabled = true; in mmci_set_ios()
1794 pwr |= host->pwr_reg_add; in mmci_set_ios()
1813 pinctrl_select_state(host->pinctrl, host->pins_opendrain); in mmci_set_ios()
1825 if (host->variant->explicit_mclk_control && in mmci_set_ios()
1826 ios->clock != host->clock_cache) { in mmci_set_ios()
1827 ret = clk_set_rate(host->clk, ios->clock); in mmci_set_ios()
1829 dev_err(mmc_dev(host->mmc), in mmci_set_ios()
1832 host->mclk = clk_get_rate(host->clk); in mmci_set_ios()
1834 host->clock_cache = ios->clock; in mmci_set_ios()
1836 spin_lock_irqsave(&host->lock, flags); in mmci_set_ios()
1838 if (host->ops && host->ops->set_clkreg) in mmci_set_ios()
1839 host->ops->set_clkreg(host, ios->clock); in mmci_set_ios()
1841 mmci_set_clkreg(host, ios->clock); in mmci_set_ios()
1845 if (host->ops && host->ops->set_pwrreg) in mmci_set_ios()
1846 host->ops->set_pwrreg(host, pwr); in mmci_set_ios()
1848 mmci_write_pwrreg(host, pwr); in mmci_set_ios()
1850 mmci_reg_delay(host); in mmci_set_ios()
1852 spin_unlock_irqrestore(&host->lock, flags); in mmci_set_ios()
1857 struct mmci_host *host = mmc_priv(mmc); in mmci_get_cd() local
1858 struct mmci_platform_data *plat = host->plat; in mmci_get_cd()
1865 status = plat->status(mmc_dev(host->mmc)); in mmci_get_cd()
1872 struct mmci_host *host = mmc_priv(mmc); in mmci_sig_volt_switch() local
1877 if (!ret && host->ops && host->ops->post_sig_volt_switch) in mmci_sig_volt_switch()
1878 ret = host->ops->post_sig_volt_switch(host, ios); in mmci_sig_volt_switch()
1901 struct mmci_host *host = mmc_priv(mmc); in mmci_probe_level_translator() local
1911 host->clk_reg_add |= MCI_STM32_CLK_SELCKIN; in mmci_probe_level_translator()
1942 host->clk_reg_add &= ~MCI_STM32_CLK_SELCKIN; in mmci_probe_level_translator()
1959 struct mmci_host *host = mmc_priv(mmc); in mmci_of_parse() local
1966 host->pwr_reg_add |= MCI_ST_DATA0DIREN; in mmci_of_parse()
1968 host->pwr_reg_add |= MCI_ST_DATA2DIREN; in mmci_of_parse()
1970 host->pwr_reg_add |= MCI_ST_DATA31DIREN; in mmci_of_parse()
1972 host->pwr_reg_add |= MCI_ST_DATA74DIREN; in mmci_of_parse()
1974 host->pwr_reg_add |= MCI_ST_CMDDIREN; in mmci_of_parse()
1976 host->pwr_reg_add |= MCI_ST_FBCLKEN; in mmci_of_parse()
1978 host->pwr_reg_add |= MCI_STM32_DIRPOL; in mmci_of_parse()
1980 host->clk_reg_add |= MCI_STM32_CLK_NEGEDGE; in mmci_of_parse()
1998 struct mmci_host *host; in mmci_probe() local
2018 host = mmc_priv(mmc); in mmci_probe()
2019 host->mmc = mmc; in mmci_probe()
2020 host->mmc_ops = &mmci_ops; in mmci_probe()
2032 host->pinctrl = devm_pinctrl_get(&dev->dev); in mmci_probe()
2033 if (IS_ERR(host->pinctrl)) { in mmci_probe()
2035 ret = PTR_ERR(host->pinctrl); in mmci_probe()
2039 host->pins_opendrain = pinctrl_lookup_state(host->pinctrl, in mmci_probe()
2041 if (IS_ERR(host->pins_opendrain)) { in mmci_probe()
2043 ret = PTR_ERR(host->pins_opendrain); in mmci_probe()
2048 host->hw_designer = amba_manf(dev); in mmci_probe()
2049 host->hw_revision = amba_rev(dev); in mmci_probe()
2050 dev_dbg(mmc_dev(mmc), "designer ID = 0x%02x\n", host->hw_designer); in mmci_probe()
2051 dev_dbg(mmc_dev(mmc), "revision = 0x%01x\n", host->hw_revision); in mmci_probe()
2053 host->clk = devm_clk_get(&dev->dev, NULL); in mmci_probe()
2054 if (IS_ERR(host->clk)) { in mmci_probe()
2055 ret = PTR_ERR(host->clk); in mmci_probe()
2059 ret = clk_prepare_enable(host->clk); in mmci_probe()
2064 host->get_rx_fifocnt = mmci_qcom_get_rx_fifocnt; in mmci_probe()
2066 host->get_rx_fifocnt = mmci_get_rx_fifocnt; in mmci_probe()
2068 host->plat = plat; in mmci_probe()
2069 host->variant = variant; in mmci_probe()
2070 host->mclk = clk_get_rate(host->clk); in mmci_probe()
2076 if (host->mclk > variant->f_max) { in mmci_probe()
2077 ret = clk_set_rate(host->clk, variant->f_max); in mmci_probe()
2080 host->mclk = clk_get_rate(host->clk); in mmci_probe()
2082 host->mclk); in mmci_probe()
2085 host->phybase = dev->res.start; in mmci_probe()
2086 host->base = devm_ioremap_resource(&dev->dev, &dev->res); in mmci_probe()
2087 if (IS_ERR(host->base)) { in mmci_probe()
2088 ret = PTR_ERR(host->base); in mmci_probe()
2093 variant->init(host); in mmci_probe()
2102 mmc->f_min = DIV_ROUND_UP(host->mclk, 257); in mmci_probe()
2104 mmc->f_min = DIV_ROUND_UP(host->mclk, 2046); in mmci_probe()
2106 mmc->f_min = clk_round_rate(host->clk, 100000); in mmci_probe()
2108 mmc->f_min = DIV_ROUND_UP(host->mclk, 512); in mmci_probe()
2118 min(host->mclk, mmc->f_max); in mmci_probe()
2121 fmax : min(host->mclk, fmax); in mmci_probe()
2126 host->rst = devm_reset_control_get_optional_exclusive(&dev->dev, NULL); in mmci_probe()
2127 if (IS_ERR(host->rst)) { in mmci_probe()
2128 ret = PTR_ERR(host->rst); in mmci_probe()
2131 ret = reset_control_deassert(host->rst); in mmci_probe()
2158 mmci_write_datactrlreg(host, in mmci_probe()
2159 host->variant->busy_dpsm_flag); in mmci_probe()
2168 host->stop_abort.opcode = MMC_STOP_TRANSMISSION; in mmci_probe()
2169 host->stop_abort.arg = 0; in mmci_probe()
2170 host->stop_abort.flags = MMC_RSP_R1B | MMC_CMD_AC; in mmci_probe()
2204 spin_lock_init(&host->lock); in mmci_probe()
2206 writel(0, host->base + MMCIMASK0); in mmci_probe()
2209 writel(0, host->base + MMCIMASK1); in mmci_probe()
2211 writel(0xfff, host->base + MMCICLEAR); in mmci_probe()
2232 DRIVER_NAME " (cmd)", host); in mmci_probe()
2237 host->singleirq = true; in mmci_probe()
2240 IRQF_SHARED, DRIVER_NAME " (pio)", host); in mmci_probe()
2245 writel(MCI_IRQENABLE | variant->start_err, host->base + MMCIMASK0); in mmci_probe()
2254 mmci_dma_setup(host); in mmci_probe()
2265 clk_disable_unprepare(host->clk); in mmci_probe()
2276 struct mmci_host *host = mmc_priv(mmc); in mmci_remove() local
2277 struct variant_data *variant = host->variant; in mmci_remove()
2287 writel(0, host->base + MMCIMASK0); in mmci_remove()
2290 writel(0, host->base + MMCIMASK1); in mmci_remove()
2292 writel(0, host->base + MMCICOMMAND); in mmci_remove()
2293 writel(0, host->base + MMCIDATACTRL); in mmci_remove()
2295 mmci_dma_release(host); in mmci_remove()
2296 clk_disable_unprepare(host->clk); in mmci_remove()
2302 static void mmci_save(struct mmci_host *host) in mmci_save() argument
2306 spin_lock_irqsave(&host->lock, flags); in mmci_save()
2308 writel(0, host->base + MMCIMASK0); in mmci_save()
2309 if (host->variant->pwrreg_nopower) { in mmci_save()
2310 writel(0, host->base + MMCIDATACTRL); in mmci_save()
2311 writel(0, host->base + MMCIPOWER); in mmci_save()
2312 writel(0, host->base + MMCICLOCK); in mmci_save()
2314 mmci_reg_delay(host); in mmci_save()
2316 spin_unlock_irqrestore(&host->lock, flags); in mmci_save()
2319 static void mmci_restore(struct mmci_host *host) in mmci_restore() argument
2323 spin_lock_irqsave(&host->lock, flags); in mmci_restore()
2325 if (host->variant->pwrreg_nopower) { in mmci_restore()
2326 writel(host->clk_reg, host->base + MMCICLOCK); in mmci_restore()
2327 writel(host->datactrl_reg, host->base + MMCIDATACTRL); in mmci_restore()
2328 writel(host->pwr_reg, host->base + MMCIPOWER); in mmci_restore()
2330 writel(MCI_IRQENABLE | host->variant->start_err, in mmci_restore()
2331 host->base + MMCIMASK0); in mmci_restore()
2332 mmci_reg_delay(host); in mmci_restore()
2334 spin_unlock_irqrestore(&host->lock, flags); in mmci_restore()
2343 struct mmci_host *host = mmc_priv(mmc); in mmci_runtime_suspend() local
2345 mmci_save(host); in mmci_runtime_suspend()
2346 clk_disable_unprepare(host->clk); in mmci_runtime_suspend()
2358 struct mmci_host *host = mmc_priv(mmc); in mmci_runtime_resume() local
2359 clk_prepare_enable(host->clk); in mmci_runtime_resume()
2360 mmci_restore(host); in mmci_runtime_resume()