Lines Matching +full:sram +full:- +full:supply
1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <linux/dma-mapping.h>
21 #include <linux/mmc/slot-gpio.h>
24 #include <linux/clk-provider.h>
31 #define DRIVER_NAME "meson-gx-mmc"
51 #define CLK_TX_DELAY_MASK(h) (h->data->tx_delay_mask)
52 #define CLK_RX_DELAY_MASK(h) (h->data->rx_delay_mask)
53 #define CLK_ALWAYS_ON(h) (h->data->always_on)
54 #define CLK_IRQ_SDIO_SLEEP(h) (h->data->irq_sdio_sleep)
209 unsigned int timeout = data->timeout_ns / NSEC_PER_MSEC; in meson_mmc_get_timeout_msecs()
221 if (cmd->opcode == MMC_SET_BLOCK_COUNT && !cmd->error) in meson_mmc_get_next_command()
222 return cmd->mrq->cmd; in meson_mmc_get_next_command()
223 else if (mmc_op_multi(cmd->opcode) && in meson_mmc_get_next_command()
224 (!cmd->mrq->sbc || cmd->error || cmd->data->error)) in meson_mmc_get_next_command()
225 return cmd->mrq->stop; in meson_mmc_get_next_command()
234 struct mmc_data *data = mrq->data; in meson_mmc_get_transfer_mode()
240 * support for Chain Mode to directly use the internal SRAM using in meson_mmc_get_transfer_mode()
243 if (host->dram_access_quirk) in meson_mmc_get_transfer_mode()
247 if (data->blocks > 1 || mrq->cmd->opcode == SD_IO_RW_EXTENDED) { in meson_mmc_get_transfer_mode()
256 for_each_sg(data->sg, sg, data->sg_len, i) { in meson_mmc_get_transfer_mode()
257 if (sg->length % data->blksz) { in meson_mmc_get_transfer_mode()
260 sg->length, data->blksz); in meson_mmc_get_transfer_mode()
266 for_each_sg(data->sg, sg, data->sg_len, i) { in meson_mmc_get_transfer_mode()
268 if (sg->offset % 8) { in meson_mmc_get_transfer_mode()
271 sg->offset); in meson_mmc_get_transfer_mode()
276 data->host_cookie |= SD_EMMC_DESC_CHAIN_MODE; in meson_mmc_get_transfer_mode()
281 return data->host_cookie & SD_EMMC_DESC_CHAIN_MODE; in meson_mmc_desc_chain_mode()
286 return data && data->flags & MMC_DATA_READ && in meson_mmc_bounce_buf_read()
292 struct mmc_data *data = mrq->data; in meson_mmc_pre_req()
298 data->host_cookie |= SD_EMMC_PRE_REQ_DONE; in meson_mmc_pre_req()
303 data->sg_count = dma_map_sg(mmc_dev(mmc), data->sg, data->sg_len, in meson_mmc_pre_req()
305 if (!data->sg_count) in meson_mmc_pre_req()
312 struct mmc_data *data = mrq->data; in meson_mmc_post_req()
314 if (data && meson_mmc_desc_chain_mode(data) && data->sg_count) in meson_mmc_post_req()
315 dma_unmap_sg(mmc_dev(mmc), data->sg, data->sg_len, in meson_mmc_post_req()
329 if (host->pins_clk_gate) { in meson_mmc_clk_gate()
330 pinctrl_select_state(host->pinctrl, host->pins_clk_gate); in meson_mmc_clk_gate()
333 * If the pinmux is not provided - default to the classic and in meson_mmc_clk_gate()
336 cfg = readl(host->regs + SD_EMMC_CFG); in meson_mmc_clk_gate()
338 writel(cfg, host->regs + SD_EMMC_CFG); in meson_mmc_clk_gate()
346 if (host->pins_clk_gate) in meson_mmc_clk_ungate()
347 pinctrl_select_default_state(host->dev); in meson_mmc_clk_ungate()
350 cfg = readl(host->regs + SD_EMMC_CFG); in meson_mmc_clk_ungate()
352 writel(cfg, host->regs + SD_EMMC_CFG); in meson_mmc_clk_ungate()
358 struct mmc_host *mmc = host->mmc; in meson_mmc_clk_set()
362 /* Same request - bail-out */ in meson_mmc_clk_set()
363 if (host->ddr == ddr && host->req_rate == rate) in meson_mmc_clk_set()
368 host->req_rate = 0; in meson_mmc_clk_set()
369 mmc->actual_clock = 0; in meson_mmc_clk_set()
376 cfg = readl(host->regs + SD_EMMC_CFG); in meson_mmc_clk_set()
378 writel(cfg, host->regs + SD_EMMC_CFG); in meson_mmc_clk_set()
387 writel(cfg, host->regs + SD_EMMC_CFG); in meson_mmc_clk_set()
388 host->ddr = ddr; in meson_mmc_clk_set()
390 ret = clk_set_rate(host->mmc_clk, rate); in meson_mmc_clk_set()
392 dev_err(host->dev, "Unable to set cfg_div_clk to %lu. ret=%d\n", in meson_mmc_clk_set()
397 host->req_rate = rate; in meson_mmc_clk_set()
398 mmc->actual_clock = clk_get_rate(host->mmc_clk); in meson_mmc_clk_set()
402 host->req_rate >>= 1; in meson_mmc_clk_set()
403 mmc->actual_clock >>= 1; in meson_mmc_clk_set()
406 dev_dbg(host->dev, "clk rate: %u Hz\n", mmc->actual_clock); in meson_mmc_clk_set()
407 if (rate != mmc->actual_clock) in meson_mmc_clk_set()
408 dev_dbg(host->dev, "requested rate was %lu\n", rate); in meson_mmc_clk_set()
439 writel(clk_reg, host->regs + SD_EMMC_CLOCK); in meson_mmc_clk_init()
447 clk = devm_clk_get(host->dev, name); in meson_mmc_clk_init()
449 return dev_err_probe(host->dev, PTR_ERR(clk), in meson_mmc_clk_init()
456 mux = devm_kzalloc(host->dev, sizeof(*mux), GFP_KERNEL); in meson_mmc_clk_init()
458 return -ENOMEM; in meson_mmc_clk_init()
460 snprintf(clk_name, sizeof(clk_name), "%s#mux", dev_name(host->dev)); in meson_mmc_clk_init()
467 mux->reg = host->regs + SD_EMMC_CLOCK; in meson_mmc_clk_init()
468 mux->shift = __ffs(CLK_SRC_MASK); in meson_mmc_clk_init()
469 mux->mask = CLK_SRC_MASK >> mux->shift; in meson_mmc_clk_init()
470 mux->hw.init = &init; in meson_mmc_clk_init()
472 host->mux_clk = devm_clk_register(host->dev, &mux->hw); in meson_mmc_clk_init()
473 if (WARN_ON(IS_ERR(host->mux_clk))) in meson_mmc_clk_init()
474 return PTR_ERR(host->mux_clk); in meson_mmc_clk_init()
477 div = devm_kzalloc(host->dev, sizeof(*div), GFP_KERNEL); in meson_mmc_clk_init()
479 return -ENOMEM; in meson_mmc_clk_init()
481 snprintf(clk_name, sizeof(clk_name), "%s#div", dev_name(host->dev)); in meson_mmc_clk_init()
485 clk_parent[0] = __clk_get_name(host->mux_clk); in meson_mmc_clk_init()
489 div->reg = host->regs + SD_EMMC_CLOCK; in meson_mmc_clk_init()
490 div->shift = __ffs(CLK_DIV_MASK); in meson_mmc_clk_init()
491 div->width = __builtin_popcountl(CLK_DIV_MASK); in meson_mmc_clk_init()
492 div->hw.init = &init; in meson_mmc_clk_init()
493 div->flags = CLK_DIVIDER_ONE_BASED; in meson_mmc_clk_init()
495 host->mmc_clk = devm_clk_register(host->dev, &div->hw); in meson_mmc_clk_init()
496 if (WARN_ON(IS_ERR(host->mmc_clk))) in meson_mmc_clk_init()
497 return PTR_ERR(host->mmc_clk); in meson_mmc_clk_init()
500 host->mmc->f_min = clk_round_rate(host->mmc_clk, 400000); in meson_mmc_clk_init()
501 ret = clk_set_rate(host->mmc_clk, host->mmc->f_min); in meson_mmc_clk_init()
505 return clk_prepare_enable(host->mmc_clk); in meson_mmc_clk_init()
510 unsigned int val = readl(host->regs + host->data->adjust); in meson_mmc_disable_resampling()
513 writel(val, host->regs + host->data->adjust); in meson_mmc_disable_resampling()
522 val = readl(host->regs + host->data->adjust); in meson_mmc_reset_resampling()
524 writel(val, host->regs + host->data->adjust); in meson_mmc_reset_resampling()
534 max_dly = DIV_ROUND_UP(clk_get_rate(host->mux_clk), in meson_mmc_resampling_tuning()
535 clk_get_rate(host->mmc_clk)); in meson_mmc_resampling_tuning()
537 val = readl(host->regs + host->data->adjust); in meson_mmc_resampling_tuning()
539 writel(val, host->regs + host->data->adjust); in meson_mmc_resampling_tuning()
549 writel(val, host->regs + host->data->adjust); in meson_mmc_resampling_tuning()
560 return -EIO; in meson_mmc_resampling_tuning()
568 switch (ios->timing) { in meson_mmc_prepare_ios_clock()
579 return meson_mmc_clk_set(host, ios->clock, ddr); in meson_mmc_prepare_ios_clock()
585 switch (ios->timing) { in meson_mmc_check_resampling()
605 switch (ios->power_mode) { in meson_mmc_set_ios()
607 if (!IS_ERR(mmc->supply.vmmc)) in meson_mmc_set_ios()
608 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); in meson_mmc_set_ios()
610 if (!IS_ERR(mmc->supply.vqmmc) && host->vqmmc_enabled) { in meson_mmc_set_ios()
611 regulator_disable(mmc->supply.vqmmc); in meson_mmc_set_ios()
612 host->vqmmc_enabled = false; in meson_mmc_set_ios()
618 if (!IS_ERR(mmc->supply.vmmc)) in meson_mmc_set_ios()
619 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd); in meson_mmc_set_ios()
624 if (!IS_ERR(mmc->supply.vqmmc) && !host->vqmmc_enabled) { in meson_mmc_set_ios()
625 int ret = regulator_enable(mmc->supply.vqmmc); in meson_mmc_set_ios()
628 dev_err(host->dev, in meson_mmc_set_ios()
631 host->vqmmc_enabled = true; in meson_mmc_set_ios()
638 switch (ios->bus_width) { in meson_mmc_set_ios()
649 dev_err(host->dev, "Invalid ios->bus_width: %u. Setting to 4.\n", in meson_mmc_set_ios()
650 ios->bus_width); in meson_mmc_set_ios()
654 val = readl(host->regs + SD_EMMC_CFG); in meson_mmc_set_ios()
657 writel(val, host->regs + SD_EMMC_CFG); in meson_mmc_set_ios()
662 dev_err(host->dev, "Failed to set clock: %d\n,", err); in meson_mmc_set_ios()
664 dev_dbg(host->dev, "SD_EMMC_CFG: 0x%08x\n", val); in meson_mmc_set_ios()
672 host->cmd = NULL; in meson_mmc_request_done()
673 if (host->needs_pre_post_req) in meson_mmc_request_done()
675 mmc_request_done(host->mmc, mrq); in meson_mmc_request_done()
683 cfg = readl(host->regs + SD_EMMC_CFG); in meson_mmc_set_blksz()
687 dev_err(host->dev, "blksz %u is not a power of 2\n", blksz); in meson_mmc_set_blksz()
691 /* check if block-size matches, if not update */ in meson_mmc_set_blksz()
695 dev_dbg(host->dev, "%s: update blk_len %d -> %d\n", __func__, in meson_mmc_set_blksz()
700 writel(cfg, host->regs + SD_EMMC_CFG); in meson_mmc_set_blksz()
705 if (cmd->flags & MMC_RSP_PRESENT) { in meson_mmc_set_response_bits()
706 if (cmd->flags & MMC_RSP_136) in meson_mmc_set_response_bits()
710 if (!(cmd->flags & MMC_RSP_CRC)) in meson_mmc_set_response_bits()
713 if (cmd->flags & MMC_RSP_BUSY) in meson_mmc_set_response_bits()
723 struct sd_emmc_desc *desc = host->descs; in meson_mmc_desc_chain_transfer()
724 struct mmc_data *data = host->cmd->data; in meson_mmc_desc_chain_transfer()
729 if (data->flags & MMC_DATA_WRITE) in meson_mmc_desc_chain_transfer()
732 if (data->blocks > 1) { in meson_mmc_desc_chain_transfer()
734 meson_mmc_set_blksz(mmc, data->blksz); in meson_mmc_desc_chain_transfer()
737 for_each_sg(data->sg, sg, data->sg_count, i) { in meson_mmc_desc_chain_transfer()
740 if (data->blocks > 1) in meson_mmc_desc_chain_transfer()
741 len /= data->blksz; in meson_mmc_desc_chain_transfer()
747 desc[i].cmd_arg = host->cmd->arg; in meson_mmc_desc_chain_transfer()
751 desc[data->sg_count - 1].cmd_cfg |= CMD_CFG_END_OF_CHAIN; in meson_mmc_desc_chain_transfer()
754 start = host->descs_dma_addr | START_DESC_BUSY; in meson_mmc_desc_chain_transfer()
755 writel(start, host->regs + SD_EMMC_START); in meson_mmc_desc_chain_transfer()
763 struct scatterlist *sgl = data->sg; in meson_mmc_copy_buffer()
764 unsigned int nents = data->sg_len; in meson_mmc_copy_buffer()
780 len = min(miter.length, buflen - offset); in meson_mmc_copy_buffer()
785 writel(*buf++, host->bounce_iomem_buf + offset + buf_offset); in meson_mmc_copy_buffer()
788 left -= 4; in meson_mmc_copy_buffer()
792 *buf++ = readl(host->bounce_iomem_buf + offset + buf_offset); in meson_mmc_copy_buffer()
795 left -= 4; in meson_mmc_copy_buffer()
808 struct mmc_data *data = cmd->data; in meson_mmc_start_cmd()
815 host->cmd = cmd; in meson_mmc_start_cmd()
817 cmd_cfg |= FIELD_PREP(CMD_CFG_CMD_INDEX_MASK, cmd->opcode); in meson_mmc_start_cmd()
825 data->bytes_xfered = 0; in meson_mmc_start_cmd()
835 if (data->blocks > 1) { in meson_mmc_start_cmd()
838 data->blocks); in meson_mmc_start_cmd()
839 meson_mmc_set_blksz(mmc, data->blksz); in meson_mmc_start_cmd()
841 cmd_cfg |= FIELD_PREP(CMD_CFG_LENGTH_MASK, data->blksz); in meson_mmc_start_cmd()
844 xfer_bytes = data->blksz * data->blocks; in meson_mmc_start_cmd()
845 if (data->flags & MMC_DATA_WRITE) { in meson_mmc_start_cmd()
847 WARN_ON(xfer_bytes > host->bounce_buf_size); in meson_mmc_start_cmd()
848 if (host->dram_access_quirk) in meson_mmc_start_cmd()
851 sg_copy_to_buffer(data->sg, data->sg_len, in meson_mmc_start_cmd()
852 host->bounce_buf, xfer_bytes); in meson_mmc_start_cmd()
856 cmd_data = host->bounce_dma_addr & CMD_DATA_MASK; in meson_mmc_start_cmd()
864 writel(cmd_cfg, host->regs + SD_EMMC_CMD_CFG); in meson_mmc_start_cmd()
865 writel(cmd_data, host->regs + SD_EMMC_CMD_DAT); in meson_mmc_start_cmd()
866 writel(0, host->regs + SD_EMMC_CMD_RSP); in meson_mmc_start_cmd()
868 writel(cmd->arg, host->regs + SD_EMMC_CMD_ARG); in meson_mmc_start_cmd()
877 for_each_sg(data->sg, sg, data->sg_len, i) { in meson_mmc_validate_dram_access()
878 if (!IS_ALIGNED(sg->offset, sizeof(u32)) || in meson_mmc_validate_dram_access()
879 !IS_ALIGNED(sg->length, sizeof(u32))) { in meson_mmc_validate_dram_access()
881 data->sg->offset, data->sg->length); in meson_mmc_validate_dram_access()
882 return -EINVAL; in meson_mmc_validate_dram_access()
892 host->needs_pre_post_req = mrq->data && in meson_mmc_request()
893 !(mrq->data->host_cookie & SD_EMMC_PRE_REQ_DONE); in meson_mmc_request()
900 if (host->dram_access_quirk && mrq->data) { in meson_mmc_request()
901 mrq->cmd->error = meson_mmc_validate_dram_access(mmc, mrq->data); in meson_mmc_request()
902 if (mrq->cmd->error) { in meson_mmc_request()
908 if (host->needs_pre_post_req) { in meson_mmc_request()
910 if (!meson_mmc_desc_chain_mode(mrq->data)) in meson_mmc_request()
911 host->needs_pre_post_req = false; in meson_mmc_request()
914 if (host->needs_pre_post_req) in meson_mmc_request()
918 writel(0, host->regs + SD_EMMC_START); in meson_mmc_request()
920 meson_mmc_start_cmd(mmc, mrq->sbc ?: mrq->cmd); in meson_mmc_request()
927 if (cmd->flags & MMC_RSP_136) { in meson_mmc_read_resp()
928 cmd->resp[0] = readl(host->regs + SD_EMMC_CMD_RSP3); in meson_mmc_read_resp()
929 cmd->resp[1] = readl(host->regs + SD_EMMC_CMD_RSP2); in meson_mmc_read_resp()
930 cmd->resp[2] = readl(host->regs + SD_EMMC_CMD_RSP1); in meson_mmc_read_resp()
931 cmd->resp[3] = readl(host->regs + SD_EMMC_CMD_RSP); in meson_mmc_read_resp()
932 } else if (cmd->flags & MMC_RSP_PRESENT) { in meson_mmc_read_resp()
933 cmd->resp[0] = readl(host->regs + SD_EMMC_CMD_RSP); in meson_mmc_read_resp()
944 writel(reg_irqen, host->regs + SD_EMMC_IRQ_EN); in __meson_mmc_enable_sdio_irq()
954 raw_status = readl(host->regs + SD_EMMC_STATUS); in meson_mmc_irq()
958 dev_dbg(host->dev, in meson_mmc_irq()
959 "Unexpected IRQ! irq_en 0x%08lx - status 0x%08x\n", in meson_mmc_irq()
968 writel(status, host->regs + SD_EMMC_STATUS); in meson_mmc_irq()
970 cmd = host->cmd; in meson_mmc_irq()
973 spin_lock(&host->lock); in meson_mmc_irq()
974 __meson_mmc_enable_sdio_irq(host->mmc, 0); in meson_mmc_irq()
975 sdio_signal_irq(host->mmc); in meson_mmc_irq()
976 spin_unlock(&host->lock); in meson_mmc_irq()
985 cmd->error = 0; in meson_mmc_irq()
987 dev_dbg(host->dev, "CRC Error - status 0x%08x\n", status); in meson_mmc_irq()
988 cmd->error = -EILSEQ; in meson_mmc_irq()
994 dev_dbg(host->dev, "Timeout - status 0x%08x\n", status); in meson_mmc_irq()
995 cmd->error = -ETIMEDOUT; in meson_mmc_irq()
1000 meson_mmc_read_resp(host->mmc, cmd); in meson_mmc_irq()
1003 struct mmc_data *data = cmd->data; in meson_mmc_irq()
1005 if (data && !cmd->error) in meson_mmc_irq()
1006 data->bytes_xfered = data->blksz * data->blocks; in meson_mmc_irq()
1015 if (cmd->error) { in meson_mmc_irq()
1017 u32 start = readl(host->regs + SD_EMMC_START); in meson_mmc_irq()
1020 writel(start, host->regs + SD_EMMC_START); in meson_mmc_irq()
1024 meson_mmc_request_done(host->mmc, cmd->mrq); in meson_mmc_irq()
1041 return readl_poll_timeout(host->regs + SD_EMMC_STATUS, status, in meson_mmc_wait_desc_stop()
1049 struct mmc_command *next_cmd, *cmd = host->cmd; in meson_mmc_irq_thread()
1056 if (cmd->error) { in meson_mmc_irq_thread()
1058 meson_mmc_request_done(host->mmc, cmd->mrq); in meson_mmc_irq_thread()
1063 data = cmd->data; in meson_mmc_irq_thread()
1065 xfer_bytes = data->blksz * data->blocks; in meson_mmc_irq_thread()
1066 WARN_ON(xfer_bytes > host->bounce_buf_size); in meson_mmc_irq_thread()
1067 if (host->dram_access_quirk) in meson_mmc_irq_thread()
1070 sg_copy_from_buffer(data->sg, data->sg_len, in meson_mmc_irq_thread()
1071 host->bounce_buf, xfer_bytes); in meson_mmc_irq_thread()
1076 meson_mmc_start_cmd(host->mmc, next_cmd); in meson_mmc_irq_thread()
1078 meson_mmc_request_done(host->mmc, cmd->mrq); in meson_mmc_irq_thread()
1091 if (status == -ENOSYS) in meson_mmc_get_cd()
1109 writel(cfg, host->regs + SD_EMMC_CFG); in meson_mmc_cfg_init()
1117 regval = readl(host->regs + SD_EMMC_STATUS); in meson_mmc_card_busy()
1128 if (!IS_ERR(mmc->supply.vqmmc)) { in meson_mmc_voltage_switch()
1141 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) in meson_mmc_voltage_switch()
1144 return -EINVAL; in meson_mmc_voltage_switch()
1152 spin_lock_irqsave(&host->lock, flags); in meson_mmc_enable_sdio_irq()
1154 spin_unlock_irqrestore(&host->lock, flags); in meson_mmc_enable_sdio_irq()
1182 mmc = mmc_alloc_host(sizeof(struct meson_host), &pdev->dev); in meson_mmc_probe()
1184 return -ENOMEM; in meson_mmc_probe()
1186 host->mmc = mmc; in meson_mmc_probe()
1187 host->dev = &pdev->dev; in meson_mmc_probe()
1188 dev_set_drvdata(&pdev->dev, host); in meson_mmc_probe()
1190 /* The G12A SDIO Controller needs an SRAM bounce buffer */ in meson_mmc_probe()
1191 host->dram_access_quirk = device_property_read_bool(&pdev->dev, in meson_mmc_probe()
1192 "amlogic,dram-access-quirk"); in meson_mmc_probe()
1195 host->vqmmc_enabled = false; in meson_mmc_probe()
1202 if (ret != -EPROBE_DEFER) in meson_mmc_probe()
1203 dev_warn(&pdev->dev, "error parsing DT: %d\n", ret); in meson_mmc_probe()
1207 host->data = (struct meson_mmc_data *) in meson_mmc_probe()
1208 of_device_get_match_data(&pdev->dev); in meson_mmc_probe()
1209 if (!host->data) { in meson_mmc_probe()
1210 ret = -EINVAL; in meson_mmc_probe()
1214 ret = device_reset_optional(&pdev->dev); in meson_mmc_probe()
1216 dev_err_probe(&pdev->dev, ret, "device reset failed\n"); in meson_mmc_probe()
1221 host->regs = devm_ioremap_resource(&pdev->dev, res); in meson_mmc_probe()
1222 if (IS_ERR(host->regs)) { in meson_mmc_probe()
1223 ret = PTR_ERR(host->regs); in meson_mmc_probe()
1227 host->irq = platform_get_irq(pdev, 0); in meson_mmc_probe()
1228 if (host->irq <= 0) { in meson_mmc_probe()
1229 ret = -EINVAL; in meson_mmc_probe()
1233 host->pinctrl = devm_pinctrl_get(&pdev->dev); in meson_mmc_probe()
1234 if (IS_ERR(host->pinctrl)) { in meson_mmc_probe()
1235 ret = PTR_ERR(host->pinctrl); in meson_mmc_probe()
1239 host->pins_clk_gate = pinctrl_lookup_state(host->pinctrl, in meson_mmc_probe()
1240 "clk-gate"); in meson_mmc_probe()
1241 if (IS_ERR(host->pins_clk_gate)) { in meson_mmc_probe()
1242 dev_warn(&pdev->dev, in meson_mmc_probe()
1243 "can't get clk-gate pinctrl, using clk_stop bit\n"); in meson_mmc_probe()
1244 host->pins_clk_gate = NULL; in meson_mmc_probe()
1247 host->core_clk = devm_clk_get(&pdev->dev, "core"); in meson_mmc_probe()
1248 if (IS_ERR(host->core_clk)) { in meson_mmc_probe()
1249 ret = PTR_ERR(host->core_clk); in meson_mmc_probe()
1253 ret = clk_prepare_enable(host->core_clk); in meson_mmc_probe()
1265 writel(0, host->regs + SD_EMMC_START); in meson_mmc_probe()
1268 writel(0, host->regs + SD_EMMC_IRQ_EN); in meson_mmc_probe()
1269 writel(IRQ_EN_MASK, host->regs + SD_EMMC_STATUS); in meson_mmc_probe()
1270 writel(IRQ_EN_MASK, host->regs + SD_EMMC_IRQ_EN); in meson_mmc_probe()
1272 ret = request_threaded_irq(host->irq, meson_mmc_irq, in meson_mmc_probe()
1274 dev_name(&pdev->dev), host); in meson_mmc_probe()
1278 spin_lock_init(&host->lock); in meson_mmc_probe()
1280 mmc->caps |= MMC_CAP_CMD23; in meson_mmc_probe()
1282 if (mmc->caps & MMC_CAP_SDIO_IRQ) in meson_mmc_probe()
1283 mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD; in meson_mmc_probe()
1285 if (host->dram_access_quirk) { in meson_mmc_probe()
1286 /* Limit segments to 1 due to low available sram memory */ in meson_mmc_probe()
1287 mmc->max_segs = 1; in meson_mmc_probe()
1288 /* Limit to the available sram memory */ in meson_mmc_probe()
1289 mmc->max_blk_count = SD_EMMC_SRAM_DATA_BUF_LEN / in meson_mmc_probe()
1290 mmc->max_blk_size; in meson_mmc_probe()
1292 mmc->max_blk_count = CMD_CFG_LENGTH_MASK; in meson_mmc_probe()
1293 mmc->max_segs = SD_EMMC_DESC_BUF_LEN / in meson_mmc_probe()
1296 mmc->max_req_size = mmc->max_blk_count * mmc->max_blk_size; in meson_mmc_probe()
1297 mmc->max_seg_size = mmc->max_req_size; in meson_mmc_probe()
1304 mmc->caps2 &= ~MMC_CAP2_HS400; in meson_mmc_probe()
1306 if (host->dram_access_quirk) { in meson_mmc_probe()
1308 * The MMC Controller embeds 1,5KiB of internal SRAM in meson_mmc_probe()
1313 host->bounce_buf_size = SD_EMMC_SRAM_DATA_BUF_LEN; in meson_mmc_probe()
1314 host->bounce_iomem_buf = host->regs + SD_EMMC_SRAM_DATA_BUF_OFF; in meson_mmc_probe()
1315 host->bounce_dma_addr = res->start + SD_EMMC_SRAM_DATA_BUF_OFF; in meson_mmc_probe()
1318 host->bounce_buf_size = mmc->max_req_size; in meson_mmc_probe()
1319 host->bounce_buf = in meson_mmc_probe()
1320 dmam_alloc_coherent(host->dev, host->bounce_buf_size, in meson_mmc_probe()
1321 &host->bounce_dma_addr, GFP_KERNEL); in meson_mmc_probe()
1322 if (host->bounce_buf == NULL) { in meson_mmc_probe()
1323 dev_err(host->dev, "Unable to map allocate DMA bounce buffer.\n"); in meson_mmc_probe()
1324 ret = -ENOMEM; in meson_mmc_probe()
1329 host->descs = dmam_alloc_coherent(host->dev, SD_EMMC_DESC_BUF_LEN, in meson_mmc_probe()
1330 &host->descs_dma_addr, GFP_KERNEL); in meson_mmc_probe()
1331 if (!host->descs) { in meson_mmc_probe()
1332 dev_err(host->dev, "Allocating descriptor DMA buffer failed\n"); in meson_mmc_probe()
1333 ret = -ENOMEM; in meson_mmc_probe()
1337 mmc->ops = &meson_mmc_ops; in meson_mmc_probe()
1343 free_irq(host->irq, host); in meson_mmc_probe()
1345 clk_disable_unprepare(host->mmc_clk); in meson_mmc_probe()
1347 clk_disable_unprepare(host->core_clk); in meson_mmc_probe()
1355 struct meson_host *host = dev_get_drvdata(&pdev->dev); in meson_mmc_remove()
1357 mmc_remove_host(host->mmc); in meson_mmc_remove()
1360 writel(0, host->regs + SD_EMMC_IRQ_EN); in meson_mmc_remove()
1361 free_irq(host->irq, host); in meson_mmc_remove()
1363 clk_disable_unprepare(host->mmc_clk); in meson_mmc_remove()
1364 clk_disable_unprepare(host->core_clk); in meson_mmc_remove()
1366 mmc_free_host(host->mmc); in meson_mmc_remove()
1387 { .compatible = "amlogic,meson-gx-mmc", .data = &meson_gx_data },
1388 { .compatible = "amlogic,meson-gxbb-mmc", .data = &meson_gx_data },
1389 { .compatible = "amlogic,meson-gxl-mmc", .data = &meson_gx_data },
1390 { .compatible = "amlogic,meson-gxm-mmc", .data = &meson_gx_data },
1391 { .compatible = "amlogic,meson-axg-mmc", .data = &meson_axg_data },