198 	mci_writel(host, CTRL, ctrl);  in dw_mci_ctrl_reset()
240 	mci_writel(host, CMDARG, arg);  in mci_send_cmd()
243 	mci_writel(host, CMD, SDMMC_CMD_START | cmd);  in mci_send_cmd()
294 		mci_writel(host, CLKENA, clk_en_a);  in dw_mci_prepare_command()
407 	mci_writel(host, CMDARG, cmd->arg);  in dw_mci_start_command()
411 	mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START);  in dw_mci_start_command()
455 	mci_writel(host, BMOD, bmod);  in dw_mci_idmac_reset()
466 	mci_writel(host, CTRL, temp);  in dw_mci_idmac_stop_dma()
472 	mci_writel(host, BMOD, temp);  in dw_mci_idmac_stop_dma()
559 		mci_writel(host, IDSTS64, IDMAC_INT_CLR);  in dw_mci_idmac_init()
560 		mci_writel(host, IDINTEN64, SDMMC_IDMAC_INT_NI |  in dw_mci_idmac_init()
564 		mci_writel(host, DBADDRL, host->sg_dma & 0xffffffff);  in dw_mci_idmac_init()
565 		mci_writel(host, DBADDRU, (u64)host->sg_dma >> 32);  in dw_mci_idmac_init()
569 		mci_writel(host, IDSTS, IDMAC_INT_CLR);  in dw_mci_idmac_init()
570 		mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI |  in dw_mci_idmac_init()
574 		mci_writel(host, DBADDR, host->sg_dma);  in dw_mci_idmac_init()
748 	mci_writel(host, CTRL, temp);  in dw_mci_idmac_start_dma()
756 	mci_writel(host, BMOD, temp);  in dw_mci_idmac_start_dma()
759 	mci_writel(host, PLDMND, 1);  in dw_mci_idmac_start_dma()
1028 	mci_writel(host, FIFOTH, fifoth_val);  in dw_mci_adjust_fifoth()
1076 	mci_writel(host, CDTHRCTL, SDMMC_SET_THLD(thld_size, enable));  in dw_mci_ctrl_thld()
1080 	mci_writel(host, CDTHRCTL, 0);  in dw_mci_ctrl_thld()
1121 	mci_writel(host, CTRL, temp);  in dw_mci_submit_data_dma()
1127 	mci_writel(host, INTMASK, temp);  in dw_mci_submit_data_dma()
1172 		mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR);  in dw_mci_submit_data()
1177 		mci_writel(host, INTMASK, temp);  in dw_mci_submit_data()
1182 		mci_writel(host, CTRL, temp);  in dw_mci_submit_data()
1193 			mci_writel(host, FIFOTH, host->fifoth_val);  in dw_mci_submit_data()
1220 		mci_writel(host, CLKENA, 0);  in dw_mci_setup_bus()
1254 		mci_writel(host, CLKENA, 0);  in dw_mci_setup_bus()
1255 		mci_writel(host, CLKSRC, 0);  in dw_mci_setup_bus()
1261 		mci_writel(host, CLKDIV, div);  in dw_mci_setup_bus()
1270 		mci_writel(host, CLKENA, clk_en_a);  in dw_mci_setup_bus()
1284 	mci_writel(host, CTYPE, (slot->ctype << slot->id));  in dw_mci_setup_bus()
1313 	mci_writel(host, TMOUT, tmout);  in dw_mci_set_data_timeout()
1339 		mci_writel(host, BYTCNT, data->blksz*data->blocks);  in __dw_mci_start_request()
1340 		mci_writel(host, BLKSIZ, data->blksz);  in __dw_mci_start_request()
1472 	mci_writel(slot->host, UHS_REG, regs);  in dw_mci_set_ios()
1499 		mci_writel(slot->host, PWREN, regs);  in dw_mci_set_ios()
1538 		mci_writel(slot->host, PWREN, regs);  in dw_mci_set_ios()
1594 	mci_writel(host, UHS_REG, uhs);  in dw_mci_switch_voltage()
1639 	mci_writel(host, RST_N, reset);  in dw_mci_hw_reset()
1642 	mci_writel(host, RST_N, reset);  in dw_mci_hw_reset()
1669 		mci_writel(host, CLKENA, clk_en_a);  in dw_mci_prepare_sdio_irq()
1689 	mci_writel(host, INTMASK, int_mask);  in __dw_mci_enable_sdio_irq()
1764 		mci_writel(host, RINTSTS, 0xFFFFFFFF);  in dw_mci_reset()
2627 		mci_writel(host, RINTSTS, SDMMC_INT_RXDR);  in dw_mci_read_data_pio()
2683 		mci_writel(host, RINTSTS, SDMMC_INT_TXDR);  in dw_mci_write_data_pio()
2736 			mci_writel(host, RINTSTS, SDMMC_INT_VOLT_SWITCH);  in dw_mci_interrupt()
2754 			mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS);  in dw_mci_interrupt()
2769 			mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS);  in dw_mci_interrupt()
2789 			mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER);  in dw_mci_interrupt()
2804 			mci_writel(host, RINTSTS, SDMMC_INT_RXDR);  in dw_mci_interrupt()
2810 			mci_writel(host, RINTSTS, SDMMC_INT_TXDR);  in dw_mci_interrupt()
2818 			mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE);  in dw_mci_interrupt()
2825 			mci_writel(host, RINTSTS, SDMMC_INT_CD);  in dw_mci_interrupt()
2830 			mci_writel(host, RINTSTS,  in dw_mci_interrupt()
2845 			mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_TI |  in dw_mci_interrupt()
2847 			mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_NI);  in dw_mci_interrupt()
2854 			mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI |  in dw_mci_interrupt()
2856 			mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI);  in dw_mci_interrupt()
3277 		mci_writel(host, INTMASK, temp);  in dw_mci_enable_cd()
3395 	mci_writel(host, RINTSTS, 0xFFFFFFFF);  in dw_mci_probe()
3396 	mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */  in dw_mci_probe()
3399 	mci_writel(host, TMOUT, 0xFFFFFFFF);  in dw_mci_probe()
3420 	mci_writel(host, FIFOTH, host->fifoth_val);  in dw_mci_probe()
3423 	mci_writel(host, CLKENA, 0);  in dw_mci_probe()
3424 	mci_writel(host, CLKSRC, 0);  in dw_mci_probe()
3450 	mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER |  in dw_mci_probe()
3454 	mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE);  in dw_mci_probe()
3494 	mci_writel(host, RINTSTS, 0xFFFFFFFF);  in dw_mci_remove()
3495 	mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */  in dw_mci_remove()
3498 	mci_writel(host, CLKENA, 0);  in dw_mci_remove()
3499 	mci_writel(host, CLKSRC, 0);  in dw_mci_remove()
3562 	mci_writel(host, FIFOTH, host->fifoth_val);  in dw_mci_runtime_resume()
3566 	mci_writel(host, TMOUT, 0xFFFFFFFF);  in dw_mci_runtime_resume()
3568 	mci_writel(host, RINTSTS, 0xFFFFFFFF);  in dw_mci_runtime_resume()
3569 	mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER |  in dw_mci_runtime_resume()
3572 	mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE);  in dw_mci_runtime_resume()