Lines Matching refs:mci_readl
156 seq_printf(s, "STATUS:\t0x%08x\n", mci_readl(host, STATUS)); in dw_mci_regs_show()
157 seq_printf(s, "RINTSTS:\t0x%08x\n", mci_readl(host, RINTSTS)); in dw_mci_regs_show()
158 seq_printf(s, "CMD:\t0x%08x\n", mci_readl(host, CMD)); in dw_mci_regs_show()
159 seq_printf(s, "CTRL:\t0x%08x\n", mci_readl(host, CTRL)); in dw_mci_regs_show()
160 seq_printf(s, "INTMASK:\t0x%08x\n", mci_readl(host, INTMASK)); in dw_mci_regs_show()
161 seq_printf(s, "CLKENA:\t0x%08x\n", mci_readl(host, CLKENA)); in dw_mci_regs_show()
196 ctrl = mci_readl(host, CTRL); in dw_mci_ctrl_reset()
292 clk_en_a = mci_readl(host, CLKENA); in dw_mci_prepare_command()
368 cto_clks = mci_readl(host, TMOUT) & 0xff; in dw_mci_set_cto()
369 cto_div = (mci_readl(host, CLKDIV) & 0xff) * 2; in dw_mci_set_cto()
452 u32 bmod = mci_readl(host, BMOD); in dw_mci_idmac_reset()
463 temp = mci_readl(host, CTRL); in dw_mci_idmac_stop_dma()
469 temp = mci_readl(host, BMOD); in dw_mci_idmac_stop_dma()
746 temp = mci_readl(host, CTRL); in dw_mci_idmac_start_dma()
754 temp = mci_readl(host, BMOD); in dw_mci_idmac_start_dma()
798 fifoth_val = mci_readl(host, FIFOTH); in dw_mci_edmac_start_dma()
977 present = (mci_readl(slot->host, CDETECT) & (1 << slot->id)) in dw_mci_get_cd()
1119 temp = mci_readl(host, CTRL); in dw_mci_submit_data_dma()
1125 temp = mci_readl(host, INTMASK); in dw_mci_submit_data_dma()
1175 temp = mci_readl(host, INTMASK); in dw_mci_submit_data()
1180 temp = mci_readl(host, CTRL); in dw_mci_submit_data()
1297 clk_div = (mci_readl(host, CLKDIV) & 0xFF) * 2; in dw_mci_set_data_timeout()
1462 regs = mci_readl(slot->host, UHS_REG); in dw_mci_set_ios()
1497 regs = mci_readl(slot->host, PWREN); in dw_mci_set_ios()
1536 regs = mci_readl(slot->host, PWREN); in dw_mci_set_ios()
1557 status = mci_readl(slot->host, STATUS); in dw_mci_card_busy()
1579 uhs = mci_readl(host, UHS_REG); in dw_mci_switch_voltage()
1610 mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0; in dw_mci_get_ro()
1637 reset = mci_readl(host, RST_N); in dw_mci_hw_reset()
1659 clk_en_a_old = mci_readl(host, CLKENA); in dw_mci_prepare_sdio_irq()
1684 int_mask = mci_readl(host, INTMASK); in __dw_mci_enable_sdio_irq()
1787 if (!(mci_readl(host, CTRL) & SDMMC_CTRL_RESET)) { in dw_mci_reset()
1933 cmd->resp[3] = mci_readl(host, RESP0); in dw_mci_command_complete()
1934 cmd->resp[2] = mci_readl(host, RESP1); in dw_mci_command_complete()
1935 cmd->resp[1] = mci_readl(host, RESP2); in dw_mci_command_complete()
1936 cmd->resp[0] = mci_readl(host, RESP3); in dw_mci_command_complete()
1938 cmd->resp[0] = mci_readl(host, RESP0); in dw_mci_command_complete()
2011 drto_clks = mci_readl(host, TMOUT) >> 8; in dw_mci_set_drto()
2012 drto_div = (mci_readl(host, CLKDIV) & 0xff) * 2; in dw_mci_set_drto()
2614 fcnt = (SDMMC_GET_FCNT(mci_readl(host, STATUS)) in dw_mci_read_data_pio()
2626 status = mci_readl(host, MINTSTS); in dw_mci_read_data_pio()
2630 (dto && SDMMC_GET_FCNT(mci_readl(host, STATUS)))); in dw_mci_read_data_pio()
2670 SDMMC_GET_FCNT(mci_readl(host, STATUS))) in dw_mci_write_data_pio()
2682 status = mci_readl(host, MINTSTS); in dw_mci_write_data_pio()
2730 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_interrupt()
2843 pending = mci_readl(host, IDSTS64); in dw_mci_interrupt()
2852 pending = mci_readl(host, IDSTS); in dw_mci_interrupt()
3017 host->use_dma = SDMMC_GET_TRANS_MODE(mci_readl(host, HCON)); in dw_mci_init_dma()
3033 addr_config = SDMMC_GET_ADDR_CONFIG(mci_readl(host, HCON)); in dw_mci_init_dma()
3122 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_cto_timer()
3173 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_dto_timer()
3275 temp = mci_readl(host, INTMASK); in dw_mci_enable_cd()
3363 i = SDMMC_GET_HDATA_WIDTH(mci_readl(host, HCON)); in dw_mci_probe()
3412 fifo_size = mci_readl(host, FIFOTH); in dw_mci_probe()
3430 host->verid = SDMMC_GET_VERID(mci_readl(host, VERID)); in dw_mci_probe()