Lines Matching refs:cmdr
257 u32 cmdr; in dw_mci_prepare_command() local
260 cmdr = cmd->opcode; in dw_mci_prepare_command()
267 cmdr |= SDMMC_CMD_STOP; in dw_mci_prepare_command()
269 cmdr |= SDMMC_CMD_PRV_DAT_WAIT; in dw_mci_prepare_command()
275 cmdr |= SDMMC_CMD_VOLT_SWITCH; in dw_mci_prepare_command()
301 cmdr |= SDMMC_CMD_RESP_EXP; in dw_mci_prepare_command()
303 cmdr |= SDMMC_CMD_RESP_LONG; in dw_mci_prepare_command()
307 cmdr |= SDMMC_CMD_RESP_CRC; in dw_mci_prepare_command()
310 cmdr |= SDMMC_CMD_DAT_EXP; in dw_mci_prepare_command()
312 cmdr |= SDMMC_CMD_DAT_WR; in dw_mci_prepare_command()
316 cmdr |= SDMMC_CMD_USE_HOLD_REG; in dw_mci_prepare_command()
318 return cmdr; in dw_mci_prepare_command()
324 u32 cmdr; in dw_mci_prep_stop_abort() local
330 cmdr = cmd->opcode; in dw_mci_prep_stop_abort()
333 if (cmdr == MMC_READ_SINGLE_BLOCK || in dw_mci_prep_stop_abort()
334 cmdr == MMC_READ_MULTIPLE_BLOCK || in dw_mci_prep_stop_abort()
335 cmdr == MMC_WRITE_BLOCK || in dw_mci_prep_stop_abort()
336 cmdr == MMC_WRITE_MULTIPLE_BLOCK || in dw_mci_prep_stop_abort()
337 cmdr == MMC_SEND_TUNING_BLOCK || in dw_mci_prep_stop_abort()
338 cmdr == MMC_SEND_TUNING_BLOCK_HS200 || in dw_mci_prep_stop_abort()
339 cmdr == MMC_GEN_CMD) { in dw_mci_prep_stop_abort()
343 } else if (cmdr == SD_IO_RW_EXTENDED) { in dw_mci_prep_stop_abort()
352 cmdr = stop->opcode | SDMMC_CMD_STOP | in dw_mci_prep_stop_abort()
356 cmdr |= SDMMC_CMD_USE_HOLD_REG; in dw_mci_prep_stop_abort()
358 return cmdr; in dw_mci_prep_stop_abort()