Lines Matching full:mmr
313 unsigned long mmr = 0; in gru_chiplet_cpu_to_mmr() local
327 mmr = UVH_GR0_TLB_INT0_CONFIG + in gru_chiplet_cpu_to_mmr()
330 mmr = UVH_GR1_TLB_INT0_CONFIG + in gru_chiplet_cpu_to_mmr()
337 return mmr; in gru_chiplet_cpu_to_mmr()
359 unsigned long mmr; in gru_chiplet_setup_tlb_irq() local
363 mmr = gru_chiplet_cpu_to_mmr(chiplet, cpu, &core); in gru_chiplet_setup_tlb_irq()
364 if (mmr == 0) in gru_chiplet_setup_tlb_irq()
390 unsigned long mmr; in gru_chiplet_teardown_tlb_irq() local
396 mmr = gru_chiplet_cpu_to_mmr(chiplet, cpu, &core); in gru_chiplet_teardown_tlb_irq()
397 if (mmr == 0) in gru_chiplet_teardown_tlb_irq()
409 unsigned long mmr; in gru_chiplet_setup_tlb_irq() local
413 mmr = gru_chiplet_cpu_to_mmr(chiplet, cpu, &core); in gru_chiplet_setup_tlb_irq()
414 if (mmr == 0) in gru_chiplet_setup_tlb_irq()
417 irq = uv_setup_irq(irq_name, cpu, blade, mmr, UV_AFFINITY_CPU); in gru_chiplet_setup_tlb_irq()
438 unsigned long mmr; in gru_chiplet_teardown_tlb_irq() local
440 mmr = gru_chiplet_cpu_to_mmr(chiplet, cpu, &core); in gru_chiplet_teardown_tlb_irq()
441 if (mmr) { in gru_chiplet_teardown_tlb_irq()