2120 	struct hl_inbound_pci_region inbound_region;  in gaudi2_init_iatu()  local
2132 	inbound_region.mode = PCI_BAR_MATCH_MODE;  in gaudi2_init_iatu()
2133 	inbound_region.bar = SRAM_CFG_BAR_ID;  in gaudi2_init_iatu()
2135 	inbound_region.addr = STM_FLASH_BASE_ADDR - STM_FLASH_ALIGNED_OFF;  in gaudi2_init_iatu()
2136 	rc = hl_pci_set_inbound_region(hdev, 0, &inbound_region);  in gaudi2_init_iatu()
2147 	inbound_region.mode = PCI_ADDRESS_MATCH_MODE;  in gaudi2_init_iatu()
2148 	inbound_region.bar = SRAM_CFG_BAR_ID;  in gaudi2_init_iatu()
2149 	inbound_region.offset_in_bar = 0;  in gaudi2_init_iatu()
2150 	inbound_region.addr = STM_FLASH_BASE_ADDR;  in gaudi2_init_iatu()
2151 	inbound_region.size = CFG_REGION_SIZE;  in gaudi2_init_iatu()
2152 	rc = hl_pci_set_inbound_region(hdev, 0, &inbound_region);  in gaudi2_init_iatu()
2157 	inbound_region.mode = PCI_ADDRESS_MATCH_MODE;  in gaudi2_init_iatu()
2158 	inbound_region.bar = SRAM_CFG_BAR_ID;  in gaudi2_init_iatu()
2159 	inbound_region.offset_in_bar = CFG_REGION_SIZE;  in gaudi2_init_iatu()
2160 	inbound_region.addr = BAR0_RSRVD_BASE_ADDR;  in gaudi2_init_iatu()
2161 	inbound_region.size = BAR0_RSRVD_SIZE + SRAM_SIZE;  in gaudi2_init_iatu()
2162 	rc = hl_pci_set_inbound_region(hdev, 1, &inbound_region);  in gaudi2_init_iatu()
2167 	inbound_region.mode = PCI_BAR_MATCH_MODE;  in gaudi2_init_iatu()
2168 	inbound_region.bar = DRAM_BAR_ID;  in gaudi2_init_iatu()
2169 	inbound_region.addr = DRAM_PHYS_BASE;  in gaudi2_init_iatu()
2170 	rc = hl_pci_set_inbound_region(hdev, 2, &inbound_region);  in gaudi2_init_iatu()