Lines Matching refs:afu
22 static int afu_control(struct cxl_afu *afu, u64 command, u64 clear, in afu_control() argument
29 spin_lock(&afu->afu_cntl_lock); in afu_control()
32 trace_cxl_afu_ctrl(afu, command); in afu_control()
34 AFU_Cntl = cxl_p2n_read(afu, CXL_AFU_Cntl_An); in afu_control()
35 cxl_p2n_write(afu, CXL_AFU_Cntl_An, (AFU_Cntl & ~clear) | command); in afu_control()
37 AFU_Cntl = cxl_p2n_read(afu, CXL_AFU_Cntl_An); in afu_control()
40 dev_warn(&afu->dev, "WARNING: AFU control timed out!\n"); in afu_control()
45 if (!cxl_ops->link_ok(afu->adapter, afu)) { in afu_control()
46 afu->enabled = enabled; in afu_control()
54 AFU_Cntl = cxl_p2n_read(afu, CXL_AFU_Cntl_An); in afu_control()
63 cxl_p2n_write(afu, CXL_AFU_Cntl_An, AFU_Cntl & ~CXL_AFU_Cntl_An_RA); in afu_control()
67 afu->enabled = enabled; in afu_control()
69 trace_cxl_afu_ctrl_done(afu, command, rc); in afu_control()
70 spin_unlock(&afu->afu_cntl_lock); in afu_control()
75 static int afu_enable(struct cxl_afu *afu) in afu_enable() argument
79 return afu_control(afu, CXL_AFU_Cntl_An_E, 0, in afu_enable()
84 int cxl_afu_disable(struct cxl_afu *afu) in cxl_afu_disable() argument
88 return afu_control(afu, 0, CXL_AFU_Cntl_An_E, in cxl_afu_disable()
94 static int native_afu_reset(struct cxl_afu *afu) in native_afu_reset() argument
101 rc = afu_control(afu, CXL_AFU_Cntl_An_RA, 0, in native_afu_reset()
111 if (afu->current_mode == 0) { in native_afu_reset()
112 serr = cxl_p1n_read(afu, CXL_PSL_SERR_An); in native_afu_reset()
114 cxl_p1n_write(afu, CXL_PSL_SERR_An, serr); in native_afu_reset()
120 static int native_afu_check_and_enable(struct cxl_afu *afu) in native_afu_check_and_enable() argument
122 if (!cxl_ops->link_ok(afu->adapter, afu)) { in native_afu_check_and_enable()
126 if (afu->enabled) in native_afu_check_and_enable()
128 return afu_enable(afu); in native_afu_check_and_enable()
131 int cxl_psl_purge(struct cxl_afu *afu) in cxl_psl_purge() argument
133 u64 PSL_CNTL = cxl_p1n_read(afu, CXL_PSL_SCNTL_An); in cxl_psl_purge()
134 u64 AFU_Cntl = cxl_p2n_read(afu, CXL_AFU_Cntl_An); in cxl_psl_purge()
141 trace_cxl_psl_ctrl(afu, CXL_PSL_SCNTL_An_Pc); in cxl_psl_purge()
150 if (!cxl_ops->link_ok(afu->adapter, afu)) { in cxl_psl_purge()
151 dev_warn(&afu->dev, "PSL Purge called with link down, ignoring\n"); in cxl_psl_purge()
158 cxl_afu_disable(afu); in cxl_psl_purge()
161 cxl_p1n_write(afu, CXL_PSL_SCNTL_An, in cxl_psl_purge()
164 PSL_CNTL = cxl_p1n_read(afu, CXL_PSL_SCNTL_An); in cxl_psl_purge()
168 dev_warn(&afu->dev, "WARNING: PSL Purge timed out!\n"); in cxl_psl_purge()
172 if (!cxl_ops->link_ok(afu->adapter, afu)) { in cxl_psl_purge()
177 dsisr = cxl_p2n_read(afu, CXL_PSL_DSISR_An); in cxl_psl_purge()
182 dar = cxl_p2n_read(afu, CXL_PSL_DAR_An); in cxl_psl_purge()
183 …dev_notice(&afu->dev, "PSL purge terminating pending translation, DSISR: 0x%016llx, DAR: 0x%016llx… in cxl_psl_purge()
185 cxl_p2n_write(afu, CXL_PSL_TFC_An, CXL_PSL_TFC_An_AE); in cxl_psl_purge()
187 … dev_notice(&afu->dev, "PSL purge acknowledging pending non-translation fault, DSISR: 0x%016llx\n", in cxl_psl_purge()
189 cxl_p2n_write(afu, CXL_PSL_TFC_An, CXL_PSL_TFC_An_A); in cxl_psl_purge()
193 PSL_CNTL = cxl_p1n_read(afu, CXL_PSL_SCNTL_An); in cxl_psl_purge()
198 cxl_p1n_write(afu, CXL_PSL_SCNTL_An, in cxl_psl_purge()
201 trace_cxl_psl_ctrl_done(afu, CXL_PSL_SCNTL_An_Pc, rc); in cxl_psl_purge()
223 static int cxl_alloc_spa(struct cxl_afu *afu, int mode) in cxl_alloc_spa() argument
228 afu->native->spa_order = -1; in cxl_alloc_spa()
230 afu->native->spa_order++; in cxl_alloc_spa()
231 spa_size = (1 << afu->native->spa_order) * PAGE_SIZE; in cxl_alloc_spa()
234 dev_warn(&afu->dev, "num_of_processes too large for the SPA, limiting to %i (0x%x)\n", in cxl_alloc_spa()
235 afu->native->spa_max_procs, afu->native->spa_size); in cxl_alloc_spa()
237 afu->num_procs = afu->native->spa_max_procs; in cxl_alloc_spa()
241 afu->native->spa_size = spa_size; in cxl_alloc_spa()
242 afu->native->spa_max_procs = spa_max_procs(afu->native->spa_size); in cxl_alloc_spa()
243 } while (afu->native->spa_max_procs < afu->num_procs); in cxl_alloc_spa()
245 if (!(afu->native->spa = (struct cxl_process_element *) in cxl_alloc_spa()
246 __get_free_pages(GFP_KERNEL | __GFP_ZERO, afu->native->spa_order))) { in cxl_alloc_spa()
251 1<<afu->native->spa_order, afu->native->spa_max_procs, afu->num_procs); in cxl_alloc_spa()
256 static void attach_spa(struct cxl_afu *afu) in attach_spa() argument
260 afu->native->sw_command_status = (__be64 *)((char *)afu->native->spa + in attach_spa()
261 ((afu->native->spa_max_procs + 3) * 128)); in attach_spa()
263 spap = virt_to_phys(afu->native->spa) & CXL_PSL_SPAP_Addr; in attach_spa()
264 spap |= ((afu->native->spa_size >> (12 - CXL_PSL_SPAP_Size_Shift)) - 1) & CXL_PSL_SPAP_Size; in attach_spa()
267 afu->native->spa, afu->native->spa_max_procs, in attach_spa()
268 afu->native->sw_command_status, spap); in attach_spa()
269 cxl_p1n_write(afu, CXL_PSL_SPAP_An, spap); in attach_spa()
272 static inline void detach_spa(struct cxl_afu *afu) in detach_spa() argument
274 cxl_p1n_write(afu, CXL_PSL_SPAP_An, 0); in detach_spa()
277 void cxl_release_spa(struct cxl_afu *afu) in cxl_release_spa() argument
279 if (afu->native->spa) { in cxl_release_spa()
280 free_pages((unsigned long) afu->native->spa, in cxl_release_spa()
281 afu->native->spa_order); in cxl_release_spa()
282 afu->native->spa = NULL; in cxl_release_spa()
388 static int cxl_write_sstp(struct cxl_afu *afu, u64 sstp0, u64 sstp1) in cxl_write_sstp() argument
393 cxl_p2n_write(afu, CXL_SSTP1_An, 0); in cxl_write_sstp()
396 if ((rc = cxl_afu_slbia(afu))) in cxl_write_sstp()
400 cxl_p2n_write(afu, CXL_SSTP0_An, sstp0); in cxl_write_sstp()
403 cxl_p2n_write(afu, CXL_SSTP1_An, sstp1); in cxl_write_sstp()
411 struct cxl *adapter = ctx->afu->adapter; in slb_invalid()
414 WARN_ON(!mutex_is_locked(&ctx->afu->native->spa_mutex)); in slb_invalid()
440 WARN_ON(!ctx->afu->enabled); in do_process_element_cmd()
444 *(ctx->afu->native->sw_command_status) = cpu_to_be64(cmd | 0 | ctx->pe); in do_process_element_cmd()
446 cxl_p1n_write(ctx->afu, CXL_PSL_LLCMD_An, cmd | ctx->pe); in do_process_element_cmd()
449 dev_warn(&ctx->afu->dev, "WARNING: Process Element Command timed out!\n"); in do_process_element_cmd()
453 if (!cxl_ops->link_ok(ctx->afu->adapter, ctx->afu)) { in do_process_element_cmd()
454 dev_warn(&ctx->afu->dev, "WARNING: Device link down, aborting Process Element Command!\n"); in do_process_element_cmd()
458 state = be64_to_cpup(ctx->afu->native->sw_command_status); in do_process_element_cmd()
486 mutex_lock(&ctx->afu->native->spa_mutex); in add_process_element()
491 mutex_unlock(&ctx->afu->native->spa_mutex); in add_process_element()
503 mutex_lock(&ctx->afu->native->spa_mutex); in terminate_process_element()
509 if (cxl_ops->link_ok(ctx->afu->adapter, ctx->afu)) in terminate_process_element()
514 mutex_unlock(&ctx->afu->native->spa_mutex); in terminate_process_element()
522 mutex_lock(&ctx->afu->native->spa_mutex); in remove_process_element()
528 if (cxl_ops->link_ok(ctx->afu->adapter, ctx->afu)) in remove_process_element()
536 mutex_unlock(&ctx->afu->native->spa_mutex); in remove_process_element()
543 if (!ctx->afu->pp_size || ctx->master) { in cxl_assign_psn_space()
544 ctx->psn_phys = ctx->afu->psn_phys; in cxl_assign_psn_space()
545 ctx->psn_size = ctx->afu->adapter->ps_size; in cxl_assign_psn_space()
547 ctx->psn_phys = ctx->afu->psn_phys + in cxl_assign_psn_space()
548 (ctx->afu->native->pp_offset + ctx->afu->pp_size * ctx->pe); in cxl_assign_psn_space()
549 ctx->psn_size = ctx->afu->pp_size; in cxl_assign_psn_space()
553 static int activate_afu_directed(struct cxl_afu *afu) in activate_afu_directed() argument
557 dev_info(&afu->dev, "Activating AFU directed mode\n"); in activate_afu_directed()
559 afu->num_procs = afu->max_procs_virtualised; in activate_afu_directed()
560 if (afu->native->spa == NULL) { in activate_afu_directed()
561 if (cxl_alloc_spa(afu, CXL_MODE_DIRECTED)) in activate_afu_directed()
564 attach_spa(afu); in activate_afu_directed()
566 cxl_p1n_write(afu, CXL_PSL_SCNTL_An, CXL_PSL_SCNTL_An_PM_AFU); in activate_afu_directed()
568 cxl_p1n_write(afu, CXL_PSL_AMOR_An, 0xFFFFFFFFFFFFFFFFULL); in activate_afu_directed()
569 cxl_p1n_write(afu, CXL_PSL_ID_An, CXL_PSL_ID_An_F | CXL_PSL_ID_An_L); in activate_afu_directed()
571 afu->current_mode = CXL_MODE_DIRECTED; in activate_afu_directed()
573 if ((rc = cxl_chardev_m_afu_add(afu))) in activate_afu_directed()
576 if ((rc = cxl_sysfs_afu_m_add(afu))) in activate_afu_directed()
579 if ((rc = cxl_chardev_s_afu_add(afu))) in activate_afu_directed()
584 cxl_sysfs_afu_m_remove(afu); in activate_afu_directed()
586 cxl_chardev_afu_remove(afu); in activate_afu_directed()
708 ctx->irqs.offset[0] = ctx->afu->native->psl_hwirq; in process_element_entry_psl9()
730 result = cxl_ops->afu_check_and_enable(ctx->afu); in cxl_attach_afu_directed_psl9()
771 ctx->irqs.offset[0] = ctx->afu->native->psl_hwirq; in cxl_attach_afu_directed_psl8()
781 if ((result = cxl_ops->afu_check_and_enable(ctx->afu))) in cxl_attach_afu_directed_psl8()
787 static int deactivate_afu_directed(struct cxl_afu *afu) in deactivate_afu_directed() argument
789 dev_info(&afu->dev, "Deactivating AFU directed mode\n"); in deactivate_afu_directed()
791 afu->current_mode = 0; in deactivate_afu_directed()
792 afu->num_procs = 0; in deactivate_afu_directed()
794 cxl_sysfs_afu_m_remove(afu); in deactivate_afu_directed()
795 cxl_chardev_afu_remove(afu); in deactivate_afu_directed()
822 if (afu->adapter->native->sl_ops->needs_reset_before_disable) in deactivate_afu_directed()
823 cxl_ops->afu_reset(afu); in deactivate_afu_directed()
824 cxl_afu_disable(afu); in deactivate_afu_directed()
825 cxl_psl_purge(afu); in deactivate_afu_directed()
830 int cxl_activate_dedicated_process_psl9(struct cxl_afu *afu) in cxl_activate_dedicated_process_psl9() argument
832 dev_info(&afu->dev, "Activating dedicated process mode\n"); in cxl_activate_dedicated_process_psl9()
841 afu->num_procs = 1; in cxl_activate_dedicated_process_psl9()
842 if (afu->native->spa == NULL) { in cxl_activate_dedicated_process_psl9()
843 if (cxl_alloc_spa(afu, CXL_MODE_DEDICATED)) in cxl_activate_dedicated_process_psl9()
846 attach_spa(afu); in cxl_activate_dedicated_process_psl9()
848 cxl_p1n_write(afu, CXL_PSL_SCNTL_An, CXL_PSL_SCNTL_An_PM_Process); in cxl_activate_dedicated_process_psl9()
849 cxl_p1n_write(afu, CXL_PSL_ID_An, CXL_PSL_ID_An_F | CXL_PSL_ID_An_L); in cxl_activate_dedicated_process_psl9()
851 afu->current_mode = CXL_MODE_DEDICATED; in cxl_activate_dedicated_process_psl9()
853 return cxl_chardev_d_afu_add(afu); in cxl_activate_dedicated_process_psl9()
856 int cxl_activate_dedicated_process_psl8(struct cxl_afu *afu) in cxl_activate_dedicated_process_psl8() argument
858 dev_info(&afu->dev, "Activating dedicated process mode\n"); in cxl_activate_dedicated_process_psl8()
860 cxl_p1n_write(afu, CXL_PSL_SCNTL_An, CXL_PSL_SCNTL_An_PM_Process); in cxl_activate_dedicated_process_psl8()
862 cxl_p1n_write(afu, CXL_PSL_CtxTime_An, 0); /* disable */ in cxl_activate_dedicated_process_psl8()
863 cxl_p1n_write(afu, CXL_PSL_SPAP_An, 0); /* disable */ in cxl_activate_dedicated_process_psl8()
864 cxl_p1n_write(afu, CXL_PSL_AMOR_An, 0xFFFFFFFFFFFFFFFFULL); in cxl_activate_dedicated_process_psl8()
865 cxl_p1n_write(afu, CXL_PSL_LPID_An, mfspr(SPRN_LPID)); in cxl_activate_dedicated_process_psl8()
866 cxl_p1n_write(afu, CXL_HAURP_An, 0); /* disable */ in cxl_activate_dedicated_process_psl8()
867 cxl_p1n_write(afu, CXL_PSL_SDR_An, mfspr(SPRN_SDR1)); in cxl_activate_dedicated_process_psl8()
869 cxl_p2n_write(afu, CXL_CSRP_An, 0); /* disable */ in cxl_activate_dedicated_process_psl8()
870 cxl_p2n_write(afu, CXL_AURP0_An, 0); /* disable */ in cxl_activate_dedicated_process_psl8()
871 cxl_p2n_write(afu, CXL_AURP1_An, 0); /* disable */ in cxl_activate_dedicated_process_psl8()
873 afu->current_mode = CXL_MODE_DEDICATED; in cxl_activate_dedicated_process_psl8()
874 afu->num_procs = 1; in cxl_activate_dedicated_process_psl8()
876 return cxl_chardev_d_afu_add(afu); in cxl_activate_dedicated_process_psl8()
891 struct cxl_afu *afu = ctx->afu; in cxl_update_dedicated_ivtes_psl8() local
893 cxl_p1n_write(afu, CXL_PSL_IVTE_Offset_An, in cxl_update_dedicated_ivtes_psl8()
898 cxl_p1n_write(afu, CXL_PSL_IVTE_Limit_An, (u64) in cxl_update_dedicated_ivtes_psl8()
907 struct cxl_afu *afu = ctx->afu; in cxl_attach_dedicated_process_psl9() local
915 if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes) in cxl_attach_dedicated_process_psl9()
916 afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx); in cxl_attach_dedicated_process_psl9()
926 result = cxl_ops->afu_reset(afu); in cxl_attach_dedicated_process_psl9()
930 return afu_enable(afu); in cxl_attach_dedicated_process_psl9()
935 struct cxl_afu *afu = ctx->afu; in cxl_attach_dedicated_process_psl8() local
942 cxl_p2n_write(afu, CXL_PSL_PID_TID_An, pid); in cxl_attach_dedicated_process_psl8()
944 cxl_p1n_write(afu, CXL_PSL_SR_An, calculate_sr(ctx)); in cxl_attach_dedicated_process_psl8()
946 if ((rc = cxl_write_sstp(afu, ctx->sstp0, ctx->sstp1))) in cxl_attach_dedicated_process_psl8()
951 if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes) in cxl_attach_dedicated_process_psl8()
952 afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx); in cxl_attach_dedicated_process_psl8()
954 cxl_p2n_write(afu, CXL_PSL_AMR_An, amr); in cxl_attach_dedicated_process_psl8()
959 if ((rc = cxl_ops->afu_reset(afu))) in cxl_attach_dedicated_process_psl8()
962 cxl_p2n_write(afu, CXL_PSL_WED_An, wed); in cxl_attach_dedicated_process_psl8()
964 return afu_enable(afu); in cxl_attach_dedicated_process_psl8()
967 static int deactivate_dedicated_process(struct cxl_afu *afu) in deactivate_dedicated_process() argument
969 dev_info(&afu->dev, "Deactivating dedicated process mode\n"); in deactivate_dedicated_process()
971 afu->current_mode = 0; in deactivate_dedicated_process()
972 afu->num_procs = 0; in deactivate_dedicated_process()
974 cxl_chardev_afu_remove(afu); in deactivate_dedicated_process()
979 static int native_afu_deactivate_mode(struct cxl_afu *afu, int mode) in native_afu_deactivate_mode() argument
982 return deactivate_afu_directed(afu); in native_afu_deactivate_mode()
984 return deactivate_dedicated_process(afu); in native_afu_deactivate_mode()
988 static int native_afu_activate_mode(struct cxl_afu *afu, int mode) in native_afu_activate_mode() argument
992 if (!(mode & afu->modes_supported)) in native_afu_activate_mode()
995 if (!cxl_ops->link_ok(afu->adapter, afu)) { in native_afu_activate_mode()
1001 return activate_afu_directed(afu); in native_afu_activate_mode()
1003 (afu->adapter->native->sl_ops->activate_dedicated_process)) in native_afu_activate_mode()
1004 return afu->adapter->native->sl_ops->activate_dedicated_process(afu); in native_afu_activate_mode()
1012 if (!cxl_ops->link_ok(ctx->afu->adapter, ctx->afu)) { in native_attach_process()
1018 if ((ctx->afu->current_mode == CXL_MODE_DIRECTED) && in native_attach_process()
1019 (ctx->afu->adapter->native->sl_ops->attach_afu_directed)) in native_attach_process()
1020 return ctx->afu->adapter->native->sl_ops->attach_afu_directed(ctx, wed, amr); in native_attach_process()
1022 if ((ctx->afu->current_mode == CXL_MODE_DEDICATED) && in native_attach_process()
1023 (ctx->afu->adapter->native->sl_ops->attach_dedicated_process)) in native_attach_process()
1024 return ctx->afu->adapter->native->sl_ops->attach_dedicated_process(ctx, wed, amr); in native_attach_process()
1047 cxl_ops->afu_reset(ctx->afu); in detach_process_native_dedicated()
1048 cxl_afu_disable(ctx->afu); in detach_process_native_dedicated()
1049 cxl_psl_purge(ctx->afu); in detach_process_native_dedicated()
1055 if (ctx->afu->current_mode == CXL_MODE_DIRECTED) in native_update_ivtes()
1057 if ((ctx->afu->current_mode == CXL_MODE_DEDICATED) && in native_update_ivtes()
1058 (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes)) in native_update_ivtes()
1059 return ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx); in native_update_ivtes()
1079 if (ctx->afu->current_mode == CXL_MODE_DEDICATED) in native_detach_process()
1085 static int native_get_irq_info(struct cxl_afu *afu, struct cxl_irq_info *info) in native_get_irq_info() argument
1090 if (!cxl_ops->link_ok(afu->adapter, afu)) in native_get_irq_info()
1093 info->dsisr = cxl_p2n_read(afu, CXL_PSL_DSISR_An); in native_get_irq_info()
1094 info->dar = cxl_p2n_read(afu, CXL_PSL_DAR_An); in native_get_irq_info()
1096 info->dsr = cxl_p2n_read(afu, CXL_PSL_DSR_An); in native_get_irq_info()
1097 info->afu_err = cxl_p2n_read(afu, CXL_AFU_ERR_An); in native_get_irq_info()
1098 info->errstat = cxl_p2n_read(afu, CXL_PSL_ErrStat_An); in native_get_irq_info()
1108 fir1 = cxl_p1_read(ctx->afu->adapter, CXL_PSL9_FIR1); in cxl_native_irq_dump_regs_psl9()
1110 dev_crit(&ctx->afu->dev, "PSL_FIR1: 0x%016llx\n", fir1); in cxl_native_irq_dump_regs_psl9()
1111 if (ctx->afu->adapter->native->sl_ops->register_serr_irq) { in cxl_native_irq_dump_regs_psl9()
1112 serr = cxl_p1n_read(ctx->afu, CXL_PSL_SERR_An); in cxl_native_irq_dump_regs_psl9()
1113 cxl_afu_decode_psl_serr(ctx->afu, serr); in cxl_native_irq_dump_regs_psl9()
1121 fir1 = cxl_p1_read(ctx->afu->adapter, CXL_PSL_FIR1); in cxl_native_irq_dump_regs_psl8()
1122 fir2 = cxl_p1_read(ctx->afu->adapter, CXL_PSL_FIR2); in cxl_native_irq_dump_regs_psl8()
1123 fir_slice = cxl_p1n_read(ctx->afu, CXL_PSL_FIR_SLICE_An); in cxl_native_irq_dump_regs_psl8()
1124 afu_debug = cxl_p1n_read(ctx->afu, CXL_AFU_DEBUG_An); in cxl_native_irq_dump_regs_psl8()
1126 dev_crit(&ctx->afu->dev, "PSL_FIR1: 0x%016llx\n", fir1); in cxl_native_irq_dump_regs_psl8()
1127 dev_crit(&ctx->afu->dev, "PSL_FIR2: 0x%016llx\n", fir2); in cxl_native_irq_dump_regs_psl8()
1128 if (ctx->afu->adapter->native->sl_ops->register_serr_irq) { in cxl_native_irq_dump_regs_psl8()
1129 serr = cxl_p1n_read(ctx->afu, CXL_PSL_SERR_An); in cxl_native_irq_dump_regs_psl8()
1130 cxl_afu_decode_psl_serr(ctx->afu, serr); in cxl_native_irq_dump_regs_psl8()
1132 dev_crit(&ctx->afu->dev, "PSL_FIR_SLICE_An: 0x%016llx\n", fir_slice); in cxl_native_irq_dump_regs_psl8()
1133 dev_crit(&ctx->afu->dev, "CXL_PSL_AFU_DEBUG_An: 0x%016llx\n", afu_debug); in cxl_native_irq_dump_regs_psl8()
1140 dev_crit(&ctx->afu->dev, "PSL ERROR STATUS: 0x%016llx\n", errstat); in native_handle_psl_slice_error()
1142 if (ctx->afu->adapter->native->sl_ops->psl_irq_dump_registers) in native_handle_psl_slice_error()
1143 ctx->afu->adapter->native->sl_ops->psl_irq_dump_registers(ctx); in native_handle_psl_slice_error()
1145 if (ctx->afu->adapter->native->sl_ops->debugfs_stop_trace) { in native_handle_psl_slice_error()
1146 dev_crit(&ctx->afu->dev, "STOPPING CXL TRACE\n"); in native_handle_psl_slice_error()
1147 ctx->afu->adapter->native->sl_ops->debugfs_stop_trace(ctx->afu->adapter); in native_handle_psl_slice_error()
1153 static bool cxl_is_translation_fault(struct cxl_afu *afu, u64 dsisr) in cxl_is_translation_fault() argument
1164 irqreturn_t cxl_fail_irq_psl(struct cxl_afu *afu, struct cxl_irq_info *irq_info) in cxl_fail_irq_psl() argument
1166 if (cxl_is_translation_fault(afu, irq_info->dsisr)) in cxl_fail_irq_psl()
1167 cxl_p2n_write(afu, CXL_PSL_TFC_An, CXL_PSL_TFC_An_AE); in cxl_fail_irq_psl()
1169 cxl_p2n_write(afu, CXL_PSL_TFC_An, CXL_PSL_TFC_An_A); in cxl_fail_irq_psl()
1176 struct cxl_afu *afu = data; in native_irq_multiplexed() local
1179 u64 phreg = cxl_p2n_read(afu, CXL_PSL_PEHandle_An); in native_irq_multiplexed()
1184 dev_warn(&afu->dev, in native_irq_multiplexed()
1191 if ((res = native_get_irq_info(afu, &irq_info))) { in native_irq_multiplexed()
1193 if (afu->adapter->native->sl_ops->fail_irq) in native_irq_multiplexed()
1194 return afu->adapter->native->sl_ops->fail_irq(afu, &irq_info); in native_irq_multiplexed()
1199 ctx = idr_find(&afu->contexts_idr, ph); in native_irq_multiplexed()
1201 if (afu->adapter->native->sl_ops->handle_interrupt) in native_irq_multiplexed()
1202 ret = afu->adapter->native->sl_ops->handle_interrupt(irq, ctx, &irq_info); in native_irq_multiplexed()
1212 if (afu->adapter->native->sl_ops->fail_irq) in native_irq_multiplexed()
1213 ret = afu->adapter->native->sl_ops->fail_irq(afu, &irq_info); in native_irq_multiplexed()
1228 ph = cxl_p2n_read(ctx->afu, CXL_PSL_PEHandle_An) & 0xffff; in native_irq_wait()
1231 dsisr = cxl_p2n_read(ctx->afu, CXL_PSL_DSISR_An); in native_irq_wait()
1245 dev_warn(&ctx->afu->dev, "WARNING: waiting on DSI for PE %i" in native_irq_wait()
1252 struct cxl_afu *afu = data; in native_slice_irq_err() local
1259 serr = cxl_p1n_read(afu, CXL_PSL_SERR_An); in native_slice_irq_err()
1260 errstat = cxl_p2n_read(afu, CXL_PSL_ErrStat_An); in native_slice_irq_err()
1261 afu_error = cxl_p2n_read(afu, CXL_AFU_ERR_An); in native_slice_irq_err()
1262 dsisr = cxl_p2n_read(afu, CXL_PSL_DSISR_An); in native_slice_irq_err()
1263 cxl_afu_decode_psl_serr(afu, serr); in native_slice_irq_err()
1266 fir_slice = cxl_p1n_read(afu, CXL_PSL_FIR_SLICE_An); in native_slice_irq_err()
1267 afu_debug = cxl_p1n_read(afu, CXL_AFU_DEBUG_An); in native_slice_irq_err()
1268 dev_crit(&afu->dev, "PSL_FIR_SLICE_An: 0x%016llx\n", fir_slice); in native_slice_irq_err()
1269 dev_crit(&afu->dev, "CXL_PSL_AFU_DEBUG_An: 0x%016llx\n", afu_debug); in native_slice_irq_err()
1271 dev_crit(&afu->dev, "CXL_PSL_ErrStat_An: 0x%016llx\n", errstat); in native_slice_irq_err()
1272 dev_crit(&afu->dev, "AFU_ERR_An: 0x%.16llx\n", afu_error); in native_slice_irq_err()
1273 dev_crit(&afu->dev, "PSL_DSISR_An: 0x%.16llx\n", dsisr); in native_slice_irq_err()
1278 cxl_p1n_write(afu, CXL_PSL_SERR_An, serr); in native_slice_irq_err()
1279 dev_info(&afu->dev, "Further such interrupts will be masked until the AFU is reset\n"); in native_slice_irq_err()
1361 int cxl_native_register_serr_irq(struct cxl_afu *afu) in cxl_native_register_serr_irq() argument
1366 afu->err_irq_name = kasprintf(GFP_KERNEL, "cxl-%s-err", in cxl_native_register_serr_irq()
1367 dev_name(&afu->dev)); in cxl_native_register_serr_irq()
1368 if (!afu->err_irq_name) in cxl_native_register_serr_irq()
1371 if ((rc = cxl_register_one_irq(afu->adapter, native_slice_irq_err, afu, in cxl_native_register_serr_irq()
1372 &afu->serr_hwirq, in cxl_native_register_serr_irq()
1373 &afu->serr_virq, afu->err_irq_name))) { in cxl_native_register_serr_irq()
1374 kfree(afu->err_irq_name); in cxl_native_register_serr_irq()
1375 afu->err_irq_name = NULL; in cxl_native_register_serr_irq()
1379 serr = cxl_p1n_read(afu, CXL_PSL_SERR_An); in cxl_native_register_serr_irq()
1381 serr = (serr & 0x00ffffffffff0000ULL) | (afu->serr_hwirq & 0xffff); in cxl_native_register_serr_irq()
1387 serr = (serr & ~0xff0000007fffffffULL) | (afu->serr_hwirq & 0xffff); in cxl_native_register_serr_irq()
1389 cxl_p1n_write(afu, CXL_PSL_SERR_An, serr); in cxl_native_register_serr_irq()
1394 void cxl_native_release_serr_irq(struct cxl_afu *afu) in cxl_native_release_serr_irq() argument
1396 if (afu->serr_virq == 0 || in cxl_native_release_serr_irq()
1397 afu->serr_virq != irq_find_mapping(NULL, afu->serr_hwirq)) in cxl_native_release_serr_irq()
1400 cxl_p1n_write(afu, CXL_PSL_SERR_An, 0x0000000000000000); in cxl_native_release_serr_irq()
1401 cxl_unmap_irq(afu->serr_virq, afu); in cxl_native_release_serr_irq()
1402 cxl_ops->release_one_irq(afu->adapter, afu->serr_hwirq); in cxl_native_release_serr_irq()
1403 kfree(afu->err_irq_name); in cxl_native_release_serr_irq()
1404 afu->serr_virq = 0; in cxl_native_release_serr_irq()
1407 int cxl_native_register_psl_irq(struct cxl_afu *afu) in cxl_native_register_psl_irq() argument
1411 afu->psl_irq_name = kasprintf(GFP_KERNEL, "cxl-%s", in cxl_native_register_psl_irq()
1412 dev_name(&afu->dev)); in cxl_native_register_psl_irq()
1413 if (!afu->psl_irq_name) in cxl_native_register_psl_irq()
1416 if ((rc = cxl_register_one_irq(afu->adapter, native_irq_multiplexed, in cxl_native_register_psl_irq()
1417 afu, &afu->native->psl_hwirq, &afu->native->psl_virq, in cxl_native_register_psl_irq()
1418 afu->psl_irq_name))) { in cxl_native_register_psl_irq()
1419 kfree(afu->psl_irq_name); in cxl_native_register_psl_irq()
1420 afu->psl_irq_name = NULL; in cxl_native_register_psl_irq()
1425 void cxl_native_release_psl_irq(struct cxl_afu *afu) in cxl_native_release_psl_irq() argument
1427 if (afu->native->psl_virq == 0 || in cxl_native_release_psl_irq()
1428 afu->native->psl_virq != in cxl_native_release_psl_irq()
1429 irq_find_mapping(NULL, afu->native->psl_hwirq)) in cxl_native_release_psl_irq()
1432 cxl_unmap_irq(afu->native->psl_virq, afu); in cxl_native_release_psl_irq()
1433 cxl_ops->release_one_irq(afu->adapter, afu->native->psl_hwirq); in cxl_native_release_psl_irq()
1434 kfree(afu->psl_irq_name); in cxl_native_release_psl_irq()
1435 afu->native->psl_virq = 0; in cxl_native_release_psl_irq()
1438 static void recover_psl_err(struct cxl_afu *afu, u64 errstat) in recover_psl_err() argument
1445 dsisr = cxl_p2n_read(afu, CXL_PSL_DSISR_An); in recover_psl_err()
1446 cxl_p2n_write(afu, CXL_PSL_DSISR_An, dsisr & ~CXL_PSL_DSISR_An_PE); in recover_psl_err()
1449 cxl_p2n_write(afu, CXL_PSL_ErrStat_An, errstat); in recover_psl_err()
1456 cxl_p2n_write(ctx->afu, CXL_PSL_TFC_An, tfc); in native_ack_irq()
1458 recover_psl_err(ctx->afu, psl_reset_mask); in native_ack_irq()
1463 int cxl_check_error(struct cxl_afu *afu) in cxl_check_error() argument
1465 return (cxl_p1n_read(afu, CXL_PSL_SCNTL_An) == ~0ULL); in cxl_check_error()
1474 static int native_afu_cr_read64(struct cxl_afu *afu, int cr, u64 off, u64 *out) in native_afu_cr_read64() argument
1476 if (unlikely(!cxl_ops->link_ok(afu->adapter, afu))) in native_afu_cr_read64()
1478 if (unlikely(off >= afu->crs_len)) in native_afu_cr_read64()
1480 *out = in_le64(afu->native->afu_desc_mmio + afu->crs_offset + in native_afu_cr_read64()
1481 (cr * afu->crs_len) + off); in native_afu_cr_read64()
1485 static int native_afu_cr_read32(struct cxl_afu *afu, int cr, u64 off, u32 *out) in native_afu_cr_read32() argument
1487 if (unlikely(!cxl_ops->link_ok(afu->adapter, afu))) in native_afu_cr_read32()
1489 if (unlikely(off >= afu->crs_len)) in native_afu_cr_read32()
1491 *out = in_le32(afu->native->afu_desc_mmio + afu->crs_offset + in native_afu_cr_read32()
1492 (cr * afu->crs_len) + off); in native_afu_cr_read32()
1496 static int native_afu_cr_read16(struct cxl_afu *afu, int cr, u64 off, u16 *out) in native_afu_cr_read16() argument
1502 rc = native_afu_cr_read32(afu, cr, aligned_off, &val); in native_afu_cr_read16()
1508 static int native_afu_cr_read8(struct cxl_afu *afu, int cr, u64 off, u8 *out) in native_afu_cr_read8() argument
1514 rc = native_afu_cr_read32(afu, cr, aligned_off, &val); in native_afu_cr_read8()
1520 static int native_afu_cr_write32(struct cxl_afu *afu, int cr, u64 off, u32 in) in native_afu_cr_write32() argument
1522 if (unlikely(!cxl_ops->link_ok(afu->adapter, afu))) in native_afu_cr_write32()
1524 if (unlikely(off >= afu->crs_len)) in native_afu_cr_write32()
1526 out_le32(afu->native->afu_desc_mmio + afu->crs_offset + in native_afu_cr_write32()
1527 (cr * afu->crs_len) + off, in); in native_afu_cr_write32()
1531 static int native_afu_cr_write16(struct cxl_afu *afu, int cr, u64 off, u16 in) in native_afu_cr_write16() argument
1537 rc = native_afu_cr_read32(afu, cr, aligned_off, &val32); in native_afu_cr_write16()
1545 rc = native_afu_cr_write32(afu, cr, aligned_off, val32); in native_afu_cr_write16()
1549 static int native_afu_cr_write8(struct cxl_afu *afu, int cr, u64 off, u8 in) in native_afu_cr_write8() argument
1555 rc = native_afu_cr_read32(afu, cr, aligned_off, &val32); in native_afu_cr_write8()
1562 rc = native_afu_cr_write32(afu, cr, aligned_off, val32); in native_afu_cr_write8()