17 static u8 rts5227_get_ic_version(struct rtsx_pcr *pcr)  in rts5227_get_ic_version()  argument
21 	rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val);  in rts5227_get_ic_version()
25 static void rts5227_fill_driving(struct rtsx_pcr *pcr, u8 voltage)  in rts5227_fill_driving()  argument
43 		drive_sel = pcr->sd30_drive_sel_3v3;  in rts5227_fill_driving()
46 		drive_sel = pcr->sd30_drive_sel_1v8;  in rts5227_fill_driving()
49 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CLK_DRIVE_SEL,  in rts5227_fill_driving()
51 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CMD_DRIVE_SEL,  in rts5227_fill_driving()
53 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DAT_DRIVE_SEL,  in rts5227_fill_driving()
57 static void rts5227_fetch_vendor_settings(struct rtsx_pcr *pcr)  in rts5227_fetch_vendor_settings()  argument
59 	struct pci_dev *pdev = pcr->pci;  in rts5227_fetch_vendor_settings()
63 	pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);  in rts5227_fetch_vendor_settings()
68 	pcr->aspm_en = rtsx_reg_to_aspm(reg);  in rts5227_fetch_vendor_settings()
69 	pcr->sd30_drive_sel_1v8 = rtsx_reg_to_sd30_drive_sel_1v8(reg);  in rts5227_fetch_vendor_settings()
70 	pcr->card_drive_sel &= 0x3F;  in rts5227_fetch_vendor_settings()
71 	pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg);  in rts5227_fetch_vendor_settings()
74 	pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);  in rts5227_fetch_vendor_settings()
75 	if (CHK_PCI_PID(pcr, 0x522A))  in rts5227_fetch_vendor_settings()
76 		pcr->rtd3_en = rtsx_reg_to_rtd3(reg);  in rts5227_fetch_vendor_settings()
78 		pcr->extra_caps |= EXTRA_CAPS_NO_MMC;  in rts5227_fetch_vendor_settings()
79 	pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg);  in rts5227_fetch_vendor_settings()
81 		pcr->flags |= PCR_REVERSE_SOCKET;  in rts5227_fetch_vendor_settings()
84 static void rts5227_init_from_cfg(struct rtsx_pcr *pcr)  in rts5227_init_from_cfg()  argument
86 	struct pci_dev *pdev = pcr->pci;  in rts5227_init_from_cfg()
89 	struct rtsx_cr_option *option = &pcr->option;  in rts5227_init_from_cfg()
97 	if (CHK_PCI_PID(pcr, 0x522A)) {  in rts5227_init_from_cfg()
99 			rtsx_pci_enable_oobs_polling(pcr);  in rts5227_init_from_cfg()
101 			rtsx_pci_disable_oobs_polling(pcr);  in rts5227_init_from_cfg()
105 		rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);  in rts5227_init_from_cfg()
107 		rtsx_clear_dev_flag(pcr, ASPM_L1_1_EN);  in rts5227_init_from_cfg()
110 		rtsx_set_dev_flag(pcr, ASPM_L1_2_EN);  in rts5227_init_from_cfg()
112 		rtsx_clear_dev_flag(pcr, ASPM_L1_2_EN);  in rts5227_init_from_cfg()
115 		rtsx_set_dev_flag(pcr, PM_L1_1_EN);  in rts5227_init_from_cfg()
117 		rtsx_clear_dev_flag(pcr, PM_L1_1_EN);  in rts5227_init_from_cfg()
120 		rtsx_set_dev_flag(pcr, PM_L1_2_EN);  in rts5227_init_from_cfg()
122 		rtsx_clear_dev_flag(pcr, PM_L1_2_EN);  in rts5227_init_from_cfg()
127 		pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &val);  in rts5227_init_from_cfg()
131 			rtsx_set_ltr_latency(pcr, option->ltr_active_latency);  in rts5227_init_from_cfg()
137 	if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN | ASPM_L1_2_EN  in rts5227_init_from_cfg()
145 static int rts5227_extra_init_hw(struct rtsx_pcr *pcr)  in rts5227_extra_init_hw()  argument
148 	struct rtsx_cr_option *option = &pcr->option;  in rts5227_extra_init_hw()
150 	rts5227_init_from_cfg(pcr);  in rts5227_extra_init_hw()
151 	rtsx_pci_init_cmd(pcr);  in rts5227_extra_init_hw()
154 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02);  in rts5227_extra_init_hw()
156 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0);  in rts5227_extra_init_hw()
158 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00);  in rts5227_extra_init_hw()
159 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01);  in rts5227_extra_init_hw()
161 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02);  in rts5227_extra_init_hw()
163 	pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &cap);  in rts5227_extra_init_hw()
165 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LTR_CTL, 0xFF, 0xA3);  in rts5227_extra_init_hw()
167 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OBFF_CFG, 0x03, 0x03);  in rts5227_extra_init_hw()
169 	rts5227_fill_driving(pcr, OUTPUT_3V3);  in rts5227_extra_init_hw()
171 	if (pcr->flags & PCR_REVERSE_SOCKET)  in rts5227_extra_init_hw()
172 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x30, 0x30);  in rts5227_extra_init_hw()
174 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x30, 0x00);  in rts5227_extra_init_hw()
176 	if (CHK_PCI_PID(pcr, 0x522A))  in rts5227_extra_init_hw()
177 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS522A_AUTOLOAD_CFG1,  in rts5227_extra_init_hw()
180 	if (pcr->rtd3_en) {  in rts5227_extra_init_hw()
181 		if (CHK_PCI_PID(pcr, 0x522A)) {  in rts5227_extra_init_hw()
182 			rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS522A_PM_CTRL3, 0x01, 0x01);  in rts5227_extra_init_hw()
183 			rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS522A_PME_FORCE_CTL, 0x30, 0x30);  in rts5227_extra_init_hw()
185 			rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CTRL3, 0x01, 0x01);  in rts5227_extra_init_hw()
186 			rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PME_FORCE_CTL, 0xFF, 0x33);  in rts5227_extra_init_hw()
189 		if (CHK_PCI_PID(pcr, 0x522A)) {  in rts5227_extra_init_hw()
190 			rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS522A_PM_CTRL3, 0x01, 0x00);  in rts5227_extra_init_hw()
191 			rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS522A_PME_FORCE_CTL, 0x30, 0x20);  in rts5227_extra_init_hw()
193 			rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PME_FORCE_CTL, 0xFF, 0x30);  in rts5227_extra_init_hw()
194 			rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CTRL3, 0x01, 0x00);  in rts5227_extra_init_hw()
199 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG,  in rts5227_extra_init_hw()
202 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG,  in rts5227_extra_init_hw()
205 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, pcr->reg_pm_ctrl3, 0x10, 0x00);  in rts5227_extra_init_hw()
207 	return rtsx_pci_send_cmd(pcr, 100);  in rts5227_extra_init_hw()
210 static int rts5227_optimize_phy(struct rtsx_pcr *pcr)  in rts5227_optimize_phy()  argument
214 	err = rtsx_pci_write_register(pcr, PM_CTRL3, D3_DELINK_MODE_EN, 0x00);  in rts5227_optimize_phy()
219 	return rtsx_pci_write_phy_register(pcr, 0x00, 0xBA42);  in rts5227_optimize_phy()
222 static int rts5227_turn_on_led(struct rtsx_pcr *pcr)  in rts5227_turn_on_led()  argument
224 	return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x02);  in rts5227_turn_on_led()
227 static int rts5227_turn_off_led(struct rtsx_pcr *pcr)  in rts5227_turn_off_led()  argument
229 	return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x00);  in rts5227_turn_off_led()
232 static int rts5227_enable_auto_blink(struct rtsx_pcr *pcr)  in rts5227_enable_auto_blink()  argument
234 	return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x08);  in rts5227_enable_auto_blink()
237 static int rts5227_disable_auto_blink(struct rtsx_pcr *pcr)  in rts5227_disable_auto_blink()  argument
239 	return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x00);  in rts5227_disable_auto_blink()
242 static int rts5227_card_power_on(struct rtsx_pcr *pcr, int card)  in rts5227_card_power_on()  argument
246 	if (pcr->option.ocp_en)  in rts5227_card_power_on()
247 		rtsx_pci_enable_ocp(pcr);  in rts5227_card_power_on()
249 	rtsx_pci_init_cmd(pcr);  in rts5227_card_power_on()
250 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,  in rts5227_card_power_on()
253 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,  in rts5227_card_power_on()
256 	err = rtsx_pci_send_cmd(pcr, 100);  in rts5227_card_power_on()
262 	rtsx_pci_init_cmd(pcr);  in rts5227_card_power_on()
263 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,  in rts5227_card_power_on()
266 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,  in rts5227_card_power_on()
269 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_OE,  in rts5227_card_power_on()
271 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_OE,  in rts5227_card_power_on()
273 	return rtsx_pci_send_cmd(pcr, 100);  in rts5227_card_power_on()
276 static int rts5227_card_power_off(struct rtsx_pcr *pcr, int card)  in rts5227_card_power_off()  argument
278 	if (pcr->option.ocp_en)  in rts5227_card_power_off()
279 		rtsx_pci_disable_ocp(pcr);  in rts5227_card_power_off()
281 	rtsx_pci_write_register(pcr, CARD_PWR_CTL, SD_POWER_MASK |  in rts5227_card_power_off()
283 	rtsx_pci_write_register(pcr, PWR_GATE_CTRL, LDO3318_PWR_MASK, 0X00);  in rts5227_card_power_off()
288 static int rts5227_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)  in rts5227_switch_output_voltage()  argument
293 		err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4FC0 | 0x24);  in rts5227_switch_output_voltage()
297 		err = rtsx_pci_write_phy_register(pcr, 0x11, 0x3C02);  in rts5227_switch_output_voltage()
300 		err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4C80 | 0x24);  in rts5227_switch_output_voltage()
308 	rtsx_pci_init_cmd(pcr);  in rts5227_switch_output_voltage()
309 	rts5227_fill_driving(pcr, voltage);  in rts5227_switch_output_voltage()
310 	return rtsx_pci_send_cmd(pcr, 100);  in rts5227_switch_output_voltage()
374 void rts5227_init_params(struct rtsx_pcr *pcr)  in rts5227_init_params()  argument
376 	pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104;  in rts5227_init_params()
377 	pcr->num_slots = 2;  in rts5227_init_params()
378 	pcr->ops = &rts5227_pcr_ops;  in rts5227_init_params()
380 	pcr->flags = 0;  in rts5227_init_params()
381 	pcr->card_drive_sel = RTSX_CARD_DRIVE_DEFAULT;  in rts5227_init_params()
382 	pcr->sd30_drive_sel_1v8 = CFG_DRIVER_TYPE_B;  in rts5227_init_params()
383 	pcr->sd30_drive_sel_3v3 = CFG_DRIVER_TYPE_B;  in rts5227_init_params()
384 	pcr->aspm_en = ASPM_L1_EN;  in rts5227_init_params()
385 	pcr->aspm_mode = ASPM_MODE_CFG;  in rts5227_init_params()
386 	pcr->tx_initial_phase = SET_CLOCK_PHASE(27, 27, 15);  in rts5227_init_params()
387 	pcr->rx_initial_phase = SET_CLOCK_PHASE(30, 7, 7);  in rts5227_init_params()
389 	pcr->ic_version = rts5227_get_ic_version(pcr);  in rts5227_init_params()
390 	pcr->sd_pull_ctl_enable_tbl = rts5227_sd_pull_ctl_enable_tbl;  in rts5227_init_params()
391 	pcr->sd_pull_ctl_disable_tbl = rts5227_sd_pull_ctl_disable_tbl;  in rts5227_init_params()
392 	pcr->ms_pull_ctl_enable_tbl = rts5227_ms_pull_ctl_enable_tbl;  in rts5227_init_params()
393 	pcr->ms_pull_ctl_disable_tbl = rts5227_ms_pull_ctl_disable_tbl;  in rts5227_init_params()
395 	pcr->reg_pm_ctrl3 = PM_CTRL3;  in rts5227_init_params()
398 static int rts522a_optimize_phy(struct rtsx_pcr *pcr)  in rts522a_optimize_phy()  argument
402 	err = rtsx_pci_write_register(pcr, RTS522A_PM_CTRL3, D3_DELINK_MODE_EN,  in rts522a_optimize_phy()
407 	if (is_version(pcr, 0x522A, IC_VER_A)) {  in rts522a_optimize_phy()
408 		err = rtsx_pci_write_phy_register(pcr, PHY_RCR2,  in rts522a_optimize_phy()
413 		rtsx_pci_write_phy_register(pcr, PHY_RCR1, PHY_RCR1_INIT_27S);  in rts522a_optimize_phy()
414 		rtsx_pci_write_phy_register(pcr, PHY_FLD0, PHY_FLD0_INIT_27S);  in rts522a_optimize_phy()
415 		rtsx_pci_write_phy_register(pcr, PHY_FLD3, PHY_FLD3_INIT_27S);  in rts522a_optimize_phy()
416 		rtsx_pci_write_phy_register(pcr, PHY_FLD4, PHY_FLD4_INIT_27S);  in rts522a_optimize_phy()
422 static int rts522a_extra_init_hw(struct rtsx_pcr *pcr)  in rts522a_extra_init_hw()  argument
424 	rts5227_extra_init_hw(pcr);  in rts522a_extra_init_hw()
427 	if (!pcr->card_exist)  in rts522a_extra_init_hw()
428 		rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN,  in rts522a_extra_init_hw()
431 	rtsx_pci_write_register(pcr, FUNC_FORCE_CTL, FUNC_FORCE_UPME_XMT_DBG,  in rts522a_extra_init_hw()
433 	rtsx_pci_write_register(pcr, PCLK_CTL, 0x04, 0x04);  in rts522a_extra_init_hw()
434 	rtsx_pci_write_register(pcr, PM_EVENT_DEBUG, PME_DEBUG_0, PME_DEBUG_0);  in rts522a_extra_init_hw()
435 	rtsx_pci_write_register(pcr, PM_CLK_FORCE_CTL, 0xFF, 0x11);  in rts522a_extra_init_hw()
440 static int rts522a_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)  in rts522a_switch_output_voltage()  argument
445 		err = rtsx_pci_write_phy_register(pcr, 0x08, 0x57E4);  in rts522a_switch_output_voltage()
449 		err = rtsx_pci_write_phy_register(pcr, 0x11, 0x3C02);  in rts522a_switch_output_voltage()
452 		err = rtsx_pci_write_phy_register(pcr, 0x08, 0x54A4);  in rts522a_switch_output_voltage()
460 	rtsx_pci_init_cmd(pcr);  in rts522a_switch_output_voltage()
461 	rts5227_fill_driving(pcr, voltage);  in rts522a_switch_output_voltage()
462 	return rtsx_pci_send_cmd(pcr, 100);  in rts522a_switch_output_voltage()
465 static void rts522a_force_power_down(struct rtsx_pcr *pcr, u8 pm_state, bool runtime)  in rts522a_force_power_down()  argument
468 	rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 1, MASK_8_BIT_DEF, 0);  in rts522a_force_power_down()
469 	rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 2, MASK_8_BIT_DEF, 0);  in rts522a_force_power_down()
470 	rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 3,  in rts522a_force_power_down()
473 	rtsx_pci_write_register(pcr, RTS522A_PM_CTRL3,  in rts522a_force_power_down()
477 		rtsx_pci_write_register(pcr, RTS522A_AUTOLOAD_CFG1,  in rts522a_force_power_down()
479 		rtsx_pci_write_register(pcr, RTS522A_PM_CTRL3, 0x01, 0x00);  in rts522a_force_power_down()
480 		rtsx_pci_write_register(pcr, RTS522A_PME_FORCE_CTL, 0x30, 0x20);  in rts522a_force_power_down()
483 	rtsx_pci_write_register(pcr, FPDCTL, ALL_POWER_DOWN, ALL_POWER_DOWN);  in rts522a_force_power_down()
487 static void rts522a_set_l1off_cfg_sub_d0(struct rtsx_pcr *pcr, int active)  in rts522a_set_l1off_cfg_sub_d0()  argument
489 	struct rtsx_cr_option *option = &pcr->option;  in rts522a_set_l1off_cfg_sub_d0()
493 	aspm_L1_1 = rtsx_check_dev_flag(pcr, ASPM_L1_1_EN);  in rts522a_set_l1off_cfg_sub_d0()
494 	aspm_L1_2 = rtsx_check_dev_flag(pcr, ASPM_L1_2_EN);  in rts522a_set_l1off_cfg_sub_d0()
506 	rtsx_set_l1off_sub(pcr, val);  in rts522a_set_l1off_cfg_sub_d0()
528 void rts522a_init_params(struct rtsx_pcr *pcr)  in rts522a_init_params()  argument
530 	struct rtsx_cr_option *option = &pcr->option;  in rts522a_init_params()
532 	rts5227_init_params(pcr);  in rts522a_init_params()
533 	pcr->ops = &rts522a_pcr_ops;  in rts522a_init_params()
534 	pcr->aspm_mode = ASPM_MODE_REG;  in rts522a_init_params()
535 	pcr->tx_initial_phase = SET_CLOCK_PHASE(20, 20, 11);  in rts522a_init_params()
536 	pcr->reg_pm_ctrl3 = RTS522A_PM_CTRL3;  in rts522a_init_params()
549 	pcr->option.ocp_en = 1;  in rts522a_init_params()
550 	if (pcr->option.ocp_en)  in rts522a_init_params()
551 		pcr->hw_param.interrupt_en |= SD_OC_INT_EN;  in rts522a_init_params()
552 	pcr->hw_param.ocp_glitch = SD_OCP_GLITCH_10M;  in rts522a_init_params()
553 	pcr->option.sd_800mA_ocp_thd = RTS522A_OCP_THD_800;  in rts522a_init_params()